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RELEASE V0.9.1
Works with more HDMI monitors, frame grabbers, HDMI switches, etc. MiSTer2MEGA65 was not compliant to section 4.2.7 of the HDMI specification version 1.4b: It did not assert the +5V power signal. Now it does assert the +5 power signal via the FPGA pin `ct_hpd`.
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CORE/CORE-R3.xdc

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@@ -204,6 +204,15 @@ set_property -dict {PACKAGE_PIN AB3 IOSTANDARD TMDS_33} [get_ports {tmds_data_
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set_property -dict {PACKAGE_PIN AB5 IOSTANDARD TMDS_33} [get_ports {tmds_data_n[2]}]
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set_property -dict {PACKAGE_PIN AA5 IOSTANDARD TMDS_33} [get_ports {tmds_data_p[2]}]
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#set_property -dict {PACKAGE_PIN AB7 IOSTANDARD LVCMOS33} [get_ports hdmi_scl]
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#set_property -dict {PACKAGE_PIN V9 IOSTANDARD LVCMOS33} [get_ports hdmi_sda]
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#set_property -dict {PACKAGE_PIN AB8 IOSTANDARD LVCMOS33} [get_ports hdmi_enable]
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#set_property -dict {PACKAGE_PIN Y8 IOSTANDARD LVCMOS33} [get_ports hdmi_hotplugdetect]
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#set_property -dict {PACKAGE_PIN W9 IOSTANDARD LVCMOS33} [get_ports hdmi_cec_a]
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#set_property -dict {PACKAGE_PIN Y8 IOSTANDARD LVCMOS33} [get_ports hpd_a]
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set_property -dict {PACKAGE_PIN M15 IOSTANDARD LVCMOS33} [get_ports ct_hpd]
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#set_property -dict {PACKAGE_PIN AB8 IOSTANDARD LVCMOS33} [get_ports ls_oe]
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## HyperRAM (standard)
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set_property -dict {PACKAGE_PIN D22 IOSTANDARD LVCMOS33 PULLUP FALSE SLEW FAST DRIVE 16} [get_ports hr_clk_p]
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set_property -dict {PACKAGE_PIN A21 IOSTANDARD LVCMOS33 PULLUP FALSE SLEW FAST DRIVE 16} [get_ports {hr_d[0]}]

CORE/vhdl/top_mega65-r3.vhd

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tmds_data_n : out std_logic_vector(2 downto 0);
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tmds_clk_p : out std_logic;
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tmds_clk_n : out std_logic;
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ct_hpd : out std_logic := '1'; -- Needed for HDMI compliancy: Assert +5V according to section 4.2.7 of the specification version 1.4b
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-- MEGA65 smart keyboard controller
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kb_io0 : out std_logic; -- clock to keyboard

VERSIONS.md

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Version 0.9.0 - January, 9 2023
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Version 0.9.1 - January 28, 2023
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================================
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Works with more HDMI monitors, frame grabbers, HDMI switches, etc.
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MiSTer2MEGA65 was not compliant to section 4.2.7 of the HDMI specification
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version 1.4b: It did not assert the +5V power signal. Now it does assert the
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+5 power signal via the FPGA pin `ct_hpd`.
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Version 0.9.0 - January 9, 2023
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===============================
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After being in development since April 5, 2021 while being in a constant

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