Suggestion: Make use of the DDR memory on the Nexys4DDR board

[MJoergen]

The Nexys4DDR board contains a DDR2 memory with a 16-bit data bus, and a total of 8 M words of memory.

The extra memory could be used for graphics etc. In order to make use of the memory, we would need an MMU, so the target is set to V2.0.

Digilent has a nice memory interface block that can be used directly: https://reference.digilentinc.com/learn/programmable-logic/tutorials/nexys-4-ddr-sram-to-ddr-component/start

In that link it is shown that access times are 26 clock cycles (when running at 100 MHz). So to be really useful, we would probably need some memory cache as well.

It could be cool if this extra memory could somehow be made generic, so that the interface matches that of the HyperRAM on the MEGA65.

[sy2002]

I like this idea, especially - as you wrote - if we could find a way that makes it generic enough, so that the end-user (programmer) does not need to differentiate between the DDR or the HyperRAM.