A bit of refactor

Author: schoeberl

src/main/scala/spi/SerialSpiTest.scala

@@ -227,6 +227,19 @@ class SerialSpiTest(id: Int, portName: String = "/dev/tty.usbserial-210292B40860
     Thread.sleep(300)
     readStatusRegister()
   }
+
+  def echoPins(sck: Int, mosi: Int, ncs: Int) = {
+    // println(s"ncs: $ncs, mosi: $mosi, sck: $sck")
+    val bits = (ncs << 2) | (mosi << 1) | sck
+    val s = "w4" + (bits + '0').toChar + "4\r"
+    writeReadSerial(s)
+    val rx = writeReadSerial("r")
+    // '8' is MISO bit set
+    val bit = if (rx(8 - 1) == '8') 1 else 0
+    // println("rx: " + rx)
+    // println("bit: " + bit)
+    bit
+  }
 }
 
 object SerialSpiTest extends App {

src/test/scala/spi/FlashTest.scala

@@ -24,18 +24,10 @@ class FlashTest() extends AnyFlatSpec with ChiselScalatestTester {
     test(new SpiMaster) { c =>
 
       def echoPins() = {
-        val sck = c.spi.sclk.peekInt()
-        val mosi = c.spi.mosi.peekInt()
-        val ncs = c.spi.ncs.peekInt()
-        // println(s"ncs: $ncs, mosi: $mosi, sck: $sck")
-        val bits = (ncs << 2) | (mosi << 1) | sck
-        val s = "w4" + (bits + '0').toChar + "4\r"
-        spi.writeReadSerial(s)
-        val rx = spi.writeReadSerial("r")
-        // '8' is MISO bit set
-        val bit = if (rx(8 - 1) == '8') 1 else 0
-        // println("rx: " + rx)
-        // println("bit: " + bit)
+        val sck = c.spi.sclk.peekInt().toInt
+        val mosi = c.spi.mosi.peekInt().toInt
+        val ncs = c.spi.ncs.peekInt().toInt
+        val bit = spi.echoPins(sck, mosi, ncs)
         c.spi.miso.poke(bit)
       }
       def readWord(addr: Int) = {