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1 | 1 | /** Simplified memory map for the bootloader. |
2 | 2 | * Make sure the bootloader can load into main memory without overwriting itself. |
3 | | - * We put 2nd bootloader in the high address space (before ROM stack/data/bss). |
4 | | - * See memory usage for ROM bootloader at the end of this file. |
| 3 | + * |
| 4 | + * ESP32-S3 ROM static data usage is as follows: |
| 5 | + * - 0x3fcd7e00 - 0x3fce9704: Shared buffers, used in UART/USB/SPI download mode only |
| 6 | + * - 0x3fce9710 - 0x3fceb710: PRO CPU stack, can be reclaimed as heap after RTOS startup |
| 7 | + * - 0x3fceb710 - 0x3fced710: APP CPU stack, can be reclaimed as heap after RTOS startup |
| 8 | + * - 0x3fced710 - 0x3fcf0000: ROM .bss and .data (not easily reclaimable) |
| 9 | + * |
| 10 | + * The 2nd stage bootloader can take space up to the end of ROM shared |
| 11 | + * buffers area (0x3fce9704). For alignment purpose we shall use value (0x3fce9700). |
5 | 12 | */ |
6 | 13 |
|
| 14 | +/* The offset between Dbus and Ibus. Used to convert between 0x403xxxxx and 0x3fcxxxxx addresses. */ |
| 15 | +iram_dram_offset = 0x6f0000; |
| 16 | + |
| 17 | +/* We consider 0x3fce9700 to be the last usable address for 2nd stage bootloader stack overhead, dram_seg, |
| 18 | + * and work out iram_seg and iram_loader_seg addresses from there, backwards. |
| 19 | + */ |
| 20 | + |
| 21 | +/* These lengths can be adjusted, if necessary: */ |
| 22 | +bootloader_usable_dram_end = 0x3fce9700; |
| 23 | +bootloader_stack_overhead = 0x2000; /* For safety margin between bootloader data section and startup stacks */ |
| 24 | +bootloader_dram_seg_len = 0x4000; |
| 25 | +bootloader_iram_loader_seg_len = 0x7000; |
| 26 | +bootloader_iram_seg_len = 0x3000; |
| 27 | + |
| 28 | +/* Start of the lower region is determined by region size and the end of the higher region */ |
| 29 | +bootloader_dram_seg_end = bootloader_usable_dram_end - bootloader_stack_overhead; |
| 30 | +bootloader_dram_seg_start = bootloader_dram_seg_end - bootloader_dram_seg_len; |
| 31 | +bootloader_iram_loader_seg_start = bootloader_dram_seg_start - bootloader_iram_loader_seg_len + iram_dram_offset; |
| 32 | +bootloader_iram_seg_start = bootloader_iram_loader_seg_start - bootloader_iram_seg_len; |
| 33 | + |
7 | 34 | MEMORY |
8 | 35 | { |
9 | | - iram_seg (RWX) : org = 0x403B6000, len = 0x4000 |
10 | | - iram_loader_seg (RWX) : org = 0x403BA000, len = 0x6000 |
11 | | - dram_seg (RW) : org = 0x3FCD0000, len = 0x4000 |
| 36 | + iram_seg (RWX) : org = bootloader_iram_seg_start, len = bootloader_iram_seg_len |
| 37 | + iram_loader_seg (RWX) : org = bootloader_iram_loader_seg_start, len = bootloader_iram_loader_seg_len |
| 38 | + dram_seg (RW) : org = bootloader_dram_seg_start, len = bootloader_dram_seg_len |
12 | 39 | } |
13 | 40 |
|
| 41 | +/* The app may use RAM for static allocations up to the start of iram_loader_seg. |
| 42 | + * If you have changed something above and this assert fails: |
| 43 | + * 1. Check what the new value of bootloader_iram_loader_seg start is. |
| 44 | + * 2. Update the value in this assert. |
| 45 | + * 3. Update SRAM_IRAM_END in components/esp_system/ld/esp32s3/memory.ld.in to the same value. |
| 46 | + */ |
| 47 | +ASSERT(bootloader_iram_loader_seg_start == 0x403cc700, "bootloader_iram_loader_seg_start inconsistent with SRAM_IRAM_END"); |
| 48 | + |
14 | 49 | /* Default entry point: */ |
15 | 50 | ENTRY(call_start_cpu0); |
16 | 51 |
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@@ -172,28 +207,3 @@ SECTIONS |
172 | 207 | } > iram_seg |
173 | 208 |
|
174 | 209 | } |
175 | | - |
176 | | - |
177 | | -/** |
178 | | - * Appendix: Memory Usage of ROM bootloader |
179 | | - * |
180 | | - * +--------+--------------+------+ 0x3FCD_8000 |
181 | | - * | ^ | |
182 | | - * | | | |
183 | | - * | | data/bss | |
184 | | - * | | | |
185 | | - * | v | |
186 | | - * +------------------------------+ 0x3FCE_9910 |
187 | | - * | ^ | |
188 | | - * | | | |
189 | | - * | | stack (pro) | |
190 | | - * | | | |
191 | | - * | v | |
192 | | - * +------------------------------+ 0x3FCE_B910 |
193 | | - * | ^ | |
194 | | - * | | | |
195 | | - * | | stack (app) | |
196 | | - * | | | |
197 | | - * | v | |
198 | | - * +--------+--------------+------+ 0x3FCE_D910 |
199 | | - */ |
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