[Feature Request] Report instruction buffer during head of line blocking based hangs.

[amahmudTT]

Sometimes the riscv cores hang because their corresponding instruction buffers for the tensix engine have gotten full and due to backpressure they cannot insert any more tensix instructions. In such a scenario we would like tt-exalens to be able to

Check if instruction buffer is full, preferably also the length of the instruction buffer
Check what instruction is next and print it (what is at the head of the instruction buffer)

Using the instruction name and lenght of the buffer we might be able to quickly spot the root cause of the hang.
(I am not aware of which signals should be used for reporting this)

[onenezicTT]

@amahmudTT do you maybe have a repro that you suspect causes this that we can test on? we should be able to get at least the state of the instruction buffers and the op code that's next

[amahmudTT]

I will give a repo, cant specify the ETA atm.