lib: bh_arc: reset: add cable fault low-power mode

Read cable power limit from SCRATCH_1 (written by DMC via JTAG).
If power limit is 0, enter cable fault mode to minimize power draw.
Add magic bits for backward compatibility

In cable fault mode:
- Keep tensixes, ETH, GDDR, and L2CPU in reset
- Always deassert NOC, system, and PCIe resets (needed for ARC-PCIe
  communication path)
- Skip RISC-V and soft reset sequences

This allows the board to remain accessible via PCIe even when the
12V-2x6 power cable is missing or improperly installed.

Signed-off-by: Sherry Li <xiaoruli@tenstorrent.com>

Author: ShLiTT

app/dmc/src/main.c

@@ -461,6 +461,7 @@ static void handle_perst(void)
 
 			bharc_disable_i2cbus(&chip->config.arc);
 			jtag_bootrom_reset_asic(chip);
+			jtag_bootrom_set_cable_power_limit(chip, chip->data.cable_power_limit);
 			jtag_bootrom_soft_reset_arc(chip);
 			jtag_bootrom_teardown(chip);
 			bharc_enable_i2cbus(&chip->config.arc);

include/tenstorrent/bh_chip.h

@@ -87,6 +87,9 @@ struct bh_chip_data {
 	/* Last seen CM2DM message sequence number, to know if the current message is a repeat. */
 	uint8_t last_cm2dm_seq_num;
 	bool last_cm2dm_seq_num_valid;
+
+	/* Cable power limit detected at boot, written to scratch register during resets. */
+	uint16_t cable_power_limit;
 };
 
 struct bh_chip {
@@ -139,13 +142,14 @@ extern struct bh_chip BH_CHIPS[BH_CHIP_COUNT];
 			    INIT_STRAP)),                                                          \
 	  ())},                                            \
 			},                                                                         \
-				.auto_reset_timer = Z_TIMER_INITIALIZER(                           \
-					BH_CHIPS[idx].auto_reset_timer, bh_chip_auto_reset, NULL), \
+						  .auto_reset_timer = Z_TIMER_INITIALIZER(         \
+							  BH_CHIPS[idx].auto_reset_timer,          \
+							  bh_chip_auto_reset, NULL),               \
 			},
 
 #define BH_CHIP_PRIMARY_INDEX DT_PROP(DT_PATH(chips), primary)
 
-int jtag_bootrom_reset_sequence(struct bh_chip *chip, bool force_reset);
+int jtag_bootrom_reset_sequence(struct bh_chip *chip, bool force_reset, uint16_t cable_power_limit);
 
 void bh_chip_cancel_bus_transfer_set(struct bh_chip *chip);
 void bh_chip_cancel_bus_transfer_clear(struct bh_chip *chip);

lib/tenstorrent/bh_arc/reset.c

@@ -46,6 +46,12 @@ LOG_MODULE_REGISTER(InitHW, CONFIG_TT_APP_LOG_LEVEL);
 static const struct device *const fwtable_dev = DEVICE_DT_GET(DT_NODELABEL(fwtable));
 STATUS_ERROR_STATUS0_reg_u error_status0;
 
+/* Cable fault mode: true when DMC reports 0W power limit (no cable or improper installation).
+ * In this mode, we keep tensixes, ETH, GDDR, and L2CPU in reset to minimize power draw,
+ * while maintaining the ARC-PCIe NOC path for host communication.
+ */
+static bool cable_fault_mode;
+
 static const uint8_t kNocRing;
 static const uint8_t kNocTlb;
 static const uint32_t kSoftReset0Addr = 0xFFB121B0; /* NOC address in each tile */
@@ -68,6 +74,11 @@ static int AssertSoftResets(void)
 		return 0;
 	}
 
+	/* In cable fault mode, tiles are already in reset - skip NOC writes to them */
+	if (cable_fault_mode) {
+		return 0;
+	}
+
 	/* Assert Soft Reset for ERISC, MRISC Tensix (skip L2CPU due to bug) */
 	bh_soft_reset_all_tensix();
 
@@ -113,6 +124,11 @@ static int DeassertRiscvResets(void)
 		return 0;
 	}
 
+	/* In cable fault mode, skip RISC-V deasserts to keep cores in reset */
+	if (cable_fault_mode) {
+		return 0;
+	}
+
 	/* Go back to PLL bypass, since RISCV resets need to be deasserted at low speed */
 	ARRAY_FOR_EACH(pll_devs, i) {
 		clock_control_configure(pll_devs[i], NULL,
@@ -199,12 +215,37 @@ static int DeassertTileResets(void)
 		return 0;
 	}
 
+	/* Read cable power limit with magic marker check for backward compatibility.
+	 * - If magic marker present: new DMC, check power limit (0 = cable fault)
+	 * - If magic marker absent: legacy DMC, skip cable fault detection
+	 */
+	uint32_t raw_value = ReadReg(DMC_CABLE_POWER_LIMIT_REG_ADDR);
+
+	if ((raw_value & CABLE_POWER_LIMIT_MAGIC_MASK) == CABLE_POWER_LIMIT_MAGIC) {
+		/* New DMC with cable power limit feature */
+		uint16_t cable_power_limit = raw_value & CABLE_POWER_LIMIT_VALUE_MASK;
+
+		LOG_INF("Cable Power Limit: %u", cable_power_limit);
+
+		if (cable_power_limit == 0) {
+			cable_fault_mode = true;
+			error_status0.f.cable_fault = 1;
+			LOG_WRN("Cable fault detected (0W power limit). "
+				"Entering low-power mode - keeping tensixes, ETH, GDDR, L2CPU in "
+				"reset.");
+		}
+	} else {
+		/* Legacy DMC without cable power limit feature - skip cable fault check */
+		LOG_INF("Legacy DMC detected (no cable power feature), skipping cable fault check");
+	}
+
 	/* Put all PLLs back into bypass, since tile resets need to be deasserted at low speed */
 	ARRAY_FOR_EACH(pll_devs, i) {
 		clock_control_configure(pll_devs[i], NULL,
 					(void *)CLOCK_CONTROL_TT_BH_CONFIG_BYPASS);
 	}
 
+	/* Always deassert NOC, system, and PCIe resets - needed for ARC-PCIe communication */
 	RESET_UNIT_GLOBAL_RESET_reg_u global_reset = {.val = RESET_UNIT_GLOBAL_RESET_REG_DEFAULT};
 
 	global_reset.f.noc_reset_n = 1;
@@ -213,6 +254,11 @@ static int DeassertTileResets(void)
 	global_reset.f.ptp_reset_n_refclk = 1;
 	WriteReg(RESET_UNIT_GLOBAL_RESET_REG_ADDR, global_reset.val);
 
+	/* In cable fault mode, keep tensixes, ETH, GDDR, and L2CPU in reset to minimize power */
+	if (cable_fault_mode) {
+		return 0;
+	}
+
 	RESET_UNIT_ETH_RESET_reg_u eth_reset = {.val = RESET_UNIT_ETH_RESET_REG_DEFAULT};
 
 	eth_reset.f.eth_reset_n = 0x3fff;

lib/tenstorrent/bh_arc/status_reg.h

@@ -18,8 +18,16 @@
 
 /* SCRATCH_[0-7] */
 #define STATUS_POST_CODE_REG_ADDR      RESET_UNIT_SCRATCH_REG_ADDR(0)
-/* Cable power limit written by DMC via JTAG before ARC boot (0 = cable fault) */
+/* Cable power limit written by DMC via JTAG before ARC boot.
+ * Format: [31:16] = magic marker, [15:0] = power limit in watts
+ * Magic marker presence indicates DMC supports this feature.
+ * If magic marker absent (legacy DMC), SMC skips cable fault detection.
+ * If magic marker present and power_limit=0, cable fault is detected.
+ */
 #define DMC_CABLE_POWER_LIMIT_REG_ADDR RESET_UNIT_SCRATCH_REG_ADDR(1)
+#define CABLE_POWER_LIMIT_MAGIC        0xCAB10000 /* Magic marker in upper 16 bits */
+#define CABLE_POWER_LIMIT_MAGIC_MASK   0xFFFF0000
+#define CABLE_POWER_LIMIT_VALUE_MASK   0x0000FFFF
 
 /* SCRATCH_RAM[0-63] */
 #define STATUS_FW_VERSION_REG_ADDR           RESET_UNIT_SCRATCH_RAM_REG_ADDR(0)

lib/tenstorrent/bh_chip/bh_chip.c

@@ -171,7 +171,7 @@ int bh_chip_reset_chip(struct bh_chip *chip, bool force_reset)
 		return ret;
 	}
 
-	ret2 = jtag_bootrom_reset_sequence(chip, force_reset);
+	ret2 = jtag_bootrom_reset_sequence(chip, force_reset, chip->data.cable_power_limit);
 
 	ret = bharc_enable_i2cbus(&chip->config.arc);
 	if (ret != 0) {

lib/tenstorrent/jtag_bootrom/jtag_bootrom.c

@@ -318,10 +318,15 @@ void jtag_bootrom_set_cable_power_limit(struct bh_chip *chip, uint16_t power_lim
 #ifdef CONFIG_JTAG_LOAD_BOOTROM
 	const struct device *dev = chip->config.jtag;
 
-	/* Write cable power limit to SCRATCH_1 for SMC to read at boot.
-	 * A value of 0 indicates cable fault (no cable or improper installation).
+	/* Write cable power limit with magic marker for SMC to detect feature support.
+	 * Format: [31:16] = CABLE_POWER_LIMIT_MAGIC, [15:0] = power_limit
+	 * Legacy SMC will read this as a large positive value (not 0), so safe.
+	 * New SMC checks for magic marker to enable cable fault detection.
+	 * A power_limit of 0 indicates cable fault (no cable or improper installation).
 	 */
-	jtag_axi_write32(dev, DMC_CABLE_POWER_LIMIT_REG_ADDR, (uint32_t)power_limit);
+	uint32_t value = CABLE_POWER_LIMIT_MAGIC | (uint32_t)power_limit;
+
+	jtag_axi_write32(dev, DMC_CABLE_POWER_LIMIT_REG_ADDR, value);
 #endif
 }
 

lib/tenstorrent/jtag_bootrom/reset.c

@@ -29,7 +29,7 @@ const size_t get_bootcode_len(void)
 	return sizeof(bootcode) / sizeof(uint32_t);
 }
 
-int jtag_bootrom_reset_sequence(struct bh_chip *chip, bool force_reset)
+int jtag_bootrom_reset_sequence(struct bh_chip *chip, bool force_reset, uint16_t cable_power_limit)
 {
 	const uint32_t *const patch = (const uint32_t *)bootcode;
 	const size_t patch_len = get_bootcode_len();
@@ -64,6 +64,8 @@ int jtag_bootrom_reset_sequence(struct bh_chip *chip, bool force_reset)
 		printk("Bootrom verification failed\n");
 	}
 
+	jtag_bootrom_set_cable_power_limit(chip, cable_power_limit);
+
 	start = k_uptime_get();
 
 #ifdef CONFIG_JTAG_LOAD_ON_PRESET