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1 | 1 | /** @file
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2 | 2 |
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3 | 3 | Copyright (c) 2024, Arm Limited. All rights reserved.<BR>
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4 |
| - Copyright (c) 2024, NVIDIA CORPORATION & AFFILIATES. All rights reserved.<BR> |
| 4 | + Copyright (c) 2024 - 2025, NVIDIA CORPORATION & AFFILIATES. All rights reserved.<BR> |
5 | 5 | Copyright (C) 2024 - 2025, Advanced Micro Devices, Inc. All rights reserved.
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6 | 6 |
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7 | 7 | SPDX-License-Identifier: BSD-2-Clause-Patent
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18 | 18 | #include <AcpiObjects.h>
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19 | 19 | #include <StandardNameSpaceObjects.h>
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20 | 20 |
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| 21 | +#include <IndustryStandard/AcpiAml.h> |
21 | 22 | #include <IndustryStandard/Tpm2Acpi.h>
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22 | 23 |
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23 | 24 | /** The EARCH_COMMON_OBJECT_ID enum describes the Object IDs
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@@ -59,6 +60,8 @@ typedef enum ArchCommonObjectID {
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59 | 60 | EArchCommonObjPssInfo, ///< 32 - P-State status (PSS) Info
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60 | 61 | EArchCommonObjPpcInfo, ///< 33 - P-State control (PPC) Info
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61 | 62 | EArchCommonObjStaInfo, ///< 34 - _STA (Device Status) Info
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| 63 | + EArchCommonObjMemoryRangeDescriptor, ///< 35 - Memory Range Descriptor |
| 64 | + EArchCommonObjGenericDbg2DeviceInfo, ///< 36 - Generic DBG2 Device Info |
62 | 65 | EArchCommonObjMax
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63 | 66 | } EARCH_COMMON_OBJECT_ID;
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64 | 67 |
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@@ -812,6 +815,41 @@ typedef struct CmArchCommonStaInfo {
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812 | 815 | UINT32 DeviceStatus;
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813 | 816 | } CM_ARCH_COMMON_STA_INFO;
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814 | 817 |
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| 818 | +/** A structure that describes the |
| 819 | + Memory Range descriptor. |
| 820 | +
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| 821 | + ID: EArchCommonObjMemoryRangeDescriptor |
| 822 | +*/ |
| 823 | +typedef struct CmArchCommonMemoryRangeDescriptor { |
| 824 | + /// Base address of Memory Range, |
| 825 | + UINT64 BaseAddress; |
| 826 | + |
| 827 | + /// Length of the Memory Range. |
| 828 | + UINT64 Length; |
| 829 | +} CM_ARCH_COMMON_MEMORY_RANGE_DESCRIPTOR; |
| 830 | + |
| 831 | +/** A structure that describes a generic device to add a DBG2 device node from. |
| 832 | +
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| 833 | + ID: EArchCommonObjGenericDbg2DeviceInfo, |
| 834 | +*/ |
| 835 | +typedef struct CmArchCommonDbg2DeviceInfo { |
| 836 | + /// Token identifying an array of CM_ARCH_COMMON_MEMORY_RANGE_DESCRIPTOR objects |
| 837 | + CM_OBJECT_TOKEN AddressResourceToken; |
| 838 | + |
| 839 | + /// The DBG2 port type |
| 840 | + UINT16 PortType; |
| 841 | + |
| 842 | + /// The DBG2 port subtype |
| 843 | + UINT16 PortSubtype; |
| 844 | + |
| 845 | + /// Access Size |
| 846 | + UINT8 AccessSize; |
| 847 | + |
| 848 | + /** ASCII Null terminated string that will be appended to \_SB_. for the full path. |
| 849 | + */ |
| 850 | + CHAR8 ObjectName[AML_NAME_SEG_SIZE + 1]; |
| 851 | +} CM_ARCH_COMMON_DBG2_DEVICE_INFO; |
| 852 | + |
815 | 853 | #pragma pack()
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816 | 854 |
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817 | 855 | #endif // ARCH_COMMON_NAMESPACE_OBJECTS_H_
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