Commit 3afb4be
Modified and reimplemented FastLanes library in C
There is a background and intro document in src/fl/README.md
The short version is: this change brings a C implementation
of the FastLanes library to Timescale DB. The original idea
is from 'The FastLanes Compression Layout: Decoding >100 Billion
Integers per Second with Scalar Code' by Azim Afroozeh and
Peter Boncz (https://doi.org/10.14778/3598581.3598587)
Our version departs from the original ideas in a few ways:
- instead of having a single 1024 bit virtual register, I
introduce multiple smaller register widths, that I call
'tiered FL', the widths are 8, 16, 32, 64, 128 and 256
- we do not have 1024 bit virtual registers
- our implementation relies on C macros, instead of C++
templates and code generation
The src/fl/README.md file provides more details about the
library.
Co-authored-by: Sven Klemm <31455525+svenklemm@users.noreply.github.com>
Signed-off-by: David Beck <david.beck.priv@gmail.com>1 parent 235b708 commit 3afb4be
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