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try keep_hierarchy = 'yes'
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src/top.v

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@@ -66,7 +66,7 @@ module tt_um_cpu_top (
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wire [7:0] out_result;
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// CPU core
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cpu_core u_cpu_core (
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(* keep_hierarchy = "yes" *) cpu_core u_cpu_core (
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.clk(clk),
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.rst_n(rst_n),
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.opcode(opcode),

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