55
66`default_nettype none
77
8- module tt_um_example (
9- input wire [7 :0 ] ui_in, // Dedicated inputs
10- output wire [7 :0 ] uo_out, // Dedicated outputs
8+ module tt_um_cpu_top (
9+ input wire [7 :0 ] ui_in, // Inputs for instruction data (through DIP switches)
10+ output wire [7 :0 ] uo_out, // Outputs to drive LEDs
1111 input wire [7 :0 ] uio_in, // IOs: Input path
1212 output wire [7 :0 ] uio_out, // IOs: Output path
1313 output wire [7 :0 ] uio_oe, // IOs: Enable path (active high: 0=input, 1=output)
@@ -21,6 +21,56 @@ module tt_um_example (
2121 assign uio_out = 0 ;
2222 assign uio_oe = 0 ;
2323
24+
25+ reg [15 :0 ] instr;
26+ reg [3 :0 ] bit_count;
27+
28+ /*
29+ IDEAS IN PROGRESS:
30+ S_IDLE should display a status on the 7-seg display on the demo board. Perhaps a letter indicating the expected next input
31+ ('L' for lower 8 bits, 'H' for upper 8 bits)
32+
33+
34+
35+ */
36+
37+ // Button edge-detector and synchronizer
38+
39+ reg btn_sync0, btn_sync1, btn_prev;
40+ wire btn_level = uio_in[0 ]; // external push button
41+ wire btn_edge = btn_sync1 & ~ btn_prev; // detect rising edge
42+
43+ always @(posedge clk or negedge rst_n) begin
44+ if (! rst_n) begin
45+ btn_sync0 <= 1'b1 ; // assume pull-up idle high
46+ btn_sync1 <= 1'b1 ;
47+ btn_prev <= 1'b1 ;
48+ end else begin
49+ btn_sync0 <= btn_level;
50+ btn_sync1 <= btn_sync0;
51+ btn_prev <= btn_sync1;
52+ end
53+ end
54+
55+ // FSM states
56+
57+ typedef enum logic [2 :0 ] {
58+ S_RESET, // TODO is this needed, or do we use built-in rst_n instead?
59+ S_IDLE, // waiting for button press to shift in instruction bit values from DIP switches
60+ S_FETCH_LO, // capture lower 8 instruction bits
61+ S_FETCH_HI, // capture upper 8 instruction bits
62+ S_EXECUTE // perform
63+ } state_t;
64+
65+ state_t state, next_state;
66+
67+ // datapath control signals and serial wires
68+
69+ reg le; // load enable for shift registers
70+ reg ae; // accumulate enable for ALU
71+ wire serial_in; // single bit serial input into ALU
72+ wire serial_out; // single bit serial output from ALU
73+
2474 // List all unused inputs to prevent warnings
2575 wire _unused = & {ena, clk, rst_n, 1'b0 };
2676
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