|
29 | 29 |
|
30 | 30 | type SPIMode uint8
|
31 | 31 |
|
32 |
| -func (m SPIMode) ApplyTo(conf uint32) uint32 { |
33 |
| - // See: |
34 |
| - // - https://de.wikipedia.org/wiki/Serial_Peripheral_Interface#/media/Datei:SPI_timing_diagram2.svg |
35 |
| - // - https://docs-be.nordicsemi.com/bundle/ps_nrf52840/attach/nRF52840_PS_v1.11.pdf?_LANG=enus page 716, table 43 |
36 |
| - switch m { |
37 |
| - case SPI_MODE_CPHA0_CPOL0: |
38 |
| - conf &^= (nrf.SPIM_CONFIG_CPOL_ActiveHigh << nrf.SPIM_CONFIG_CPOL_Pos) |
39 |
| - conf &^= (nrf.SPIM_CONFIG_CPHA_Leading << nrf.SPIM_CONFIG_CPHA_Pos) |
40 |
| - case SPI_MODE_CPHA1_CPOL0: |
41 |
| - conf &^= (nrf.SPIM_CONFIG_CPOL_ActiveHigh << nrf.SPIM_CONFIG_CPOL_Pos) |
42 |
| - conf |= (nrf.SPIM_CONFIG_CPHA_Trailing << nrf.SPIM_CONFIG_CPHA_Pos) |
43 |
| - case SPI_MODE_CPHA1_CPOL1: |
44 |
| - conf |= (nrf.SPIM_CONFIG_CPOL_ActiveLow << nrf.SPIM_CONFIG_CPOL_Pos) |
45 |
| - conf &^= (nrf.SPIM_CONFIG_CPHA_Leading << nrf.SPIM_CONFIG_CPHA_Pos) |
46 |
| - case SPI_MODE_CPHA0_CPOL1: |
47 |
| - conf |= (nrf.SPIM_CONFIG_CPOL_ActiveLow << nrf.SPIM_CONFIG_CPOL_Pos) |
48 |
| - conf |= (nrf.SPIM_CONFIG_CPHA_Trailing << nrf.SPIM_CONFIG_CPHA_Pos) |
49 |
| - } |
50 |
| - return conf |
51 |
| -} |
52 |
| - |
53 | 32 | func CPUFrequency() uint32 {
|
54 | 33 | return 64000000
|
55 | 34 | }
|
@@ -227,7 +206,7 @@ type SPIConfig struct {
|
227 | 206 | SDO Pin
|
228 | 207 | SDI Pin
|
229 | 208 | LSBFirst bool
|
230 |
| - Mode SPIMode |
| 209 | + Mode uint8 |
231 | 210 | }
|
232 | 211 |
|
233 | 212 | // Configure is intended to set up the SPI interface.
|
@@ -264,8 +243,24 @@ func (spi *SPI) Configure(config SPIConfig) error {
|
264 | 243 | conf = (nrf.SPIM_CONFIG_ORDER_LsbFirst << nrf.SPIM_CONFIG_ORDER_Pos)
|
265 | 244 | }
|
266 | 245 |
|
267 |
| - // set mode |
268 |
| - conf = config.Mode.ApplyTo(conf) |
| 246 | + // set mode, see: |
| 247 | + // - https://de.wikipedia.org/wiki/Serial_Peripheral_Interface#/media/Datei:SPI_timing_diagram2.svg |
| 248 | + // - https://docs-be.nordicsemi.com/bundle/ps_nrf52840/attach/nRF52840_PS_v1.11.pdf?_LANG=enus page 716, table 43 |
| 249 | + switch SPIMode(config.Mode) { |
| 250 | + case SPI_MODE_CPHA0_CPOL0: |
| 251 | + conf &^= (nrf.SPIM_CONFIG_CPOL_ActiveHigh << nrf.SPIM_CONFIG_CPOL_Pos) |
| 252 | + conf &^= (nrf.SPIM_CONFIG_CPHA_Leading << nrf.SPIM_CONFIG_CPHA_Pos) |
| 253 | + case SPI_MODE_CPHA1_CPOL0: |
| 254 | + conf &^= (nrf.SPIM_CONFIG_CPOL_ActiveHigh << nrf.SPIM_CONFIG_CPOL_Pos) |
| 255 | + conf |= (nrf.SPIM_CONFIG_CPHA_Trailing << nrf.SPIM_CONFIG_CPHA_Pos) |
| 256 | + case SPI_MODE_CPHA1_CPOL1: |
| 257 | + conf |= (nrf.SPIM_CONFIG_CPOL_ActiveLow << nrf.SPIM_CONFIG_CPOL_Pos) |
| 258 | + conf &^= (nrf.SPIM_CONFIG_CPHA_Leading << nrf.SPIM_CONFIG_CPHA_Pos) |
| 259 | + case SPI_MODE_CPHA0_CPOL1: |
| 260 | + conf |= (nrf.SPIM_CONFIG_CPOL_ActiveLow << nrf.SPIM_CONFIG_CPOL_Pos) |
| 261 | + conf |= (nrf.SPIM_CONFIG_CPHA_Trailing << nrf.SPIM_CONFIG_CPHA_Pos) |
| 262 | + } |
| 263 | + |
269 | 264 | spi.Bus.CONFIG.Set(conf)
|
270 | 265 |
|
271 | 266 | // set pins
|
|
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