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| 1 | +# Vortex DSE — C-slot admission and per-slot agreement |
| 2 | + |
| 3 | +Vortex DSE is a deterministic consensus protocol in which a message carries its |
| 4 | +own slot stamp and each node decides admission locally, against its own clock. |
| 5 | +There is no leader, no quorum and no vote: admission is an O(1) local predicate, |
| 6 | +and cross-node agreement on the per-slot input set is established afterwards by |
| 7 | +a separate layer. |
| 8 | + |
| 9 | +These specifications model that structure. They are the formal counterpart of a |
| 10 | +running implementation; the implementation itself is not part of this |
| 11 | +contribution. |
| 12 | + |
| 13 | +## Two admission modes |
| 14 | + |
| 15 | +The protocol has two admission rules, and the difference is one operator. |
| 16 | + |
| 17 | +| module | rule | meaning | |
| 18 | +| --- | --- | --- | |
| 19 | +| `Vortex_DSE_CSlot` | `m.cslot <= current_slot` | the default. A message stamped for slot *k* that arrives late is still admitted, into slot *k*. Nothing is dropped. | |
| 20 | +| `Vortex_DSE_CSlot_TTL` | `m.cslot = current_slot` | an opt-in bounded-memory mode. A message that misses its slot is rejected permanently, so state does not grow behind the frontier. | |
| 21 | + |
| 22 | +Both modes are specified because both are implemented; the strict rule is a |
| 23 | +memory concession, not a stronger version of the protocol. |
| 24 | + |
| 25 | +## Modules |
| 26 | + |
| 27 | +| module | what it adds | |
| 28 | +| --- | --- | |
| 29 | +| `Vortex_DSE_CSlot` | admission, crash and rejoin via a persisted snapshot | |
| 30 | +| `Vortex_DSE_CSlot_Proofs` | `TypeCorrect`, `NoFutureAdmissionCorrect` | |
| 31 | +| `Vortex_DSE_CSlot_ExactlyOnce_Proof` | `StrictExactlyOnceCorrect` | |
| 32 | +| `Vortex_DSE_CSlot_TTL` | the strict admission mode | |
| 33 | +| `Vortex_DSE_CSlot_Skew` | replaces the single global slot with a per-node clock, plus Byzantine injection of forged slot stamps and origins | |
| 34 | +| `Vortex_DSE_CSlot_AE` | the agreement layer: `Freeze`, `Reconcile`, `Commit` over the strict mode | |
| 35 | +| `Vortex_DSE_CSlot_AE_Proofs` | deductive proofs for the agreement layer | |
| 36 | + |
| 37 | +`Vortex_DSE_CSlot_AE` is specified over the strict admission rule; it is not a |
| 38 | +refinement of the default mode. Extending it to the late-tolerant rule requires |
| 39 | +restating what "no reordering across slots" means, and is not done here. |
| 40 | + |
| 41 | +## What is checked |
| 42 | + |
| 43 | +All TLAPS proofs discharge under `tlapm --strict`, which fails on unproved |
| 44 | +obligations and on proof steps left open — a plain `tlapm` invocation exits 0 |
| 45 | +in both cases. There are no `OMITTED` steps in these modules. |
| 46 | + |
| 47 | +| | obligations | |
| 48 | +| --- | --- | |
| 49 | +| `Vortex_DSE_CSlot_Proofs` | 194 | |
| 50 | +| `Vortex_DSE_CSlot_ExactlyOnce_Proof` | 131 | |
| 51 | +| `Vortex_DSE_CSlot_AE_Proofs` | 34 | |
| 52 | + |
| 53 | +Every model completes in a few seconds. `Vortex_DSE_CSlot_AE` also carries |
| 54 | +Apalache type annotations, but no symbolic model is registered here; the models |
| 55 | +below are TLC only. |
| 56 | + |
| 57 | +## Scope |
| 58 | + |
| 59 | +`Vortex_DSE_CSlot_Skew` bounds pairwise clock skew structurally, by forbidding |
| 60 | +any tick that would breach the bound. It states the assumption; it does not |
| 61 | +model the mechanism that maintains it. Likewise `Reconcile` is a single atomic |
| 62 | +step at specification level — the multi-round protocol underneath is out of |
| 63 | +scope here. |
| 64 | + |
| 65 | +Source repositories, including the whitepaper and the model-checking logs: |
| 66 | +<https://github.com/vasilisnasopoulos> |
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