MCS file parsing error.

[pkuzmin]

I am trying to write an MCS file to SPI flash on custom boards with Xilinx FPGA. Firmware size or verification errors occur. There are no errors when writing the original BIT file to the flash.

$ ./build/openFPGALoader -V
openFPGALoader v1.0.0

Write to the Spartan3e board. When writing MCS - end_addr: 00080000 and the check failed. If I write BIT - end_addr: 00030000

$ OPENFPGALOADER_SOJ_DIR=./spiOverJtag ./build/openFPGALoader -c digilent_hs2 --fpga-part xc3s250evq100 -f 1/fpga_xc3s.mcs --verify
empty
write to flash
Jtag frequency : requested 6.00MHz    -> real 6.00MHz   
Open file DONE
Parse file DONE
Use: ./spiOverJtag/spiOverJtag_xc3s250evq100.bit.gz
Load SRAM: [==================================================] 100.00%
Done
jtag_chain_len: 1
SOJ version: 1.000000
Detail: 
Jedec ID          : 20
memory type       : 20
memory capacity   : 12
flash chip unknown: use basic protection detection
start addr: 00000000, end_addr: 00080000
Erasing: [==================================================] 100.00%
Done
Writing: [==================================================] 100.00%
Done
Verifying write (May take time)
Reading: [==================================================] 100.00%
Fail
Verification failed at 0

$ OPENFPGALOADER_SOJ_DIR=./spiOverJtag ./build/openFPGALoader -c digilent_hs2 --fpga-part xc3s250evq100 -f 1/fpga_xc3s.bit --verify
empty
write to flash
Jtag frequency : requested 6.00MHz    -> real 6.00MHz   
Open file DONE
Parse file DONE
Use: ./spiOverJtag/spiOverJtag_xc3s250evq100.bit.gz
Load SRAM: [==================================================] 100.00%
Done
jtag_chain_len: 1
SOJ version: 1.000000
Detail: 
Jedec ID          : 20
memory type       : 20
memory capacity   : 12
flash chip unknown: use basic protection detection
start addr: 00000000, end_addr: 00030000
Erasing: [==================================================] 100.00%
Done
Writing: [==================================================] 100.00%
Done
Verifying write (May take time)
Reading: [==================================================] 100.00%
Done

Write to the Kintex7 board.

$ OPENFPGALOADER_SOJ_DIR=./spiOverJtag ./build/openFPGALoader -c digilent_hs2 --fpga-part xc7k410tffg900 -f 1/fpga_xc7t.mcs --verify
empty
write to flash
Jtag frequency : requested 6.00MHz    -> real 6.00MHz   
Open file DONE
Parse file DONE
Use: ./spiOverJtag/spiOverJtag_xc7k410tffg900.bit.gz
load program
Load SRAM: [==================================================] 100.00%
Done
Shift IR 35
ir: 1 isc_done 1 isc_ena 0 init 1 done 1
jtag_chain_len: 1
SOJ version: 2.000000
JEDEC ID: 0x20bb18
Detected: micron MT25/N25Q128_1_8V 256 sectors size: 128Mb
flash overflow

$ OPENFPGALOADER_SOJ_DIR=./spiOverJtag ./build/openFPGALoader -c digilent_hs2 --fpga-part xc7k410tffg900 -f 1/fpga_xc7t.bit --verify
empty
write to flash
Jtag frequency : requested 6.00MHz    -> real 6.00MHz   
Open file DONE
Parse file DONE
Use: ./spiOverJtag/spiOverJtag_xc7k410tffg900.bit.gz
load program
Load SRAM: [==================================================] 100.00%
Done
Shift IR 35
ir: 1 isc_done 1 isc_ena 0 init 1 done 1
jtag_chain_len: 1
SOJ version: 2.000000
JEDEC ID: 0x20bb18
Detected: micron MT25/N25Q128_1_8V 256 sectors size: 128Mb
00000000 00000000 00000000 00
start addr: 00000000, end_addr: 00680000
Erasing: [==================================================] 100.00%
Done
Writing: [==================================================] 100.00%
Done
Verifying write (May take time)
Reading: [==================================================] 100.00%
Done

When I restored src/mcsParser.cpp from release 0.13.1 and rebuild the project, then there are no errors and the MCS file is successfully written to flash.

$ git checkout tags/v0.13.1 src/mcsParser.cpp
Updated 1 path from 3378212

$ cmake --build build
[  1%] Building CXX object CMakeFiles/openFPGALoader.dir/src/mcsParser.cpp.o
[  3%] Linking CXX executable openFPGALoader
[100%] Built target openFPGALoader
[100%] Built target bit

$ OPENFPGALOADER_SOJ_DIR=./spiOverJtag ./build/openFPGALoader -c digilent_hs2 --fpga-part xc3s250evq100 -f 1/fpga_xc3s.mcs --verify
empty
write to flash
Jtag frequency : requested 6.00MHz    -> real 6.00MHz   
Open file DONE
Parse file DONE
Use: ./spiOverJtag/spiOverJtag_xc3s250evq100.bit.gz
Load SRAM: [==================================================] 100.00%
Done
jtag_chain_len: 1
SOJ version: 1.000000
Detail: 
Jedec ID          : 20
memory type       : 20
memory capacity   : 12
flash chip unknown: use basic protection detection
start addr: 00000000, end_addr: 00030000
Erasing: [==================================================] 100.00%
Done
Writing: [==================================================] 100.00%
Done
Verifying write (May take time)
Reading: [==================================================] 100.00%
Done

$ OPENFPGALOADER_SOJ_DIR=./spiOverJtag ./build/openFPGALoader -c digilent_hs2 --fpga-part xc7k410tffg900 -f 1/fpga_xc7t.mcs --verify
empty
write to flash
Jtag frequency : requested 6.00MHz    -> real 6.00MHz   
Open file DONE
Parse file DONE
Use: ./spiOverJtag/spiOverJtag_xc7k410tffg900.bit.gz
load program
Load SRAM: [==================================================] 100.00%
Done
Shift IR 35
ir: 1 isc_done 1 isc_ena 0 init 1 done 1
jtag_chain_len: 1
SOJ version: 2.000000
JEDEC ID: 0x20bb18
Detected: micron MT25/N25Q128_1_8V 256 sectors size: 128Mb
00000000 00000000 00000000 00
start addr: 00000000, end_addr: 00680000
Erasing: [==================================================] 100.00%
Done
Writing: [==================================================] 100.00%
Done
Verifying write (May take time)
Reading: [==================================================] 100.00%
Done

Best regards,
Pavel

[djmsip]

I has similar problem, I could not understand why the size was wrong. I have submitted a pull request to fix this issue.
#592

[trabucayre]

Sorry foir the delay, and missed the PR. I have added a patch serie to simplify/improve mcs parser. It now keep the idea of sections.
spiFlash, spiInterface, lattice and xilinx class have also been updated to uses vector of data sections.
Not only this approach fixes potential issues with mcs and reduces flash programming time by only writing required part instead of the full flash.