@@ -281,8 +281,19 @@ Compare via `ImageTestRunner` (stops at `LD B,B`). Not in CI yet — most still
281281- Sprite-related conflicts (m3_bgp_change_sprites 992, m3_obp0_change 432 diffs
282282 at x=0..1, obj_en/size 146-390): SameBoy's DMG_LCDC obj_en special cases
283283 (position_in_line==0, during_object_fetch) not implemented.
284- - Window tests (m2_win_en_toggle, m3_lcdc_win_en_change_multiple* , wx_ * ): not
285- yet analysed; disable_window_pixel_insertion_glitch in SameBoy is the model.
284+ - Window: SameBoy's activation model is ported (uint8-wrapped WX==position+7,
285+ WX=0 specials, CGB accepts 166, line counter increments AT activation from -1);
286+ m2_win_en_toggle is pixel-perfect on DMG and CGB. Still open: the CGB fails
287+ m3_wx_4/5/6_change wholesale - the CGB's WX conflict class is WRITE_CPU (one
288+ T-cycle later than DMG's WX_DMG), unmodeled; also SameBoy's insert_bg_pixel /
289+ cgb_wx_glitch fetch corruptions are not implemented.
290+ - CGB: ColorPixelFifo resolves at the output stage (OUTPUT_DELAY=6, no mixes) and
291+ applies BGP/OBPx remapping in DMG-compat mode. CGB baselines vs "CPU CGB D"
292+ photos need FAST_FORWARD boot (SKIP lacks the compat palettes); compare at
293+ 5 bits - photos expand (c<<3)|(c>>2), we use c* 8. The 7 CGB-native * 2 variants
294+ (only "CPU CGB C" photos) are unanalysed. Demotronic (#45 ) renders 2 of 4 probe
295+ frames pixel-exact vs SameBoy (boot offset is 196 frames, not 186); the rest
296+ differ only at the per-scanline wave edges (m3_scx/scy family).
286297- SameBoy's conflict maps live in Core/sm83_cpu.c (dmg_conflict_map + the
287298 GB_CONFLICT_ * cases); their per-register apply offsets are relative to a
288299 baseline 4 T before our CPU write commit tick.
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