diff --git a/examples/example/cdsl/ExampleFP32.core_desc b/examples/example/cdsl/ExampleFP32.core_desc
new file mode 100644
index 00000000..f660df87
--- /dev/null
+++ b/examples/example/cdsl/ExampleFP32.core_desc
@@ -0,0 +1,27 @@
+import "../../common/cdsl/rv_base/RVF.core_desc"
+
+// InstructionSet XExample extends RISCVBase {
+InstructionSet XExampleFP32 extends RV32F {
+  functions {
+    extern unsigned<32> llvm_uitofp_fp32(unsigned<32>);
+    extern unsigned<32> llvm_fadd_fp32(unsigned<32>, unsigned<32>);
+    extern unsigned<32> llvm_fdiv_fp32(unsigned<32>, unsigned<32>);
+    extern unsigned<32> llvm_fmuladd_fp32(unsigned<32>, unsigned<32>, unsigned<32>);
+  }
+  instructions {
+    MEAN {
+      encoding: 7'b0101000 :: rs2[4:0] :: rs1[4:0] :: 3'b011 :: rd[4:0] :: 7'b0101011;
+      assembly: "{fname(rd)}, {fname(rs1)}, {fname(rs2)}";
+      behavior: {
+        F[rd] = llvm_fdiv_fp32(llvm_fadd_fp32(F[rs1], F[rs2]), llvm_uitofp_fp32(2));
+      }
+    }
+    MAC {
+      encoding: 7'b0101000 :: rs2[4:0] :: rs1[4:0] :: 3'b011 :: rd[4:0] :: 7'b0101011;
+      assembly: "{fname(rd)}, {fname(rs1)}, {fname(rs2)}";
+      behavior: {
+        F[rd] = llvm_fmuladd_fp32(F[rs1], F[rs2], F[rd]);
+      }
+    }
+  }
+}
diff --git a/examples/fp32_demo.py b/examples/fp32_demo.py
new file mode 100644
index 00000000..ba21ad97
--- /dev/null
+++ b/examples/fp32_demo.py
@@ -0,0 +1,49 @@
+#
+# Copyright (c) 2023 TUM Department of Electrical and Computer Engineering.
+#
+# This file is part of Seal5.
+# See https://github.com/tum-ei-eda/seal5.git for further info.
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+#     http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+# See the License for the specific language governing permissions and
+# limitations under the License.
+#
+"""Demo script for the Seal5 Flow."""
+import os
+
+# import logging
+from pathlib import Path
+
+from seal5.wrapper import run_seal5_flow
+from seal5.logging import set_log_level
+
+# set_log_level(console_level=logging.DEBUG, file_level=logging.DEBUG)
+set_log_level(console_level="DEBUG", file_level="DEBUG")
+
+EXAMPLES_DIR = Path(os.path.dirname(os.path.realpath(__file__)))
+DEST_DIR = os.environ.get("DEST_DIR", "/tmp")
+DEST = os.environ.get("DEST", DEST_DIR + "/seal5_llvm_fp32").rstrip("/")
+
+FILES = [
+    # CoreDSL inputs
+    EXAMPLES_DIR / "example" / "cdsl" / "ExampleFP32.core_desc",
+    # Test inputs
+    # YAML inputs
+    EXAMPLES_DIR / "common" / "cfg" / "llvm.yml",
+    EXAMPLES_DIR / "common" / "cfg" / "filter.yml",
+    EXAMPLES_DIR / "common" / "cfg" / "patches.yml",
+    EXAMPLES_DIR / "common" / "cfg" / "tests.yml",
+    EXAMPLES_DIR / "common" / "cfg" / "passes.yml",
+    EXAMPLES_DIR / "common" / "cfg" / "git.yml",
+    # EXAMPLES_DIR / "example" / "cfg" / "XExampleFP32.yml",
+    # EXAMPLES_DIR / "example" / "cfg" / "intrinsicsFP32.yml",
+]
+run_seal5_flow(FILES, name="fp32", dest=DEST)