Add memory concept

[snowleopard]

Let's discuss possible approaches here.

Regardless of how we eventually implement the memory concept, it has to introduce new signal(s) or expand the state space in another way. Otherwise, if the state space is not affected, we will not be able to distinguish states with encoding conflicts.

The most natural way to expand the state space is to introduce a new signal, just like this is done with CSC resolution methods working at the STG level.

Newly introduced signals may be hidden from the rest of the system, so that other concepts could not directly affect their behaviour. The memory concept will be solely in charge of the associated signals.

[jrbeaumont]

While we have discussed some memory for constructs such as a toggle circuit, I have done some work with a VME bus controller, specifically on paper, with the read and write cycles separately, attempting to find where CSC conflicts arise, and how to correct these by introducing internal signals, and then how these could be automatically detected.

Combining these has proven to be a little more difficult, but it could be possible to combine the separate cycle scenarios before adding any CSC conflict resolution, and then re-detect and correct any conflicts.

Either way, this proves to be very different to the hypothetical working of a toggle concept, and while I hoped that working with the VME bus controller might be revealing for the possible implementation of a toggle circuit, I feel a toggle circuit may need a separate implementation.

We have a meeting later this week in which I will present my findings with the VME bus controller, or as mentioned in another issue, we can set up a separate meeting if you wish with this and issue #21 as the main focus.