Which documentation or standards exist for this interface?
https://en.wikipedia.org/wiki/Pulse-width_modulation
Is there a trait describing this interface?
https://docs.rs/embedded-hal/latest/embedded_hal/pwm/trait.SetDutyCycle.html
Which HALs and chips have support for this interface?
Almost everyone
Can this interface be simulated with PIO or bit-banging?
Yes, plenty
Does this interface require special hardware, apart of normal GPIO connections?
No
Which cases should the new tests cover?
set duty cycle
Which documentation or standards exist for this interface?
https://en.wikipedia.org/wiki/Pulse-width_modulation
Is there a
traitdescribing this interface?https://docs.rs/embedded-hal/latest/embedded_hal/pwm/trait.SetDutyCycle.html
Which HALs and chips have support for this interface?
Almost everyone
Can this interface be simulated with PIO or bit-banging?
Yes, plenty
Does this interface require special hardware, apart of normal GPIO connections?
No
Which cases should the new tests cover?
set duty cycle