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jerryz123jerryz123
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Merge pull request #1928 from ucb-bar/vector-release
Integrate vector unit
2 parents 1f1b531 + 63e72b2 commit 5929221

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‎.github/actions/run-tests/action.yml‎

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- name: Init submodules (since only the RTL is cached)
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run: |
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conda activate ${{ env.conda-env-name-no-time }}-$(date --date "${{ env.workflow-timestamp }}" +%Y%m%d)
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git submodule sync
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./scripts/init-submodules-no-riscv-tools.sh
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shell: bash -leo pipefail {0}
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‎.github/scripts/check-commit.sh‎

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}
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submodules=("cva6" "boom" "ibex" "gemmini" "icenet" "nvdla" "rocket-chip" "rocket-chip-blocks" "rocket-chip-inclusive-cache" "testchipip" "riscv-sodor" "mempress" "bar-fetchers" "shuttle" "constellation" "fft-generator" "hardfloat" "caliptra-aes-acc" "rocc-acc-utils" "diplomacy" "rerocc" "compress-acc")
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submodules=("cva6" "boom" "ibex" "gemmini" "icenet" "nvdla" "rocket-chip" "rocket-chip-blocks" "rocket-chip-inclusive-cache" "testchipip" "riscv-sodor" "mempress" "bar-fetchers" "shuttle" "constellation" "fft-generator" "hardfloat" "caliptra-aes-acc" "rocc-acc-utils" "diplomacy" "rerocc" "compress-acc" "saturn")
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dir="generators"
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branches=("master" "main" "dev")
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search

‎.github/scripts/defaults.sh‎

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@@ -27,7 +27,7 @@ REMOTE_COURSIER_CACHE=$REMOTE_WORK_DIR/.coursier-cache
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declare -A grouping
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grouping["group-cores"]="chipyard-cva6 chipyard-ibex chipyard-rocket chipyard-hetero chipyard-boomv3 chipyard-boomv4 chipyard-sodor chipyard-digitaltop chipyard-multiclock-rocket chipyard-nomem-scratchpad chipyard-spike chipyard-clone chipyard-prefetchers chipyard-shuttle"
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grouping["group-peripherals"]="chipyard-dmirocket chipyard-dmiboomv3 chipyard-dmiboomv4 chipyard-spiflashwrite chipyard-mmios chipyard-nocores chipyard-manyperipherals chipyard-chiplike chipyard-tethered chipyard-symmetric chipyard-llcchiplet"
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grouping["group-accels"]="chipyard-compressacc chipyard-mempress chipyard-gemmini chipyard-manymmioaccels chipyard-nvdla chipyard-aes256ecb chipyard-rerocc"
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grouping["group-accels"]="chipyard-compressacc chipyard-mempress chipyard-gemmini chipyard-manymmioaccels chipyard-nvdla chipyard-aes256ecb chipyard-rerocc chipyard-rocketvector chipyard-shuttlevector"
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grouping["group-constellation"]="chipyard-constellation"
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grouping["group-tracegen"]="tracegen tracegen-boomv3 tracegen-boomv4"
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grouping["group-other"]="icenet testchipip constellation rocketchip-amba rocketchip-tlsimple rocketchip-tlwidth rocketchip-tlxbar chipyard-clusters"
@@ -71,6 +71,8 @@ mapping["chipyard-constellation"]=" CONFIG=SharedNoCConfig"
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mapping["chipyard-clusters"]=" CONFIG=ClusteredRocketConfig verilog"
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mapping["chipyard-aes256ecb"]=" CONFIG=AES256ECBRocketConfig"
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mapping["chipyard-rerocc"]=" CONFIG=ReRoCCTestConfig"
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mapping["chipyard-rocketvector"]=" CONFIG=MINV128D64RocketConfig"
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mapping["chipyard-shuttlevector"]=" CONFIG=GENV256D128ShuttleConfig"
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mapping["constellation"]=" SUB_PROJECT=constellation"
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mapping["firesim"]="TARGET_CONFIG=WithNIC_DDR3FRFCFSLLC4MB_FireSimRocketConfig"

‎.github/scripts/remote-do-rtl-build.sh‎

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source $SCRIPT_DIR/defaults.sh
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cd $REMOTE_CHIPYARD_DIR
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git submodule sync
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./scripts/init-submodules-no-riscv-tools.sh
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# Constellation can run without espresso, but this improves

‎.github/scripts/run-tests.sh‎

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make -C $LOCAL_CHIPYARD_DIR/generators/rerocc/tests
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run_binary BINARY=$LOCAL_CHIPYARD_DIR/generators/rerocc/tests/rerocc.riscv LOADMEM=1
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;;
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chipyard-rocketvector|chipyard-shuttlevector)
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run_binary BINARY=$RISCV/riscv64-unknown-elf/share/riscv-tests/benchmarks/vec-sgemm.riscv LOADMEM=1
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run_binary BINARY=$RISCV/riscv64-unknown-elf/share/riscv-tests/benchmarks/vec-strcmp.riscv LOADMEM=1
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run_binary BINARY=$RISCV/riscv64-unknown-elf/share/riscv-tests/benchmarks/vec-daxpy.riscv LOADMEM=1
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run_binary BINARY=$RISCV/riscv64-unknown-elf/share/riscv-tests/benchmarks/vec-memcpy.riscv LOADMEM=1
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;;
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tracegen)
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run_tracegen
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;;

‎.github/workflows/chipyard-full-flow.yml‎

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# temporary directories should be located in /scratch (since it's larger)
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REMOTE_WORK_DIR: /scratch/buildbot/cy-ci-shared/cy-workdir-${{ github.sha }}
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JAVA_TMP_DIR: /scratch/buildbot/cy-ci-shared/cy-javatmpdir-${{ github.sha }}
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GIT_SSH_COMMAND: "ssh -v"
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jobs:
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cancel-prior-workflows:
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eval "$(conda shell.bash hook)"
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mkdir ${{ env.JAVA_TMP_DIR }}
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export MAKEFLAGS="-j32"
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git submodule sync
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./build-setup.sh -v
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- name: Run config finder
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run: |

‎.github/workflows/chipyard-run-tests.yml‎

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group-key: "group-accels"
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project-key: "chipyard-rerocc"
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chipyard-rocketvector-run-tests:
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name: chipyard-rocketvector-run-tests
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needs: prepare-chipyard-accels
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runs-on: as4
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steps:
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- name: Delete old checkout
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run: |
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ls -alh .
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rm -rf ${{ github.workspace }}/* || true
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rm -rf ${{ github.workspace }}/.* || true
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ls -alh .
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- name: Checkout
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uses: actions/checkout@v3
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- name: Git workaround
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uses: ./.github/actions/git-workaround
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- name: Create conda env
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uses: ./.github/actions/create-conda-env
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- name: Run tests
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uses: ./.github/actions/run-tests
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with:
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group-key: "group-accels"
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project-key: "chipyard-rocketvector"
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chipyard-shuttlevector-run-tests:
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name: chipyard-shuttlevector-run-tests
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needs: prepare-chipyard-accels
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runs-on: as4
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steps:
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- name: Delete old checkout
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run: |
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ls -alh .
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rm -rf ${{ github.workspace }}/* || true
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rm -rf ${{ github.workspace }}/.* || true
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ls -alh .
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- name: Checkout
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uses: actions/checkout@v3
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- name: Git workaround
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uses: ./.github/actions/git-workaround
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- name: Create conda env
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uses: ./.github/actions/create-conda-env
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- name: Run tests
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uses: ./.github/actions/run-tests
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with:
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group-key: "group-accels"
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project-key: "chipyard-shuttlevector"
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chipyard-gemmini-run-tests:
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name: chipyard-gemmini-run-tests
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needs: prepare-chipyard-accels
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chipyard-symmetric-run-tests,
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chipyard-llcchiplet-run-tests,
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chipyard-rerocc-run-tests,
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chipyard-rocketvector-run-tests,
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chipyard-shuttlevector-run-tests,
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chipyard-gemmini-run-tests,
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chipyard-manymmioaccels-run-tests, # chipyard-nvdla-run-tests,
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chipyard-prefetchers-run-tests,

‎.gitmodules‎

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url = https://github.com/ucb-bar/rerocc.git
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[submodule "generators/compress-acc"]
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path = generators/compress-acc
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url = https://github.com/ucb-bar/compress-acc.git
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url = https://github.com/ucb-bar/compress-acc.git
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[submodule "generators/saturn"]
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path = generators/saturn
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url = https://github.com/ucb-bar/saturn-vectors.git

‎build.sbt‎

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dsptools, rocket_dsp_utils,
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gemmini, icenet, tracegen, cva6, nvdla, sodor, ibex, fft_generator,
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constellation, mempress, barf, shuttle, caliptra_aes, rerocc,
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compressacc)
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compressacc, saturn)
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.settings(libraryDependencies ++= rocketLibDeps.value)
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.settings(
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libraryDependencies ++= Seq(
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.settings(libraryDependencies ++= rocketLibDeps.value)
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.settings(commonSettings)
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lazy val saturn = (project in file("generators/saturn"))
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.dependsOn(rocketchip, shuttle)
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.settings(libraryDependencies ++= rocketLibDeps.value)
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.settings(commonSettings)
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lazy val constellation = (project in file("generators/constellation"))
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.dependsOn(rocketchip)
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.settings(libraryDependencies ++= rocketLibDeps.value)

‎docs/Generators/Saturn.rst‎

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Saturn
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========
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Saturn is a parameterized RISC-V Vector Unit generator currently supporting integration with the Rocket and Shuttle cores.
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Saturn implements a compact short-vector-length vector microarchitecture suitable for deployment in a DSP-optimized core or area-efficient general-purpose core.
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More documentation on Saturn will be released in the future.
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* Full support for `V` application-profile RVV 1.0
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* Precise traps with virtual memory
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* Indexed/strided/segmented loads and stores
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* Mask operations
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* Register-gather + reductions
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* `Zvfh` support for vector half-precision floating-point (FP16)
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* `Zve64d` support for vector FP32 and FP64
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* Configurable vector length, from `Zvl64b` up (tested to `Zvl4096b`)
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* Configurable datapath width, from 64b up (tested to 512b)
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