1 file changed
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-1
lines changedSubmodule riscv-isa-sim updated 90 files
- Makefile.in+1-1
- README.md+3
- ci-tests/atomics.c+20
- ci-tests/build-spike+1-1
- ci-tests/create-ci-binary-tarball+8-2
- ci-tests/test-spike+1
- customext/cflush.cc+9-9
- debug_rom/debug_rom.S+47-11
- debug_rom/debug_rom.h+22-10
- disasm/disasm.cc-20
- disasm/isa_parser.cc+45-11
- fdt/fdt.mk.in+1-1
- fesvr/byteorder.h+2-2
- fesvr/dtm.cc+22-21
- fesvr/dtm.h-2
- fesvr/htif.cc+5-8
- fesvr/memif.cc+14-14
- fesvr/syscall.cc+8-4
- riscv/abstract_device.h+7
- riscv/cfg.cc+1
- riscv/cfg.h+3
- riscv/clint.cc+7-5
- riscv/csr_init.cc+190-20
- riscv/csrs.cc+377-27
- riscv/csrs.h+102-4
- riscv/debug_module.cc+1-2
- riscv/decode.h+11
- riscv/decode_macros.h+7-8
- riscv/devices.cc+22
- riscv/devices.h+19
- riscv/dts.cc-1
- riscv/encoding.h+45-6
- riscv/execute.cc+16-11
- riscv/insns/fli_h.h+1-1
- riscv/insns/vcompress_vm.h+1-5
- riscv/insns/vcpop_m.h+2-10
- riscv/insns/vfbdot_vv.h+13
- riscv/insns/vfirst_m.h+1-2
- riscv/insns/vfmv_f_s.h+1-7
- riscv/insns/vfmv_s_f.h+1-8
- riscv/insns/vfwbdot_vv.h+17
- riscv/insns/vghsh_vv.h+4
- riscv/insns/vgmul_vv.h+4
- riscv/insns/viota_m.h+10-15
- riscv/insns/vmandn_mm.h+1-1
- riscv/insns/vmnand_mm.h+1-1
- riscv/insns/vmnor_mm.h+1-1
- riscv/insns/vmorn_mm.h+1-1
- riscv/insns/vmsbf_m.h+6-11
- riscv/insns/vmsif_m.h+7-11
- riscv/insns/vmsof_m.h+6-10
- riscv/insns/vmxnor_mm.h+1-1
- riscv/insns/vqbdots_vv.h+23
- riscv/insns/vqbdotu_vv.h+23
- riscv/insns/vsm3c_vi.h+1
- riscv/insns/vsm3me_vv.h+1
- riscv/insns/vsm4k_vi.h+1
- riscv/insns/vsm4r_vs.h+3-1
- riscv/insns/vsm4r_vv.h+2
- riscv/insns/vsra_vi.h+1-1
- riscv/insns/vssra_vi.h+2-2
- riscv/insns/vssrl_vi.h+1-1
- riscv/insns/vwsll_vi.h+1
- riscv/insns/vwsll_vv.h+1
- riscv/insns/vwsll_vx.h+1
- riscv/interactive.cc+12-15
- riscv/isa_parser.h+10
- riscv/mmu.cc+160-90
- riscv/mmu.h+83-66
- riscv/ns16550.cc+7-7
- riscv/plic.cc+7-5
- riscv/processor.cc+89-105
- riscv/processor.h+20-6
- riscv/riscv.mk.in+9
- riscv/rocc.cc+5-13
- riscv/sim.cc+12-16
- riscv/triggers.cc+6-3
- riscv/triggers.h+1-1
- riscv/v_ext_macros.h+98-88
- riscv/vector_unit.cc+18-8
- riscv/vector_unit.h+26-35
- riscv/zvk_ext_macros.h+26
- riscv/zvkned_ext_macros.h+15-1
- riscv/zvknh_ext_macros.h+1
- riscv/zvksed_ext_macros.h+3
- riscv/zvksh_ext_macros.h+3
- softfloat/fall_maxmin.c+6-6
- softfloat/softfloat.mk.in+2
- spike_main/spike-log-parser.cc-1
- spike_main/spike.cc+1-1
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