Use SBT-driven source discovery instead of symlinks

Author: jerryz123

build.sbt

@@ -154,37 +154,49 @@ lazy val testchipip = (project in file("generators/testchipip"))
   .settings(commonSettings)
 
 lazy val chipyard = {
-  var chipyard = (project in file("generators/chipyard"))
-    .dependsOn(testchipip, rocketchip, boom, rocketchip_blocks, rocketchip_inclusive_cache,
+  // Base chipyard project with always-on dependencies
+  // Use explicit Project(...) so the project id remains 'chipyard'
+  var cy = Project(id = "chipyard", base = file("generators/chipyard"))
+    .dependsOn(
+      testchipip, rocketchip, boom, rocketchip_blocks, rocketchip_inclusive_cache,
       dsptools, rocket_dsp_utils,
       radiance, gemmini, icenet, tracegen, cva6, nvdla, sodor, ibex, fft_generator,
       constellation, barf, shuttle, rerocc,
-      saturn, firrtl2_bridge, vexiiriscv, tacit)
+      firrtl2_bridge, vexiiriscv, tacit
+    )
     .settings(libraryDependencies ++= rocketLibDeps.value)
     .settings(
-    libraryDependencies ++= Seq(
-      "org.reflections" % "reflections" % "0.10.2"
+      libraryDependencies ++= Seq(
+        "org.reflections" % "reflections" % "0.10.2"
+      )
     )
+    .settings(commonSettings)
+    .settings(Compile / unmanagedSourceDirectories += file("tools/stage/src/main/scala"))
+
+  // Optional modules discovered via initialized submodules (no env or manifest)
+  val optionalModules: Seq[(String, ProjectReference)] = Seq(
+    "ara" -> ara,
+    "saturn" -> saturn,
+    "caliptra-aes-acc" -> caliptra_aes,
+    "compress-acc" -> compressacc,
+    "mempress" -> mempress
   )
-  .settings(commonSettings)
-  .settings(Compile / unmanagedSourceDirectories += file("tools/stage/src/main/scala"))
-
-  val includeAra = file("generators/ara/.git").exists()
-  if (includeAra) chipyard = chipyard.dependsOn(ara)
 
-  val includeCaliptraAes = file("generators/caliptra-aes-acc/.git").exists()
-  if (includeCaliptraAes) chipyard = chipyard.dependsOn(caliptra_aes)
+  val discovered = optionalModules.filter { case (dir, _) => (file(s"generators/$dir/.git")).exists }
 
-  val includeCompressAcc = file("generators/compress-acc/.git").exists()
-  if (includeCompressAcc) chipyard = chipyard.dependsOn(compressacc)
-
-  val includeMempress = file("generators/mempress/.git").exists()
-  if (includeMempress) chipyard = chipyard.dependsOn(mempress)
+  // Wire in project dependencies only for discovered modules
+  if (discovered.nonEmpty) {
+    // dependsOn requires ClasspathDep[ProjectReference]; wrap explicitly
+    cy = cy.dependsOn(discovered.map { case (_, pr) => sbt.ClasspathDependency(pr, None) }: _*)
+  }
 
-  val includeSaturn = file("generators/saturn/.git").exists()
-  if (includeSaturn) chipyard = chipyard.dependsOn(saturn)
+  // Also add their Chipyard-facing sources without symlinks
+  cy.settings(
+    Compile / unmanagedSourceDirectories ++=
+      discovered.map { case (dir, _) => baseDirectory.value / s"generators/$dir/chipyard" }.filter(_.exists)
+  )
 
-  chipyard
+  cy
 }
 
 lazy val compressacc = (project in file("generators/compress-acc"))

common.mk

@@ -67,11 +67,14 @@ HELP_COMMANDS += \
 #########################################################################################
 include $(base_dir)/generators/tracegen/tracegen.mk
 include $(base_dir)/tools/torture.mk
+# Optional generator make fragments should not fail build if absent
 -include $(base_dir)/generators/cva6/cva6.mk
 -include $(base_dir)/generators/ibex/ibex.mk
 -include $(base_dir)/generators/ara/ara.mk
 -include $(base_dir)/generators/nvdla/nvdla.mk
 -include $(base_dir)/generators/radiance/radiance.mk
+# Wildcard include for standardized per-generator make fragments
+-include $(wildcard $(base_dir)/generators/*/chipyard.mk)
 
 
 #########################################################################################

docs/Generators/Ara.rst

@@ -3,7 +3,7 @@ Ara
 
 `Ara <https://github.com/pulp-platform/ara>`__ is a RISC-V vector unit developed by the PULP project.
 The Ara vector unit supports integration with either the Rocket or Shuttle in-order cores, following a similar methodology as used in the original Ara+CVA6 system.
-Example Ara configurations are listed in ``generators/chipyard/src/main/scala/config/AraConfigs.scala``.
+Example Ara configurations are provided by the Ara repository and compiled directly from ``generators/ara/chipyard/`` when the Ara submodule is initialized.
 
 .. Warning:: Ara only supports a partial subset of the full V-extension. Notably, we do not support virtual memory or precise traps with Ara.
 

docs/Generators/Saturn.rst

@@ -5,7 +5,7 @@ Saturn is a parameterized RISC-V Vector Unit generator currently supporting inte
 Saturn implements a compact short-vector-length vector microarchitecture suitable for deployment in a DSP-optimized core or area-efficient general-purpose core.
 
 More documentation on Saturn will be released in the future.
-A partial listing of supported Saturn configurations is in ``generators/chipyard/src/main/scala/config/SaturnConfigs.scala``.
+A partial listing of supported Saturn configurations is maintained in the Saturn repository and compiled directly from ``generators/saturn/chipyard/`` when the Saturn submodule is initialized.
 
 For now, the recommended Saturn configuration is ``GENV256D128ShuttleConfig``, which builds a dual-issue core with 256-bit VLEN, 128-bit wide SIMD datapath, and separate floating-point and integer vector issue units.
 
@@ -20,4 +20,3 @@ For now, the recommended Saturn configuration is ``GENV256D128ShuttleConfig``, w
  * ``Zve64d`` support for vector FP32 and FP64
  * Configurable vector length, from ``Zvl64b`` up (tested to ``Zvl4096b``)
  * Configurable datapath width, from 64b up (tested to 512b)
-