needs to actually build verilog

richardyrh · richardyrh · commit abe744e0bb58 · 2025-02-20T15:34:36.000-08:00
diff --git a/.github/scripts/run-tests.sh b/.github/scripts/run-tests.sh
@@ -175,6 +175,7 @@ case $1 in
         ;;
     chipyard-radiance)
         # Verilator fails to build sim binary, just generate verilog
+        run_binary
         ;;
     icenet)
         run_binary BINARY=none
