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2 parents dd2ce08 + 2507ac9 commit ea21d8fCopy full SHA for ea21d8f
generators/firechip/chip/src/main/scala/FireSim.scala
@@ -125,7 +125,8 @@ class FireSim(implicit val p: Parameters) extends RawModule with HasHarnessInsta
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if (p(FireSimMultiCycleRegFile)) ls.totalTiles.values.map {
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case r: RocketTile => {
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annotate(MemModelAnnotation(r.module.core.rocketImpl.rf.rf))
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- r.module.fpuOpt.foreach(fpu => annotate(MemModelAnnotation(fpu.fpuImpl.regfile)))
+ // TODO: currently, fpu mem. model optimizations are broken with model multi-threading so disable for now
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+ //r.module.fpuOpt.foreach(fpu => annotate(MemModelAnnotation(fpu.fpuImpl.regfile)))
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}
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case b: BoomTile => {
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val core = b.module.core
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