@@ -91,12 +91,12 @@ public class RaspberryPWM: PWMOutput {
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let BCM2708_PHY_BASE : Int = 0x7e000000
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let PWM_PHY_BASE : Int
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- var gpioBasePointer : UnsafeMutablePointer < UInt > !
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- var pwmBasePointer : UnsafeMutablePointer < UInt > !
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- var clockBasePointer : UnsafeMutablePointer < UInt > !
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- var dmaBasePointer : UnsafeMutablePointer < UInt > !
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+ var gpioBasePointer : UnsafeMutablePointer < UInt32 > !
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+ var pwmBasePointer : UnsafeMutablePointer < UInt32 > !
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+ var clockBasePointer : UnsafeMutablePointer < UInt32 > !
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+ var dmaBasePointer : UnsafeMutablePointer < UInt32 > !
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var dmaCallbackPointer : UnsafeMutablePointer < DMACallback > ! = nil
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- var pwmRawPointer : UnsafeMutablePointer < UInt > ! = nil
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+ var pwmRawPointer : UnsafeMutablePointer < UInt32 > ! = nil
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var mailbox : MailBox ! = nil
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var zeroPattern : Int = 0
@@ -148,7 +148,7 @@ public class RaspberryPWM: PWMOutput {
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dma_addr -= pageOffset
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let dma_map = UnsafeMutableRawPointer ( memmap ( from: mem_fd, at: dma_addr) )
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- dmaBasePointer = ( dma_map + pageOffset) . assumingMemoryBound ( to: UInt . self)
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+ dmaBasePointer = ( dma_map + pageOffset) . assumingMemoryBound ( to: UInt32 . self)
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close ( mem_fd)
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@@ -165,10 +165,10 @@ public class RaspberryPWM: PWMOutput {
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usleep ( 10 )
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// If the required frequency is too high, this value reduces the number of samples (scale does the opposite)
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- let highFreqSampleReduction : UInt = ( ns < 750 ) ? 10 : 1
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+ let highFreqSampleReduction : UInt32 = ( ns < 750 ) ? 10 : 1
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- let freq : UInt = ( 1_000_000_000 / UInt( ns) ) * 100 / highFreqSampleReduction
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- let ( idiv, scale) = calculateDIVI ( base: . PLLD, desired: freq) //Using the faster (with known freq) available clock to reduce jitter
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+ let freq = UInt32 ( ( 1_000_000_000 / UInt( ns) ) * 100 / UInt ( highFreqSampleReduction) )
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+ let ( idiv, scale) = calculateDIVI ( base: . PLLD, desired: UInt32 ( freq) ) //Using the faster (with known freq) available clock to reduce jitter
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// Configure the clock and divisor that will be used to generate the signal
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clockBasePointer. advanced ( by: 41 ) . pointee = CLKM_PASSWD | ( idiv << CLKM_DIV_DIVI) //CM CTL DIV register: Set DIVI value
@@ -179,7 +179,7 @@ public class RaspberryPWM: PWMOutput {
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let RNG = ( channel == 0 ) ? 4 : 8
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let DAT = ( channel == 0 ) ? 5 : 9
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pwmBasePointer. advanced ( by: RNG) . pointee = 100 * scale / highFreqSampleReduction //RNG1 register
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- pwmBasePointer. advanced ( by: DAT) . pointee = UInt ( ( percent / Float( highFreqSampleReduction) ) * Float( scale) ) //DAT1 register
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+ pwmBasePointer. advanced ( by: DAT) . pointee = UInt32 ( ( percent / Float( highFreqSampleReduction) ) * Float( scale) ) //DAT1 register
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let PWMCTL_MSEN = ( channel == 0 ) ? PWMCTL_MSEN1 : PWMCTL_MSEN2
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let PWMCTL_PWEN = ( channel == 0 ) ? PWMCTL_PWEN1 : PWMCTL_PWEN2
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pwmBasePointer. pointee = PWMCTL_MSEN | PWMCTL_PWEN //PWM CTL register, channel enabled, M/S mode
@@ -190,7 +190,7 @@ public class RaspberryPWM: PWMOutput {
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}
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/// Maps a block of memory and returns the pointer
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- internal func memmap( from mem_fd: Int32 , at offset: Int ) -> UnsafeMutablePointer < UInt > {
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+ internal func memmap( from mem_fd: Int32 , at offset: Int ) -> UnsafeMutablePointer < UInt32 > {
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let m = mmap (
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nil , //Any adddress in our space will do
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PAGE_SIZE, //Map length
@@ -204,17 +204,17 @@ public class RaspberryPWM: PWMOutput {
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perror ( " mmap error " )
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abort ( )
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}
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- let pointer = m. assumingMemoryBound ( to: UInt . self)
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+ let pointer = m. assumingMemoryBound ( to: UInt32 . self)
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return pointer
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}
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/// Set the alternative function for this GPIO
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internal func setAlt( ) {
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- let altid = ( self . alt<= 3 ) ? self . alt+ 4 : self . alt== 4 ? 3 : 2
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+ let altid = ( self . alt<= 3 ) ? UInt32 ( self . alt+ 4 ) : self . alt== 4 ? UInt32 ( 3 ) : UInt32 ( 2 )
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let ptr = gpioBasePointer. advanced ( by: Int ( gpioId/ 10 ) ) // GPFSELn 0..5
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- ptr. pointee &= ~ ( 7 <<( ( gpioId% 10 ) * 3 ) )
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- ptr. pointee |= ( altid<<( ( gpioId% 10 ) * 3 ) )
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+ ptr. pointee &= ~ ( 7 <<( ( UInt32 ( gpioId) % 10 ) * 3 ) )
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+ ptr. pointee |= ( altid<<( ( UInt32 ( gpioId) % 10 ) * 3 ) )
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}
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/// Calculate the DIVI value that will divide the selected base clock frequency to obtain the desired frequency.
@@ -230,9 +230,9 @@ public class RaspberryPWM: PWMOutput {
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///
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/// - Returns: divi divisor value, and scale value as a multiple of ten
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///
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- internal func calculateDIVI( base: ClockSource , desired: UInt ) -> ( divi: UInt , scale: UInt ) {
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- var divi : UInt = base. rawValue/ desired
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- var scale : UInt = 1
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+ internal func calculateDIVI( base: ClockSource , desired: UInt32 ) -> ( divi: UInt32 , scale: UInt32 ) {
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+ var divi : UInt32 = base. rawValue/ desired
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+ var scale : UInt32 = 1
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while divi > 0x800 {
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// Divisor too high (greater then half the limit), would not be generated properly
@@ -255,8 +255,8 @@ public class RaspberryPWM: PWMOutput {
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///
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/// - Returns: divi divisor value
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///
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- internal func calculateUnscaledDIVI( base: ClockSource , desired: UInt ) -> UInt {
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- var divi : UInt = base. rawValue/ desired
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+ internal func calculateUnscaledDIVI( base: ClockSource , desired: UInt32 ) -> UInt32 {
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+ var divi : UInt32 = base. rawValue/ desired
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if divi > 0x1000 {
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// Divisor too high (greater then half the limit), would not be generated properly
@@ -278,7 +278,7 @@ extension RaspberryPWM {
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dmaBasePointer. pointee = DMACS_RESET
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usleep ( 10 )
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dmaBasePointer. pointee = DMACS_INT | DMACS_END
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- dmaBasePointer. advanced ( by: 1 ) . pointee = address //CONBLK_AD
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+ dmaBasePointer. advanced ( by: 1 ) . pointee = UInt32 ( address) //CONBLK_AD //Verify this on 64bit
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dmaBasePointer. advanced ( by: 8 ) . pointee = 7 //DEBUG: clear debug error flags
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dmaBasePointer. pointee = DMACS_WAIT_OUTSTANDING_WRITES | ( 15 << DMACS_PANIC_PRIORITY) | ( 15 << DMACS_PRIORITY) | DMACS_ACTIVE
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}
@@ -340,7 +340,7 @@ extension RaspberryPWM {
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guard let mailbox = mailbox else { fatalError ( " Could allocate mailbox. " ) }
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dmaCallbackPointer = mailbox. baseVirtualAddress. assumingMemoryBound ( to: DMACallback . self)
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- pwmRawPointer = ( mailbox. baseVirtualAddress + MemoryLayout < DMACallback > . stride) . assumingMemoryBound ( to: UInt . self)
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+ pwmRawPointer = ( mailbox. baseVirtualAddress + MemoryLayout < DMACallback > . stride) . assumingMemoryBound ( to: UInt32 . self)
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// Fill PWM buffer with zeros
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let rows = dataSize / MemoryLayout< UInt> . stride
@@ -358,7 +358,7 @@ extension RaspberryPWM {
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//while (clockBasePointer.advanced(by: 40).pointee & (1 << 7)) != 0 {}
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// Configure clock
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- let idiv = calculateUnscaledDIVI ( base: . PLLD, desired: UInt ( symbolBits * patternFrequency) )
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+ let idiv = calculateUnscaledDIVI ( base: . PLLD, desired: UInt32 ( symbolBits * patternFrequency) )
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clockBasePointer. advanced ( by: 41 ) . pointee = CLKM_PASSWD | ( idiv << CLKM_DIV_DIVI) //Set DIVI value
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clockBasePointer. advanced ( by: 40 ) . pointee = CLKM_PASSWD | CLKM_CTL_ENAB | CLKM_CTL_SRC_PLLD //Enable clock, MASH 0, source PLLD
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usleep ( 10 )
@@ -551,34 +551,34 @@ extension RaspberryPWM {
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// MARK: - PWM Contants
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// Constants for the Clock Manager General Purpose Control Register
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- let CLKM_PASSWD : UInt = 0x5A000000
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- let CLKM_CTL_KILL : UInt = ( 1 << 5 )
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- let CLKM_CTL_ENAB : UInt = ( 1 << 4 )
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- let CLKM_CTL_SRC_OSC : UInt = 1 // 19.2 MHz oscillator
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- let CLKM_CTL_SRC_PLLA : UInt = 4 // ~393.216 MHz PLLA (Audio)
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- let CLKM_CTL_SRC_PLLC : UInt = 5 // 1000 MHz PLLC (changes with overclock settings)
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- let CLKM_CTL_SRC_PLLD : UInt = 6 // 500 MHz PLLD
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- let CLKM_CTL_SRC_HDMI : UInt = 7 // 216 MHz HDMI auxiliary
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+ let CLKM_PASSWD : UInt32 = 0x5A000000
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+ let CLKM_CTL_KILL : UInt32 = ( 1 << 5 )
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+ let CLKM_CTL_ENAB : UInt32 = ( 1 << 4 )
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+ let CLKM_CTL_SRC_OSC : UInt32 = 1 // 19.2 MHz oscillator
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+ let CLKM_CTL_SRC_PLLA : UInt32 = 4 // ~393.216 MHz PLLA (Audio)
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+ let CLKM_CTL_SRC_PLLC : UInt32 = 5 // 1000 MHz PLLC (changes with overclock settings)
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+ let CLKM_CTL_SRC_PLLD : UInt32 = 6 // 500 MHz PLLD
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+ let CLKM_CTL_SRC_HDMI : UInt32 = 7 // 216 MHz HDMI auxiliary
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// Constants for the Clock Manager General Purpose Divisors Register
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- let CLKM_DIV_DIVI : UInt = 12
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- let CLKM_DIV_DIVF : UInt = 0
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+ let CLKM_DIV_DIVI : UInt32 = 12
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+ let CLKM_DIV_DIVF : UInt32 = 0
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// Constants for the PWM Control Register
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- let PWMCTL_MSEN2 : UInt = ( 1 << 15 )
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+ let PWMCTL_MSEN2 : UInt32 = ( 1 << 15 )
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// No PWMCTL_CLRF2, the FIFO is shared
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- let PWMCTL_USEF2 : UInt = ( 1 << 13 )
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- let PWMCTL_POLA2 : UInt = ( 1 << 12 )
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- let PWMCTL_SBIT2 : UInt = ( 1 << 11 )
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- let PWMCTL_RPTL2 : UInt = ( 1 << 10 )
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- let PWMCTL_MODE2 : UInt = ( 1 << 9 )
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- let PWMCTL_PWEN2 : UInt = ( 1 << 8 )
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- let PWMCTL_MSEN1 : UInt = ( 1 << 7 )
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- let PWMCTL_CLRF1 : UInt = ( 1 << 6 )
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- let PWMCTL_USEF1 : UInt = ( 1 << 5 )
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- let PWMCTL_POLA1 : UInt = ( 1 << 4 )
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- let PWMCTL_SBIT1 : UInt = ( 1 << 3 )
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- let PWMCTL_RPTL1 : UInt = ( 1 << 2 )
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- let PWMCTL_MODE1 : UInt = ( 1 << 1 )
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- let PWMCTL_PWEN1 : UInt = ( 1 << 0 )
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+ let PWMCTL_USEF2 : UInt32 = ( 1 << 13 )
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+ let PWMCTL_POLA2 : UInt32 = ( 1 << 12 )
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+ let PWMCTL_SBIT2 : UInt32 = ( 1 << 11 )
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+ let PWMCTL_RPTL2 : UInt32 = ( 1 << 10 )
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+ let PWMCTL_MODE2 : UInt32 = ( 1 << 9 )
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+ let PWMCTL_PWEN2 : UInt32 = ( 1 << 8 )
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+ let PWMCTL_MSEN1 : UInt32 = ( 1 << 7 )
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+ let PWMCTL_CLRF1 : UInt32 = ( 1 << 6 )
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+ let PWMCTL_USEF1 : UInt32 = ( 1 << 5 )
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+ let PWMCTL_POLA1 : UInt32 = ( 1 << 4 )
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+ let PWMCTL_SBIT1 : UInt32 = ( 1 << 3 )
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+ let PWMCTL_RPTL1 : UInt32 = ( 1 << 2 )
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+ let PWMCTL_MODE1 : UInt32 = ( 1 << 1 )
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+ let PWMCTL_PWEN1 : UInt32 = ( 1 << 0 )
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// Clock sources
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// 0 0 Hz Ground
@@ -590,7 +590,7 @@ let PWMCTL_PWEN1: UInt = (1 << 0)
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// 6 500 MHz PLLD
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// 7 216 MHz HDMI auxiliary
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// 8-15 0 Hz Ground
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- enum ClockSource : UInt {
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+ enum ClockSource : UInt32 {
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case Oscillator = 19200000
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case PLLA = 393216000
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case PLLC = 1000000000
@@ -599,15 +599,15 @@ enum ClockSource: UInt {
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}
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// DMA Register
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- let DMACS_RESET : UInt = ( 1 << 31 )
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- let DMACS_ABORT : UInt = ( 1 << 30 )
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- let DMACS_WAIT_OUTSTANDING_WRITES : UInt = ( 1 << 28 )
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- let DMACS_PANIC_PRIORITY : UInt = 20 // <<
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- let DMACS_PRIORITY : UInt = 16 // <<
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- let DMACS_ERROR : UInt = ( 1 << 8 )
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- let DMACS_INT : UInt = ( 1 << 2 )
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- let DMACS_END : UInt = ( 1 << 1 )
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- let DMACS_ACTIVE : UInt = ( 1 << 0 )
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+ let DMACS_RESET : UInt32 = ( 1 << 31 )
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+ let DMACS_ABORT : UInt32 = ( 1 << 30 )
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+ let DMACS_WAIT_OUTSTANDING_WRITES : UInt32 = ( 1 << 28 )
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+ let DMACS_PANIC_PRIORITY : UInt32 = 20 // <<
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+ let DMACS_PRIORITY : UInt32 = 16 // <<
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+ let DMACS_ERROR : UInt32 = ( 1 << 8 )
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+ let DMACS_INT : UInt32 = ( 1 << 2 )
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+ let DMACS_END : UInt32 = ( 1 << 1 )
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+ let DMACS_ACTIVE : UInt32 = ( 1 << 0 )
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/*
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* DMA Control Block in Main Memory
@@ -627,9 +627,9 @@ struct DMACallback {
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}
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// PWM DMAC Register
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- let PWMDMAC_ENAB : UInt = ( 1 << 31 )
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- let PWMDMAC_PANIC : UInt = 8
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- let PWMDMAC_DREQ : UInt = 0
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+ let PWMDMAC_ENAB : UInt32 = ( 1 << 31 )
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+ let PWMDMAC_PANIC : UInt32 = 8
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+ let PWMDMAC_DREQ : UInt32 = 0
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// DMA Register
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let DMATI_NO_WIDE_BURSTS : UInt32 = ( 1 << 26 )
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