Add support for issue #222

utelle · utelle · commit 45a2707d78cb · 2026-02-16T10:33:37.000+01:00
Modified code to allow the AEGIS cipher source to be compiled for the ARM64EC architecture.
diff --git a/src/aegis/aegis128l/aegis128l_aesni.c b/src/aegis/aegis128l/aegis128l_aesni.c
@@ -5,6 +5,9 @@
 ** SPDX-License-Identifier: MIT
 */
 
+#include "../common/aeshardware.h"
+
+#if HAS_AEGIS_AES_HARDWARE == AEGIS_AES_HARDWARE_NI
 #if defined(__i386__) || defined(_M_IX86) || defined(__x86_64__) || defined(_M_AMD64)
 
 #include <errno.h>
@@ -108,3 +111,4 @@ struct aegis128l_implementation aegis128l_aesni_implementation = {
 #endif
 
 #endif
+#endif
diff --git a/src/aegis/aegis128l/aegis128l_altivec.c b/src/aegis/aegis128l/aegis128l_altivec.c
@@ -5,6 +5,9 @@
 ** SPDX-License-Identifier: MIT
 */
 
+#include "../common/aeshardware.h"
+
+#if HAS_AEGIS_AES_HARDWARE == AEGIS_AES_HARDWARE_ALTIVEC
 #if defined(__ALTIVEC__) && defined(__CRYPTO__)
 
 #include <errno.h>
@@ -104,3 +107,4 @@ struct aegis128l_implementation aegis128l_altivec_implementation = {
 #endif
 
 #endif
+#endif
diff --git a/src/aegis/aegis128x2/aegis128x2_aesni.c b/src/aegis/aegis128x2/aegis128x2_aesni.c
@@ -5,6 +5,9 @@
 ** SPDX-License-Identifier: MIT
 */
 
+#include "../common/aeshardware.h"
+
+#if HAS_AEGIS_AES_HARDWARE == AEGIS_AES_HARDWARE_NI
 #if defined(__i386__) || defined(_M_IX86) || defined(__x86_64__) || defined(_M_AMD64)
 
 #include <errno.h>
@@ -114,3 +117,4 @@ struct aegis128x2_implementation aegis128x2_aesni_implementation = {
 #endif
 
 #endif
+#endif
diff --git a/src/aegis/aegis128x2/aegis128x2_altivec.c b/src/aegis/aegis128x2/aegis128x2_altivec.c
@@ -5,6 +5,9 @@
 ** SPDX-License-Identifier: MIT
 */
 
+#include "../common/aeshardware.h"
+
+#if HAS_AEGIS_AES_HARDWARE == AEGIS_AES_HARDWARE_ALTIVEC
 #if defined(__ALTIVEC__) && defined(__CRYPTO__)
 
 #include <errno.h>
@@ -109,3 +112,4 @@ struct aegis128x2_implementation aegis128x2_altivec_implementation = {
 #endif
 
 #endif
+#endif
diff --git a/src/aegis/aegis128x2/aegis128x2_avx2.c b/src/aegis/aegis128x2/aegis128x2_avx2.c
@@ -5,6 +5,9 @@
 ** SPDX-License-Identifier: MIT
 */
 
+#include "../common/aeshardware.h"
+
+#if HAS_AEGIS_AES_HARDWARE == AEGIS_AES_HARDWARE_NI
 #if defined(__i386__) || defined(_M_IX86) || defined(__x86_64__) || defined(_M_AMD64)
 
 #include <errno.h>
@@ -111,3 +114,4 @@ struct aegis128x2_implementation aegis128x2_avx2_implementation = {
 #endif /* HAVE_VAESINTRIN_H */
 
 #endif
+#endif
diff --git a/src/aegis/aegis128x4/aegis128x4_aesni.c b/src/aegis/aegis128x4/aegis128x4_aesni.c
@@ -5,6 +5,9 @@
 ** SPDX-License-Identifier: MIT
 */
 
+#include "../common/aeshardware.h"
+
+#if HAS_AEGIS_AES_HARDWARE == AEGIS_AES_HARDWARE_NI
 #if defined(__i386__) || defined(_M_IX86) || defined(__x86_64__) || defined(_M_AMD64)
 
 #include <errno.h>
@@ -123,3 +126,4 @@ struct aegis128x4_implementation aegis128x4_aesni_implementation = {
 #endif
 
 #endif
+#endif
diff --git a/src/aegis/aegis128x4/aegis128x4_altivec.c b/src/aegis/aegis128x4/aegis128x4_altivec.c
@@ -5,6 +5,9 @@
 ** SPDX-License-Identifier: MIT
 */
 
+#include "../common/aeshardware.h"
+
+#if HAS_AEGIS_AES_HARDWARE == AEGIS_AES_HARDWARE_ALTIVEC
 #if defined(__ALTIVEC__) && defined(__CRYPTO__)
 
 #include <errno.h>
@@ -117,3 +120,4 @@ struct aegis128x4_implementation aegis128x4_altivec_implementation = {
 #endif
 
 #endif
+#endif
diff --git a/src/aegis/aegis128x4/aegis128x4_avx2.c b/src/aegis/aegis128x4/aegis128x4_avx2.c
@@ -5,6 +5,9 @@
 ** SPDX-License-Identifier: MIT
 */
 
+#include "../common/aeshardware.h"
+
+#if HAS_AEGIS_AES_HARDWARE == AEGIS_AES_HARDWARE_NI
 #if defined(__i386__) || defined(_M_IX86) || defined(__x86_64__) || defined(_M_AMD64)
 
 #include <errno.h>
@@ -117,3 +120,4 @@ struct aegis128x4_implementation aegis128x4_avx2_implementation = {
 #endif /* HAVE_VAESINTRIN_H */
 
 #endif
+#endif
diff --git a/src/aegis/aegis128x4/aegis128x4_avx512.c b/src/aegis/aegis128x4/aegis128x4_avx512.c
@@ -5,6 +5,9 @@
 ** SPDX-License-Identifier: MIT
 */
 
+#include "../common/aeshardware.h"
+
+#if HAS_AEGIS_AES_HARDWARE == AEGIS_AES_HARDWARE_NI
 #if defined(__i386__) || defined(_M_IX86) || defined(__x86_64__) || defined(_M_AMD64)
 
 #include <errno.h>
@@ -130,3 +133,4 @@ struct aegis128x4_implementation aegis128x4_avx512_implementation = {
 #endif /* HAVE_VAESINTRIN_H */
 
 #endif
+#endif
diff --git a/src/aegis/aegis256/aegis256_aesni.c b/src/aegis/aegis256/aegis256_aesni.c
@@ -5,6 +5,9 @@
 ** SPDX-License-Identifier: MIT
 */
 
+#include "../common/aeshardware.h"
+
+#if HAS_AEGIS_AES_HARDWARE == AEGIS_AES_HARDWARE_NI
 #if defined(__i386__) || defined(_M_IX86) || defined(__x86_64__) || defined(_M_AMD64)
 
 #include <errno.h>
@@ -104,3 +107,4 @@ struct aegis256_implementation aegis256_aesni_implementation = {
 #endif
 
 #endif
+#endif
diff --git a/src/aegis/aegis256/aegis256_altivec.c b/src/aegis/aegis256/aegis256_altivec.c
@@ -5,6 +5,9 @@
 ** SPDX-License-Identifier: MIT
 */
 
+#include "../common/aeshardware.h"
+
+#if HAS_AEGIS_AES_HARDWARE == AEGIS_AES_HARDWARE_ALTIVEC
 #if defined(__ALTIVEC__) && defined(__CRYPTO__)
 
 #include <errno.h>
@@ -102,3 +105,4 @@ struct aegis256_implementation aegis256_altivec_implementation = {
 #endif
 
 #endif
+#endif
diff --git a/src/aegis/aegis256x2/aegis256x2_aesni.c b/src/aegis/aegis256x2/aegis256x2_aesni.c
@@ -5,6 +5,9 @@
 ** SPDX-License-Identifier: MIT
 */
 
+#include "../common/aeshardware.h"
+
+#if HAS_AEGIS_AES_HARDWARE == AEGIS_AES_HARDWARE_NI
 #if defined(__i386__) || defined(_M_IX86) || defined(__x86_64__) || defined(_M_AMD64)
 
 #include <errno.h>
@@ -109,3 +112,4 @@ struct aegis256x2_implementation aegis256x2_aesni_implementation = {
 #endif
 
 #endif
+#endif
diff --git a/src/aegis/aegis256x2/aegis256x2_altivec.c b/src/aegis/aegis256x2/aegis256x2_altivec.c
@@ -5,6 +5,9 @@
 ** SPDX-License-Identifier: MIT
 */
 
+#include "../common/aeshardware.h"
+
+#if HAS_AEGIS_AES_HARDWARE == AEGIS_AES_HARDWARE_ALTIVEC
 #if defined(__ALTIVEC__) && defined(__CRYPTO__)
 
 #include <errno.h>
@@ -108,3 +111,4 @@ struct aegis256x2_implementation aegis256x2_altivec_implementation = {
 #endif
 
 #endif
+#endif
diff --git a/src/aegis/aegis256x2/aegis256x2_avx2.c b/src/aegis/aegis256x2/aegis256x2_avx2.c
@@ -5,6 +5,9 @@
 ** SPDX-License-Identifier: MIT
 */
 
+#include "../common/aeshardware.h"
+
+#if HAS_AEGIS_AES_HARDWARE == AEGIS_AES_HARDWARE_NI
 #if defined(__i386__) || defined(_M_IX86) || defined(__x86_64__) || defined(_M_AMD64)
 
 #include <errno.h>
@@ -106,3 +109,4 @@ struct aegis256x2_implementation aegis256x2_avx2_implementation = {
 #endif /* HAVE_VAESINTRIN_H */
 
 #endif
+#endif
diff --git a/src/aegis/aegis256x4/aegis256x4_aesni.c b/src/aegis/aegis256x4/aegis256x4_aesni.c
@@ -5,6 +5,9 @@
 ** SPDX-License-Identifier: MIT
 */
 
+#include "../common/aeshardware.h"
+
+#if HAS_AEGIS_AES_HARDWARE == AEGIS_AES_HARDWARE_NI
 #if defined(__i386__) || defined(_M_IX86) || defined(__x86_64__) || defined(_M_AMD64)
 
 #include <errno.h>
@@ -118,3 +121,4 @@ struct aegis256x4_implementation aegis256x4_aesni_implementation = {
 #endif
 
 #endif
+#endif
diff --git a/src/aegis/aegis256x4/aegis256x4_altivec.c b/src/aegis/aegis256x4/aegis256x4_altivec.c
@@ -5,6 +5,9 @@
 ** SPDX-License-Identifier: MIT
 */
 
+#include "../common/aeshardware.h"
+
+#if HAS_AEGIS_AES_HARDWARE == AEGIS_AES_HARDWARE_ALTIVEC
 #if defined(__ALTIVEC__) && defined(__CRYPTO__)
 
 #include <errno.h>
@@ -115,3 +118,4 @@ struct aegis256x4_implementation aegis256x4_altivec_implementation = {
 #endif
 
 #endif
+#endif
diff --git a/src/aegis/aegis256x4/aegis256x4_avx2.c b/src/aegis/aegis256x4/aegis256x4_avx2.c
@@ -5,6 +5,9 @@
 ** SPDX-License-Identifier: MIT
 */
 
+#include "../common/aeshardware.h"
+
+#if HAS_AEGIS_AES_HARDWARE == AEGIS_AES_HARDWARE_NI
 #if defined(__i386__) || defined(_M_IX86) || defined(__x86_64__) || defined(_M_AMD64)
 
 #include <errno.h>
@@ -111,4 +114,5 @@ struct aegis256x4_implementation aegis256x4_avx2_implementation = {
 
 #endif /* HAVE_VAESINTRIN_H */
 
-#endif
+#endif
+#endif
diff --git a/src/aegis/aegis256x4/aegis256x4_avx512.c b/src/aegis/aegis256x4/aegis256x4_avx512.c
@@ -5,6 +5,9 @@
 ** SPDX-License-Identifier: MIT
 */
 
+#include "../common/aeshardware.h"
+
+#if HAS_AEGIS_AES_HARDWARE == AEGIS_AES_HARDWARE_NI
 #if defined(__i386__) || defined(_M_IX86) || defined(__x86_64__) || defined(_M_AMD64)
 
 #include <errno.h>
@@ -125,3 +128,4 @@ struct aegis256x4_implementation aegis256x4_avx512_implementation = {
 #endif /* HAVE_VAESINTRIN_H */
 
 #endif
+#endif
diff --git a/src/aegis/common/aeshardware.h b/src/aegis/common/aeshardware.h
@@ -44,12 +44,20 @@
 /* --- Visual C/C++ --- */
 #elif defined (_MSC_VER)
 
+#if defined(_M_ARM64EC)
+#define HAS_AEGIS_AES_HARDWARE AEGIS_AES_HARDWARE_NEON
+
+/* Use header <arm64_neon.h> instead of <arm_neon.h> */
+#ifndef USE_ARM64_NEON_H
+#define USE_ARM64_NEON_H
+#endif
+
 /* Architecture: x86 or x86_64 */
-#if (defined(_M_X64) || defined(_M_IX86)) && _MSC_FULL_VER >= 150030729
+#elif (defined(_M_X64) || defined(_M_IX86)) && _MSC_FULL_VER >= 150030729
 #define HAS_AEGIS_AES_HARDWARE AEGIS_AES_HARDWARE_NI
 
 /* Architecture: ARM 64-bit */
-#elif defined(_M_ARM64)
+#elif defined(_M_ARM64) || defined(_M_ARM64EC)
 #define HAS_AEGIS_AES_HARDWARE AEGIS_AES_HARDWARE_NEON
 
 /* Use header <arm64_neon.h> instead of <arm_neon.h> */
diff --git a/src/aegis/common/common.h b/src/aegis/common/common.h
@@ -8,10 +8,16 @@
 #ifndef AEGIS_COMMON_H
 #define AEGIS_COMMON_H
 
+#if defined(__wasm__) && !defined(__wasi__)
+static int errno;
+#define memcpy(A, B, C) __builtin_memcpy((A), (B), (C))
+#define memset(A, B, C) __builtin_memset((A), (B), (C))
+#else
 #include <errno.h>
 #include <stddef.h>
 #include <stdint.h>
 #include <string.h>
+#endif
 
 #include "../include/aegis.h"
 #include "cpu.h"
@@ -50,6 +56,39 @@
 #            undef HAVE_VAESINTRIN_H
 #        endif
 #    endif
+
+/* target pragmas don't define these flags on clang-cl (an alternative clang driver for Windows) */
+#    if defined(__clang__) && defined(_MSC_BUILD) && defined(_MSC_VER) && \
+        (defined(_M_IX86) || defined(_M_AMD64)) && !defined(__SSE3__)
+#        undef __SSE3__
+#        undef __SSSE3__
+#        undef __SSE4_1__
+#        undef __AVX__
+#        undef __AVX2__
+#        undef __AVX512F__
+#        undef __AES__
+#        undef __VAES__
+
+#        define __SSE3__    1
+#        define __SSSE3__   1
+#        define __SSE4_1__  1
+#        define __AVX__     1
+#        define __AVX2__    1
+#        define __AVX512F__ 1
+#        define __AES__     1
+#        define __VAES__    1
+#    endif
+
+#endif
+
+#ifdef DISABLE_AVX2
+#    undef HAVE_AVXINTRIN_H
+#    undef HAVE_AVX2INTRIN_H
+#    undef HAVE_AVX512FINTRIN_H
+#    undef HAVE_VAESINTRIN_H
+#endif
+#ifdef DISABLE_AVX512
+#    undef HAVE_AVX512FINTRIN_H
 #endif
 
 #if defined(__BYTE_ORDER__) && __BYTE_ORDER__ == __ORDER_LITTLE_ENDIAN__
diff --git a/src/aegis/common/cpu.c b/src/aegis/common/cpu.c
@@ -63,11 +63,11 @@ _runtime_arm_cpu_features(CPUFeatures *const cpu_features)
     return -1; /* LCOV_EXCL_LINE */
 #endif
 
-#if defined(__ARM_NEON) || defined(__aarch64__) || defined(_M_ARM64)
+#if defined(__ARM_NEON) || defined(__aarch64__) || defined(_M_ARM64) || defined(_M_ARM64EC)
     cpu_features->has_neon = 1;
 #elif defined(HAVE_ANDROID_GETCPUFEATURES) && defined(ANDROID_CPU_ARM_FEATURE_NEON)
     cpu_features->has_neon = (android_getCpuFeatures() & ANDROID_CPU_ARM_FEATURE_NEON) != 0x0;
-#elif (defined(__aarch64__) || defined(_M_ARM64)) && defined(AT_HWCAP)
+#elif (defined(__aarch64__) || defined(_M_ARM64) || defined(_M_ARM64EC)) && defined(AT_HWCAP)
 #    ifdef HAVE_GETAUXVAL
     cpu_features->has_neon = (getauxval(AT_HWCAP) & (1L << 1)) != 0;
 #    elif defined(HAVE_ELF_AUX_INFO)
@@ -97,7 +97,7 @@ _runtime_arm_cpu_features(CPUFeatures *const cpu_features)
 
 #if __ARM_FEATURE_CRYPTO
     cpu_features->has_armcrypto = 1;
-#elif defined(_M_ARM64)
+#elif defined(_M_ARM64) || defined(_M_ARM64EC)
     cpu_features->has_armcrypto =
         1; /* assuming all CPUs supported by ARM Windows have the crypto extensions */
 #elif defined(__APPLE__) && defined(CPU_TYPE_ARM64) && defined(CPU_SUBTYPE_ARM64E)
@@ -116,7 +116,7 @@ _runtime_arm_cpu_features(CPUFeatures *const cpu_features)
     }
 #elif defined(HAVE_ANDROID_GETCPUFEATURES) && defined(ANDROID_CPU_ARM_FEATURE_AES)
     cpu_features->has_armcrypto = (android_getCpuFeatures() & ANDROID_CPU_ARM_FEATURE_AES) != 0x0;
-#elif (defined(__aarch64__) || defined(_M_ARM64)) && defined(AT_HWCAP)
+#elif (defined(__aarch64__) || defined(_M_ARM64) || defined(_M_ARM64EC)) && defined(AT_HWCAP)
 #    ifdef HAVE_GETAUXVAL
     cpu_features->has_armcrypto = (getauxval(AT_HWCAP) & (1L << 3)) != 0;
 #    elif defined(HAVE_ELF_AUX_INFO)
@@ -348,4 +348,4 @@ int
 aegis_runtime_has_altivec(void)
 {
     return _cpu_features.has_altivec;
-}
+}
