Merge pull request #2794 from verilog-to-routing/debug_3d_sw

3D SB

Author: vaughnbetz

libs/librrgraph/src/base/rr_graph_view.h

@@ -345,7 +345,7 @@ class RRGraphView {
             coordinate_string += " length:" + std::to_string(node_length(node)); //add the length of the segment
             //Figure out the starting and ending coordinate of the segment depending on the direction
 
-            arrow = "->"; //we will point the coordinates from start to finish, left to right
+            arrow = " ->"; //we will point the coordinates from start to finish, left to right
 
             if (node_direction(node) == Direction::DEC) { //signal travels along decreasing direction
 
@@ -365,7 +365,7 @@ class RRGraphView {
                 end_y = std::to_string(node_yhigh(node)) + ",";
                 end_layer_str = std::to_string(node_layer_num) + ")"; //layer number
                 if (node_direction(node) == Direction::BIDIR) {
-                    arrow = "<->"; //indicate that signal can travel both direction
+                    arrow = " <->"; //indicate that signal can travel both direction
                 }
             }
         }

libs/librrgraph/src/utils/alloc_and_load_rr_indexed_data.cpp

@@ -550,10 +550,10 @@ static void load_rr_indexed_data_T_values(const RRGraphView& rr_graph,
         calculate_average_switch(rr_graph, (size_t)rr_id, avg_switch_R, avg_switch_T, avg_switch_Cinternal, num_switches, buffered, fan_in_list);
 
         if (num_switches == 0) {
-            VTR_LOG_WARN("Node: %d with RR_type: %s  at Location:%s, had no out-going switches\n", rr_id,
+            VTR_LOG_WARN("Node: %d with RR_type: %s  at Location:%s, had no incoming switches\n", rr_id,
                          rr_graph.node_type_string(rr_id), node_cords.c_str());
             continue;
-        }
+        }    
         VTR_ASSERT(num_switches > 0);
 
         num_nodes_of_index[cost_index]++;

vpr/src/route/overuse_report.cpp

@@ -256,7 +256,7 @@ static void report_overused_ipin_opin(std::ostream& os,
 
         //Print out the block index, name and type
         // TODO: Needs to be updated when RR Graph Nodes know their layer_num
-        ClusterBlockId block_id = grid_info.block_at_location({grid_x, grid_y, isubtile, 0});
+        ClusterBlockId block_id = grid_info.block_at_location({grid_x, grid_y, isubtile, grid_layer});
         os << "Block #" << iblock << ": ";
         os << "Block name = " << clb_nlist.block_pb(block_id)->name << ", ";
         os << "Block type = " << clb_nlist.block_type(block_id)->name << '\n';

vpr/src/route/router_lookahead_map.cpp

@@ -330,11 +330,23 @@ std::pair<float, float> MapLookahead::get_expected_delay_and_cong(RRNodeId from_
 
         auto from_ptc = rr_graph.node_ptc_num(from_node);
 
-        std::tie(expected_delay_cost, expected_cong_cost) = util::get_cost_from_src_opin(src_opin_delays[from_layer_num][from_tile_index][from_ptc][to_layer_num],
-                                                                                         delta_x,
-                                                                                         delta_y,
-                                                                                         to_layer_num,
-                                                                                         get_wire_cost_entry);
+        /* We could reach the sink by using an intermediate wire on any reachable layer. We consider all these options and return the minimum cost one. 
+         * get_cost_from_src_opin iterates over all routing segments passed to it (the first argument) and returns 
+         * the minimum cost among them. In the following for loop, we iterate over each layer and pass it the 
+         * routing segments on that layer reachable from the OPIN/SOURCE to segments on that layer. This for loop then calculates and returns 
+         * the minimum cost from the given OPIN/SOURCE to the specified SINK considering routing options across all layers.
+         */ 
+        for (int layer_num = 0; layer_num < device_ctx.grid.get_num_layers(); layer_num++) {
+            float this_delay_cost;
+            float this_cong_cost;
+            std::tie(this_delay_cost, this_cong_cost) = util::get_cost_from_src_opin(src_opin_delays[from_layer_num][from_tile_index][from_ptc][layer_num],
+                                                                                            delta_x,
+                                                                                            delta_y,
+                                                                                            to_layer_num,
+                                                                                            get_wire_cost_entry);
+            expected_delay_cost = std::min(expected_delay_cost, this_delay_cost);
+            expected_cong_cost = std::min(expected_cong_cost, this_cong_cost);
+        }
 
         expected_delay_cost *= params.criticality;
         expected_cong_cost *= (1 - params.criticality);

vtr_flow/tasks/regression_tests/vtr_reg_nightly_test7/3d_titan_other_full_opin_auto_bb/config/config.txt renamed to vtr_flow/tasks/regression_tests/vtr_reg_nightly_test7/3d_cb_titan_other_auto_bb/config/config.txt

@@ -0,0 +1,52 @@
+#
+############################################
+# Configuration file for running experiments
+##############################################
+
+# Path to directory of circuits to use
+circuits_dir=benchmarks/titan_blif/other_benchmarks/stratixiv
+
+# Path to directory of SDC files
+sdc_dir=benchmarks/titan_blif/other_benchmarks/stratixiv
+
+# Path to directory of architectures to use
+archs_dir=arch/multi_die/stratixiv_3d
+
+# Add circuits to list to sweep
+circuit_list_add=carpat_stratixiv_arch_timing.blif
+circuit_list_add=CH_DFSIN_stratixiv_arch_timing.blif
+circuit_list_add=CHERI_stratixiv_arch_timing.blif
+circuit_list_add=EKF-SLAM_Jacobians_stratixiv_arch_timing.blif
+circuit_list_add=fir_cascade_stratixiv_arch_timing.blif
+circuit_list_add=jacobi_stratixiv_arch_timing.blif
+circuit_list_add=JPEG_stratixiv_arch_timing.blif
+circuit_list_add=leon2_stratixiv_arch_timing.blif
+circuit_list_add=leon3mp_stratixiv_arch_timing.blif
+circuit_list_add=MCML_stratixiv_arch_timing.blif
+circuit_list_add=MMM_stratixiv_arch_timing.blif
+circuit_list_add=radar20_stratixiv_arch_timing.blif
+circuit_list_add=random_stratixiv_arch_timing.blif
+circuit_list_add=Reed_Solomon_stratixiv_arch_timing.blif
+circuit_list_add=smithwaterman_stratixiv_arch_timing.blif
+circuit_list_add=stap_steering_stratixiv_arch_timing.blif
+circuit_list_add=sudoku_check_stratixiv_arch_timing.blif
+circuit_list_add=SURF_desc_stratixiv_arch_timing.blif
+circuit_list_add=ucsb_152_tap_fir_stratixiv_arch_timing.blif
+circuit_list_add=uoft_raytracer_stratixiv_arch_timing.blif
+circuit_list_add=wb_conmax_stratixiv_arch_timing.blif
+circuit_list_add=picosoc_stratixiv_arch_timing.blif
+circuit_list_add=murax_stratixiv_arch_timing.blif
+
+# Add architectures to list to sweep
+arch_list_add=3d_SB_inter_die_stratixiv_arch.timing.xml
+
+# Parse info and how to parse
+parse_file=vpr_titan.txt
+
+# How to parse QoR info
+qor_parse_file=qor_vpr_titan.txt
+
+# Pass requirements
+pass_requirements_file=pass_requirements_vpr_titan.txt
+
+script_params=-starting_stage vpr --route_chan_width 300 --max_router_iterations 400 --custom_3d_sb_fanin_fanout 60 --router_lookahead map