Commit b5d01dc

authored

Merge pull request #2301 from byuccl/joshua-xan

Accurate Xilinx 7 series architecture

2 parents 7f1c68e + 9b53ef4 commit b5d01dcCopy full SHA for b5d01dc

5 files changed

+3462

-0

lines changed

vtr_flow
- arch/xilinx
  - 7series_BRAM_DSP_carry.xml
- parse
  - pass_requirements
    - pass_requirements_vpr_xilinx_fixed_width.txt
  - qor_config
    - qor_vpr_xilinx.txt
- tasks/regression_tests/vtr_reg_nightly_test2/vtr_xilinx_qor/config
  - config.txt
  - golden_results.txt

5 files changed

+3462

-0

lines changed

Comments

(0)