@@ -154,22 +154,22 @@ void check_rr_graph(const RRGraphView& rr_graph,
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* - CHAN -> IPIN connections (unique rr_node for IPIN nodes on multiple sides)
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* - OPIN -> CHAN connections (unique rr_node for OPIN nodes on multiple sides)
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*/
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- bool is_chan_to_chan = (rr_type == CHANX || rr_type == CHANY) && (to_rr_type == CHANY || to_rr_type == CHANX);
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- bool is_chan_to_ipin = (rr_type == CHANX || rr_type == CHANY) && to_rr_type == IPIN;
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- bool is_opin_to_chan = rr_type == OPIN && (to_rr_type == CHANX || to_rr_type == CHANY);
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+ bool is_chan_to_chan = (rr_type == t_rr_type:: CHANX || rr_type == t_rr_type:: CHANY) && (to_rr_type == t_rr_type:: CHANY || to_rr_type == t_rr_type:: CHANX);
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+ bool is_chan_to_ipin = (rr_type == t_rr_type:: CHANX || rr_type == t_rr_type:: CHANY) && to_rr_type == t_rr_type:: IPIN;
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+ bool is_opin_to_chan = rr_type == t_rr_type:: OPIN && (to_rr_type == t_rr_type:: CHANX || to_rr_type == t_rr_type:: CHANY);
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bool is_internal_edge = false ;
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if (is_flat) {
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- is_internal_edge = (rr_type == IPIN && to_rr_type == IPIN) || (rr_type == OPIN && to_rr_type == OPIN);
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+ is_internal_edge = (rr_type == t_rr_type:: IPIN && to_rr_type == t_rr_type:: IPIN) || (rr_type == t_rr_type:: OPIN && to_rr_type == t_rr_type:: OPIN);
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}
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if (!(is_chan_to_chan || is_chan_to_ipin || is_opin_to_chan || is_internal_edge)) {
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VPR_ERROR (VPR_ERROR_ROUTE,
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" in check_rr_graph: node %d (%s) connects to node %d (%s) %zu times - multi-connections only expected for CHAN<->CHAN, CHAN->IPIN, OPIN->CHAN.\n " ,
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- inode, rr_node_typename[rr_type], to_node, rr_node_typename[to_rr_type], num_edges_to_node);
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+ inode, rr_node_typename[( size_t ) rr_type], to_node, rr_node_typename[( size_t ) to_rr_type], num_edges_to_node);
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}
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// Between two wire segments
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- VTR_ASSERT_MSG (to_rr_type == CHANX || to_rr_type == CHANY || to_rr_type == IPIN, " Expect channel type or input pin type" );
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- VTR_ASSERT_MSG (rr_type == CHANX || rr_type == CHANY || rr_type == OPIN, " Expect channel type or output pin type" );
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+ VTR_ASSERT_MSG (to_rr_type == t_rr_type:: CHANX || to_rr_type == t_rr_type:: CHANY || to_rr_type == t_rr_type:: IPIN, " Expect channel type or input pin type" );
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+ VTR_ASSERT_MSG (rr_type == t_rr_type:: CHANX || rr_type == t_rr_type:: CHANY || rr_type == t_rr_type:: OPIN, " Expect channel type or output pin type" );
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// While multiple connections between the same wires can be electrically legal,
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// they are redundant if they are of the same switch type.
@@ -190,8 +190,8 @@ void check_rr_graph(const RRGraphView& rr_graph,
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/* Redundant edges are not allowed for chan <-> chan connections
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* but allowed for input pin <-> chan or output pin <-> chan connections
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*/
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- if ((to_rr_type == CHANX || to_rr_type == CHANY)
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- && (rr_type == CHANX || rr_type == CHANY)) {
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+ if ((to_rr_type == t_rr_type:: CHANX || to_rr_type == t_rr_type:: CHANY)
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+ && (rr_type == t_rr_type:: CHANX || rr_type == t_rr_type:: CHANY)) {
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auto switch_type = rr_graph.rr_switch_inf (RRSwitchId (kv.first )).type ();
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VPR_ERROR (VPR_ERROR_ROUTE, " in check_rr_graph: node %d has %d redundant connections to node %d of switch type %d (%s)" ,
@@ -240,22 +240,22 @@ void check_rr_graph(const RRGraphView& rr_graph,
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t_physical_tile_type_ptr type = grid.get_physical_type ({xlow, ylow, layer_num});
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- if (rr_type == IPIN || rr_type == OPIN) {
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+ if (rr_type == t_rr_type:: IPIN || rr_type == t_rr_type:: OPIN) {
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// #TODO: No edges are added for internal pins. However, they need to be checked somehow!
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if (ptc_num >= type->num_pins ) {
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VTR_LOG_ERROR (" in check_rr_graph: node %d (%s) type: %s is internal node.\n " ,
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- inode, rr_graph.node_type_string (rr_node), rr_node_typename[rr_type]);
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+ inode, rr_graph.node_type_string (rr_node), rr_node_typename[( size_t ) rr_type]);
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}
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}
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- if (rr_type != SOURCE) {
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+ if (rr_type != t_rr_type:: SOURCE) {
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if (total_edges_to_node[inode] < 1 && !rr_node_is_global_clb_ipin (rr_graph, grid, rr_node)) {
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/* A global CLB input pin will not have any edges, and neither will *
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* a SOURCE or the start of a carry-chain. Anything else is an error.
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* For simplicity, carry-chain input pin are entirely ignored in this test
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*/
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bool is_chain = false ;
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- if (rr_type == IPIN) {
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+ if (rr_type == t_rr_type:: IPIN) {
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for (const t_fc_specification& fc_spec : types[type->index ].fc_specs ) {
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if (fc_spec.fc_value == 0 && fc_spec.seg_index == 0 ) {
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is_chain = true ;
@@ -269,11 +269,11 @@ void check_rr_graph(const RRGraphView& rr_graph,
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|| (rr_graph.node_ylow (rr_node) == 1 )
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|| (rr_graph.node_xhigh (rr_node) == int (grid.width ()) - 2 )
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|| (rr_graph.node_yhigh (rr_node) == int (grid.height ()) - 2 ));
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- bool is_wire = (rr_graph.node_type (rr_node) == CHANX
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- || rr_graph.node_type (rr_node) == CHANY);
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+ bool is_wire = (rr_graph.node_type (rr_node) == t_rr_type:: CHANX
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+ || rr_graph.node_type (rr_node) == t_rr_type:: CHANY);
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if (!is_chain && !is_fringe && !is_wire) {
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- if (rr_graph.node_type (rr_node) == IPIN || rr_graph.node_type (rr_node) == OPIN) {
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+ if (rr_graph.node_type (rr_node) == t_rr_type:: IPIN || rr_graph.node_type (rr_node) == t_rr_type:: OPIN) {
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if (has_adjacent_channel (rr_graph, grid, node)) {
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auto block_type = grid.get_physical_type ({rr_graph.node_xlow (rr_node),
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rr_graph.node_ylow (rr_node),
@@ -320,7 +320,7 @@ static bool rr_node_is_global_clb_ipin(const RRGraphView& rr_graph, const Device
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rr_graph.node_ylow (inode),
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rr_graph.node_layer (inode)});
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- if (rr_graph.node_type (inode) != IPIN)
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+ if (rr_graph.node_type (inode) != t_rr_type:: IPIN)
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return (false );
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ipin = rr_graph.node_pin_num (inode);
@@ -389,7 +389,7 @@ void check_rr_node(const RRGraphView& rr_graph,
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type = grid.get_physical_type ({xlow, ylow, layer_num});
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switch (rr_type) {
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- case SOURCE:
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+ case t_rr_type:: SOURCE:
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if (type == nullptr ) {
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VPR_FATAL_ERROR (VPR_ERROR_ROUTE,
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" in check_rr_node: node %d (type %d) is at an illegal clb location (%d, %d).\n " , inode, rr_type, xlow, ylow);
@@ -400,7 +400,7 @@ void check_rr_node(const RRGraphView& rr_graph,
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" in check_rr_node: node %d (type %d) has endpoints (%d,%d) and (%d,%d)\n " , inode, rr_type, xlow, ylow, xhigh, yhigh);
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}
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break ;
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- case SINK: {
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+ case t_rr_type:: SINK: {
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if (type == nullptr ) {
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VPR_FATAL_ERROR (VPR_ERROR_ROUTE,
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" in check_rr_node: node %d (type %d) is at an illegal clb location (%d, %d).\n " , inode, rr_type, xlow, ylow);
@@ -413,8 +413,8 @@ void check_rr_node(const RRGraphView& rr_graph,
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}
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break ;
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}
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- case IPIN:
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- case OPIN:
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+ case t_rr_type:: IPIN:
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+ case t_rr_type:: OPIN:
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if (type == nullptr ) {
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VPR_FATAL_ERROR (VPR_ERROR_ROUTE,
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" in check_rr_node: node %d (type %d) is at an illegal clb location (%d, %d).\n " , inode, rr_type, xlow, ylow);
@@ -425,7 +425,7 @@ void check_rr_node(const RRGraphView& rr_graph,
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}
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break ;
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- case CHANX:
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+ case t_rr_type:: CHANX:
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if (xlow < 1 || xhigh > int (grid.width ()) - 2 || yhigh > int (grid.height ()) - 2 || yhigh != ylow) {
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VPR_FATAL_ERROR (VPR_ERROR_ROUTE,
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" in check_rr_node: CHANX out of range for endpoints (%d,%d) and (%d,%d)\n " , xlow, ylow, xhigh, yhigh);
@@ -436,7 +436,7 @@ void check_rr_node(const RRGraphView& rr_graph,
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}
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break ;
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- case CHANY:
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+ case t_rr_type:: CHANY:
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if (xhigh > int (grid.width ()) - 2 || ylow < 1 || yhigh > int (grid.height ()) - 2 || xlow != xhigh) {
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VPR_FATAL_ERROR (VPR_ERROR_ROUTE,
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" Error in check_rr_node: CHANY out of range for endpoints (%d,%d) and (%d,%d)\n " , xlow, ylow, xhigh, yhigh);
@@ -459,12 +459,12 @@ void check_rr_node(const RRGraphView& rr_graph,
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e_pin_type class_type = OPEN;
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int class_num_pins = -1 ;
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switch (rr_type) {
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- case SOURCE:
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- case SINK:
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+ case t_rr_type:: SOURCE:
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+ case t_rr_type:: SINK:
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class_type = get_class_type_from_class_physical_num (type, ptc_num);
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class_num_pins = get_class_num_pins_from_class_physical_num (type, ptc_num);
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if (ptc_num >= class_max_ptc
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- || class_type != ((rr_type == SOURCE) ? DRIVER : RECEIVER)) {
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+ || class_type != ((rr_type == t_rr_type:: SOURCE) ? DRIVER : RECEIVER)) {
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VPR_ERROR (VPR_ERROR_ROUTE,
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" in check_rr_node: inode %d (type %d) had a ptc_num of %d.\n " , inode, rr_type, ptc_num);
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}
@@ -474,11 +474,11 @@ void check_rr_node(const RRGraphView& rr_graph,
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}
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break ;
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- case OPIN:
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- case IPIN:
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+ case t_rr_type:: OPIN:
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+ case t_rr_type:: IPIN:
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class_type = get_pin_type_from_pin_physical_num (type, ptc_num);
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if (ptc_num >= pin_max_ptc
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- || class_type != ((rr_type == OPIN) ? DRIVER : RECEIVER)) {
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+ || class_type != ((rr_type == t_rr_type:: OPIN) ? DRIVER : RECEIVER)) {
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VPR_ERROR (VPR_ERROR_ROUTE,
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" in check_rr_node: inode %d (type %d) had a ptc_num of %d.\n " , inode, rr_type, ptc_num);
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}
@@ -488,14 +488,14 @@ void check_rr_node(const RRGraphView& rr_graph,
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}
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break ;
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- case CHANX:
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- case CHANY:
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+ case t_rr_type:: CHANX:
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+ case t_rr_type:: CHANY:
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if (route_type == DETAILED) {
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nodes_per_chan = chan_width.max ;
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tracks_per_node = 1 ;
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} else {
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nodes_per_chan = 1 ;
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- tracks_per_node = ((rr_type == CHANX) ? chan_width.x_list [ylow] : chan_width.y_list [xlow]);
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+ tracks_per_node = ((rr_type == t_rr_type:: CHANX) ? chan_width.x_list [ylow] : chan_width.y_list [xlow]);
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}
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// if a chanx/chany has length 0, it means it is used to connect different dice together
@@ -522,7 +522,7 @@ void check_rr_node(const RRGraphView& rr_graph,
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C = rr_graph.node_C (rr_node);
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R = rr_graph.node_R (rr_node);
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- if (rr_type == CHANX || rr_type == CHANY) {
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+ if (rr_type == t_rr_type:: CHANX || rr_type == t_rr_type:: CHANY) {
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if (C < 0 . || R < 0 .) {
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VPR_ERROR (VPR_ERROR_ROUTE,
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" in check_rr_node: node %d of type %d has R = %g and C = %g.\n " , inode, rr_type, R, C);
@@ -545,7 +545,7 @@ static void check_unbuffered_edges(const RRGraphView& rr_graph, int from_node) {
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bool trans_matched;
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from_rr_type = rr_graph.node_type (RRNodeId (from_node));
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- if (from_rr_type != CHANX && from_rr_type != CHANY)
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+ if (from_rr_type != t_rr_type:: CHANX && from_rr_type != t_rr_type:: CHANY)
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return ;
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from_num_edges = rr_graph.num_edges (RRNodeId (from_node));
@@ -554,7 +554,7 @@ static void check_unbuffered_edges(const RRGraphView& rr_graph, int from_node) {
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to_node = size_t (rr_graph.edge_sink_node (RRNodeId (from_node), from_edge));
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to_rr_type = rr_graph.node_type (RRNodeId (to_node));
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- if (to_rr_type != CHANX && to_rr_type != CHANY)
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+ if (to_rr_type != t_rr_type:: CHANX && to_rr_type != t_rr_type:: CHANY)
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continue ;
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from_switch_type = rr_graph.edge_switch (RRNodeId (from_node), from_edge);
@@ -592,7 +592,7 @@ static bool has_adjacent_channel(const RRGraphView& rr_graph, const DeviceGrid&
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/* TODO: this function should be reworked later to adapt RRGraphView interface
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* once xlow(), ylow(), side() APIs are implemented
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*/
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- VTR_ASSERT (rr_graph.node_type (node.id ()) == IPIN || rr_graph.node_type (node.id ()) == OPIN);
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+ VTR_ASSERT (rr_graph.node_type (node.id ()) == t_rr_type:: IPIN || rr_graph.node_type (node.id ()) == e_rr_type:: OPIN);
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if ((rr_graph.node_xlow (node.id ()) == 0 && !rr_graph.is_node_on_specific_side (node.id (), RIGHT)) // left device edge connects only along block's right side
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|| (rr_graph.node_ylow (node.id ()) == int (grid.height () - 1 ) && !rr_graph.is_node_on_specific_side (node.id (), BOTTOM)) // top device edge connects only along block's bottom side
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