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Merge pull request #2637 from Wang-Yuanqi-source/patch-1
[WIP] VIB Upgrades for Tileable Routing Resource Graph on OpenFPGA
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‎doc/src/Images/VIB.png

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‎doc/src/Images/bent_wires.png

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‎doc/src/Images/double-level.png

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‎doc/src/vpr/VIB.rst

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.. _VIB:
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VIB
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============
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The VIB architecture adds modeling support for double-level MUX topology and bent wires.
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.. figure:: ../Images/VIB.png
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:align: center
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:height: 300
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VIB architecture. The connections between the inputs and outputs of the LB and the routing wires are all implemented within the VIB.
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.. figure:: ../Images/double-level.png
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:align: center
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Double-level MUX topology.
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.. figure:: ../Images/bent_wires.png
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:align: center
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Presentation for bent wires.
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FPGA Architecture File Modification (.xml)
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--------------------------
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For original tags of FPGA architecture file see :ref:`fpga_architecture_description`.
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Modification for ``<segmentlist>`` Tag
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~~~~~~~~~~~~~~~~~~~~~~~~~~~~
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The content within the ``<segmentlist>`` tag consists of a group of ``<segment>`` tags.
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The ``<segment>`` tag and its contents are described below.
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.. arch:tag:: <segment axis="{x|y}" name="unique_name" length="int" type="{bidir|unidir}" res_type="{GCLK|GENERAL}" freq="float" Rmetal="float" Cmetal="float">content</segment>
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:req_param content:
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The switch names and the depopulation pattern as described below.
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.. arch:tag:: <sb type="pattern">int list</sb>
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.. arch:tag:: <cb type="pattern">int list</cb>
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.. arch:tag:: <mux name="string"/>
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For bent wires, a new content ``<bent>`` is added in the ``<segment>`` tag.
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.. arch:tag:: <cb type="pattern">bent pattern list</cb>
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This tag describes the bent pattern for this particular wire segment.
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For example, a length 4 wire has a bent pattern of ``- - U``.
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A ``-`` indicates no bent at this position and a ``U`` indicates a conterclockwise bent at the position. (``D`` indicates a clockwise bent.)
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.. note:: A bent wire should remain consistent in both the x and y axes.
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New Added Top Level Tag ``<vib_arch>``
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~~~~~~~~~~~~~~~~~~~~~~~~~~~~
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The content within the ``<vib_arch>`` tag consists of a group of ``<vib>`` tags. Different ``<vib>`` tags describe the paradigms of VIB, which apply to different positions.
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.. arch:tag:: <vib name="vib_name" pbtype_name="pbtype_name" vib_seg_group="int" arch_vib_switch="string">content</vib>
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:req_param name:
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A unique alphanumeric name to identify this VIB type.
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:req_param pbtype_name:
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The name of the block type (e.g. clb, memory) that this VIB connects to.
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:req_param vib_seg_group:
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The number of the segment types in this VIB.
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:req_param arch_vib_switch:
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Name of the mux switch type used to drive wires in the VIB by default, and a custom switch can override this switch type for specific connections if desired.
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:req_param content:
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The segment groups and the multistage MUX topology as described below.
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The ``content`` of ``<vib>`` tag consists of several ``<seg_group>`` tags and a ``<multistage_muxs>`` tag.
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For example:
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.. code-block:: xml
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<vib_arch>
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<vib name="vib0" pbtype_name="clb" vib_seg_group="4" arch_vib_switch="mux0">
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<seg_group name="L1" track_nums="12"/>
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<seg_group name="L2" track_nums="20"/>
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<seg_group name="L4" track_nums="16"/>
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<seg_group name="L8" track_nums="16"/>
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<multistage_muxs>
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<first_stage switch_name="mux0">
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...
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</first_stage>
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<second_stage>
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...
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</second_stage>
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</multistage_muxs>
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</vib>
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<vib name="vib1" pbtype_name="dsp" vib_seg_group="4" arch_vib_switch="mux0">
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...
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</vib>
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</vib_arch>
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.. arch:tag:: <seg_group name="seg_name" track_nums="int"/>
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:req_param name:
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The name of the segment in this VIB described in ``<segmentlist>``.
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:req_param track_nums:
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The track number of the segment in this VIB.
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.. note:: When using unidirectional segments, the track number of the segment represents the number for one direction. For example, the ``track_nums`` is ``10``, which means total ``20`` tracks of the segment in the channel for both (INC & DEC) directions.
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.. arch:tag:: <multistage_muxs>content</multistage_muxs>
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:req_param content:
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The detaild information for first and second MUXes.
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The ``content`` of ``<multistage_muxs>`` tag consists of a ``<first_stage>`` tag and a ``<secong_stage>`` tag.
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.. arch:tag:: <first_stage switch_name="switch_name">content</first_stage>
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:req_param switch_name:
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Name of the mux switch type used to drive first stage MUXes in the VIB.
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:req_param content:
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The details of each MUX.
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For example:
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.. code-block:: xml
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<first_stage switch_name="mux0">
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<mux name="f_mux_0">
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<from>clb.O[0] clb.O[8] clb.O[12:16]</from>
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</mux>
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<mux name="f_mux_1">
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<from>L1.E2 L1.W2 L1.S8 L1.N8</from>
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</mux>
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...
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</first_stage>
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The ``<from>`` tag in ``<mux>`` describes nodes that connects to the MUX. ``clb.O[*]`` means output pin(s); ``L1.E2`` means the track ``2`` in the ``East`` direction of ``L1`` segment.
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.. arch:tag:: <second_stage>content</second_stage>
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:req_param content:
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The details of each MUX.
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For example:
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.. code-block:: xml
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<second_stage switch_name="mux0">
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<mux name="s_mux_0">
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<to>clb.I[0]</to>
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<from>clb.O[0] clb.O[8] f_mux_0</from>
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</mux>
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<mux name="s_mux_1">
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<to>L1.S1</to>
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<from>L1.E1 L1.W1 f_mux_0 f_mux_1</from>
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</mux>
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...
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</second_stage>
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The ``<to>`` tag describes the node this MUX connects to. ``clb.I[*]`` means input pin(s); ``L1.S1`` means the track ``1`` in the ``South`` direction of ``L1`` segment. The ``<from>`` tag in ``<mux>`` describes nodes that connects to the MUX. ``clb.O[*]`` means output pin(s); ``L1.E2`` means the track ``2`` in the ``East`` direction of ``L1`` segment. ``f_mux_0`` means the name of the specific first stage MUX.
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New Added Top Level Tag ``<vib_layout>``
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~~~~~~~~~~~~~~~~~~~~~~~~~~~~
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Content inside this tag specifies VIB grid layout to describe different VIBs applied on different locations.
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.. arch:tag:: <fixed_layout name="string">content</fixed_layout>
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:req_param name:
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The name identifying this VIB grid layout. It should be the same as the corresponding layout name inside the ``<layout>`` tag.
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:req_param content:
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The content should contain a set of grid location tags. For grid location tags of vib_layout see :ref:`fpga_architecture_description`; ref:`grid_expressions`

‎doc/src/vpr/index.rst

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file_formats
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debug_aids
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VIB

‎libs/libarchfpga/src/physical_types.h

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#include "logic_types.h"
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#include "clock_types.h"
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#include "vib_inf.h"
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//Forward declarations
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struct t_clock_arch;
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struct t_clock_network;
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* For backward compatibility, this attribute is optional. If not *
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* specified, the resource type for the segment is considered to *
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* be GENERAL. *
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* meta: Table storing extra arbitrary metadata attributes. */
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* meta: Table storing extra arbitrary metadata attributes. *
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*
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*
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* New added parameters for bend wires: *
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* isbend: This segment is bend or not *
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* bend: The bend type of the segment, "-"-0, "U"-1, "D"-2 *
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* For example: bend pattern <- - U ->; corresponding bend: [0,0,1,0] *
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* part_len: Divide the segment into several parts based on bend position. *
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* For example: length-5 bend segment: <- - U ->; *
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* Corresponding part_len: [3,2] */
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struct t_segment_inf {
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std::string name;
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int frequency;
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enum e_parallel_axis parallel_axis;
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std::vector<bool> cb;
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std::vector<bool> sb;
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bool isbend;
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std::vector<int> bend;
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std::vector<int> part_len;
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int seg_index;
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enum SegResType res_type = SegResType::GENERAL;
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//float Cmetal_per_m; /* Wire capacitance (per meter) */
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std::string noc_router_tile_name;
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};
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/* Detailed routing architecture */
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/* Detailed routing architecture */
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struct t_arch {
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/** Stores unique strings used as key and values in <metadata> tags,
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* i.e. implements a flyweight pattern to save memory.*/
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//If the layout is not specified in the command line options, this variable will be set to "auto"
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std::string device_layout;
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std::vector<t_vib_grid_def> vib_grid_layouts;
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t_clock_arch_spec clock_arch; // Clock related data types
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/// Stores NoC-related architectural information when there is an embedded NoC
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t_noc_inf* noc = nullptr;
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// added for vib
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//bool is_vib_arch = false;
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std::vector<VibInf> vib_infs;
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};
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#endif

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