Closed as not planned
Description
Expected Behaviour
For this input netlist:
.model top
.inputs a b
.outputs c
.names a b c
11 1
.names a c
1 1
.end
VPR should provide a useful error message that the net c (incorrectly) has multiple drivers.
Current Behaviour
Currently this fails an internal consistency check within the netlist data structures:
VPR FPGA Placement and Routing.
Version: 8.0.0-dev+51b49fa
Revision: 51b49fa
Compiled: 2018-04-21T12:54:54 (release build)
Compiler: GNU 5.4.1 on Linux-4.4.0-112-generic x86_64
University of Toronto
[email protected]
This is free open source code under MIT license.
VPR was run with the following command-line:
vpr /project/trees/vtr/vtr_flow/arch/timing/EArch.xml error.blif
Using up to 1 parallel worker(s)
Architecture file: /project/trees/vtr/vtr_flow/arch/timing/EArch.xml
Circuit name: error
Building complex block graph.
Warning 1: io[0].clock[0] unconnected pin in architecture.
Load circuit
Load circuit took 0.00 seconds
Error 1:
Type: Unrecognized Error
File: /project/trees/vtr/vpr/src/base/netlist.tpp
Line: 1477
Message: Inconsistent block data sizes
Which doesn't tell the user what the problem is.
Possible Solution
Produce a helpful error message such as:
Error 1:
Type: Netlist Error
File: error.blif
Line: 8
Message: Net 'c' already has a driver (multi-driven nets are not supported)
The checks for this should occur whenever a new driver is created during atom netlist construction (i.e. in vpr/src/base/read_blif.cpp), not when the netlist data structures are being verified.
Steps to Reproduce (for bugs)
- Run the above netlist on any standard VTR architecture (e.g. vtr_flow/timing/EArch.xml)
Context
This is a potential common mistake for which VPR has enough context information to give a useful error message, and should do so.
Your Environment
- VTR revision used: aab0abc
- Operating System and version: Ubuntu 16.04
- Compiler version: gcc-5