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Issues list

vpr_power_detailed.txt parse-results missing parameter bug Incorrect behaviour Stale VPR VPR FPGA Placement & Routing Tool VTR Flow VTR Design Flow (scripts/benchmarks/architectures)
#1743 opened May 27, 2021 by ArashAhmadian
1
Enabled BLIF buffer elimination in preparation for InOuts lang-cpp C/C++ code Odin Odin II Logic Synthesis Tool: Unsorted item tests VTR Flow VTR Design Flow (scripts/benchmarks/architectures)
#1520 opened Sep 1, 2020 by djns99 Loading…
1 of 4 tasks
@sdamghan
8
Converter from rr_nodes to RRGraph object docs Documentation infra Project Infrastructure lang-cpp C/C++ code lang-python Python code libvtrutil scripts Utility & Infrastructure scripts tests VPR VPR FPGA Placement & Routing Tool VTR Flow VTR Design Flow (scripts/benchmarks/architectures)
#1048 opened Nov 15, 2019 by tangxifan Loading…
2 of 7 tasks
39
Regression Tests should check average/geomean QoR metrics no-stale Exclude issue from being automatically marked as stale tests VTR Flow VTR Design Flow (scripts/benchmarks/architectures)
#630 opened May 31, 2019 by kmurray
@renrichard @AmirhosseinPoolad
6
Improve VPR Regression Test Coverage Good First Issue Good issues for new or first-time contributors tests VTR Flow VTR Design Flow (scripts/benchmarks/architectures)
#531 opened Apr 8, 2019 by kmurray
@vaughnbetz
4
ProTip! Find all open issues with in progress development work with linked:pr.