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tschrapeltschrapel
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rp2350 compatibility
1 parent 814c39f commit 0149d9b

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+51
-48
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2 files changed

+51
-48
lines changed

‎src/Thumb9900.S‎

Lines changed: 32 additions & 42 deletions
Original file line numberDiff line numberDiff line change
@@ -17,7 +17,8 @@
1717
.section .data // In RAM Please
1818

1919
.global run9900 // Entry point
20-
//.global instscnt // Global instruction counter
20+
21+
#include "pico.h" // For PICO_RP2040
2122

2223
//.extern F18A_PIX
2324

@@ -823,6 +824,7 @@ I_DIV: CMP R5,R4
823824
REV16 R2,R2
824825
ORRS R4,R2
825826

827+
#if PICO_RP2040 // This will be the only chip that has the hardware integer divider
826828
MOVS R2,#0xD0
827829
LSLS R2,#24 // -> 0xD0000000 = SIO_BASE
828830
STR R4,[R2, #0x60] // SIO_DIV_UDIVIDEND_OFFSET
@@ -840,6 +842,17 @@ I_DIV: CMP R5,R4
840842

841843
REV16 R4,R4
842844
STRH R4,[R6,#0]
845+
846+
#else // All newer chips can do divide
847+
UDIV R2,R4,R5 // Quotient in R2
848+
MLS R5,R2,R5,R4 // Remainder - R5=R4-(R2*R5)
849+
MOVS R4,#0xF7 // ~OV
850+
ANDS R1,R4
851+
852+
REV16 R2,R2
853+
STRH R2,[R6,#0]
854+
#endif
855+
843856
REV16 R5,R5
844857
STRH R5,[R6,#2]
845858
B start
@@ -1134,7 +1147,7 @@ OP_3LO: LSRS R2,R0,#13 // if ((BYTE & 0x30) == 0x20) Ts==2 (already checked Ts h
11341147
I_JMP: SXTH R0,R0 // R0 now has a signed offset
11351148
ASRS R0,#7 // Word offset
11361149
ADDS R4,R0,#2 // Does this jump to itself?
1137-
BNE dojump // Else quit the emulation
1150+
BNE dojmp2 // Else quit the emulation
11381151
// *********************************************************************************************
11391152
I_IDLE: ADR R0,RETCODE
11401153
STR R3,[R0,#0] // PC
@@ -1151,48 +1164,36 @@ I_IDLE: ADR R0,RETCODE
11511164
RETCODE: .WORD 0
11521165
// *********************************************************************************************
11531166
.align 4
1154-
I_JLT: SXTH R0,R0 // R0 now has a signed offset
1155-
ASRS R0,#7 // Word offset
1156-
MOVS R4,#0x60 // AG|EQ
1167+
I_JLT: MOVS R4,#0x60 // AG|EQ
11571168
TST R4,R1
11581169
BNE start // At least one of them was not zero
11591170
B dojump
11601171
// *********************************************************************************************
11611172
.align 4
1162-
I_JLE: SXTH R0,R0 // R0 now has a signed offset
1163-
ASRS R0,#7 // Word offset
1164-
LSRS R4,R1,#6 // EQ -> Carry
1173+
I_JLE: LSRS R4,R1,#6 // EQ -> Carry
11651174
BCS dojump
11661175
LSRS R4,R1,#8 // LG -> Carry
11671176
BCS start
11681177
B dojump
11691178
// *********************************************************************************************
11701179
.align 4
1171-
I_JEQ: SXTH R0,R0 // R0 now has a signed offset
1172-
ASRS R0,#7 // Word offset
1173-
LSRS R4,R1,#6 // EQ -> Carry
1180+
I_JEQ: LSRS R4,R1,#6 // EQ -> Carry
11741181
BCC start
11751182
B dojump
11761183
// *********************************************************************************************
11771184
.align 4
1178-
I_JHE: SXTH R0,R0 // R0 now has a signed offset
1179-
ASRS R0,#7 // Word offset
1180-
MOVS R4,#0xA0 // LG|EQ
1185+
I_JHE: MOVS R4,#0xA0 // LG|EQ
11811186
TST R4,R1
11821187
BEQ start // Both were zero
11831188
B dojump
11841189
// *********************************************************************************************
11851190
.align 4
1186-
I_JGT: SXTH R0,R0 // R0 now has a signed offset
1187-
ASRS R0,#7 // Word offset
1188-
LSRS R4,R1,#7 // AG -> Carry
1191+
I_JGT: LSRS R4,R1,#7 // AG -> Carry
11891192
BCC start
11901193
B dojump
11911194
// *********************************************************************************************
11921195
.align 4
1193-
I_JNE: SXTH R0,R0 // R0 now has a signed offset
1194-
ASRS R0,#7 // Word offset
1195-
LSRS R4,R1,#6 // EQ -> Carry
1196+
I_JNE: LSRS R4,R1,#6 // EQ -> Carry
11961197
BCS start
11971198
B dojump
11981199
// *********************************************************************************************
@@ -1234,7 +1235,9 @@ run9900:
12341235
B start
12351236
// *********************************************************************************************
12361237
.align 4
1237-
dojump: ADDS R3,R0
1238+
dojump: SXTH R0,R0 // R0 now has a signed offset
1239+
ASRS R0,#7 // Word offset
1240+
dojmp2: ADDS R3,R0 // Special entry point just for JMP
12381241
UXTH R3,R3 // Discard any extra
12391242
// *********************************************************************************************
12401243
start: MOV R0,R9
@@ -1257,47 +1260,35 @@ startX: REV16 R6,R0 // R6=INST|BYTE
12571260

12581261
// *********************************************************************************************
12591262
.align 4
1260-
I_JNC: SXTH R0,R0 // R0 now has a signed offset
1261-
ASRS R0,#7 // Word offset
1262-
LSRS R4,R1,#5 // C -> Carry
1263+
I_JNC: LSRS R4,R1,#5 // C -> Carry
12631264
BCS start
12641265
B dojump
12651266
// *********************************************************************************************
12661267
.align 4
1267-
I_JOC: SXTH R0,R0 // R0 now has a signed offset
1268-
ASRS R0,#7 // Word offset
1269-
LSRS R4,R1,#5 // C -> Carry
1268+
I_JOC: LSRS R4,R1,#5 // C -> Carry
12701269
BCC start
12711270
B dojump
12721271
// *********************************************************************************************
12731272
.align 4
1274-
I_JNO: SXTH R0,R0 // R0 now has a signed offset
1275-
ASRS R0,#7 // Word offset
1276-
LSRS R4,R1,#4 // O -> Carry
1273+
I_JNO: LSRS R4,R1,#4 // O -> Carry
12771274
BCS start
12781275
B dojump
12791276
// *********************************************************************************************
12801277
.align 4
1281-
I_JL: SXTH R0,R0 // R0 now has a signed offset
1282-
ASRS R0,#7 // Word offset
1283-
MOVS R4,#0xA0 // LG|EQ
1278+
I_JL: MOVS R4,#0xA0 // LG|EQ
12841279
TST R4,R1
12851280
BNE start // At least one of them was not zero
12861281
B dojump
12871282
// *********************************************************************************************
12881283
.align 4
1289-
I_JH: SXTH R0,R0 // R0 now has a signed offset
1290-
ASRS R0,#7 // Word offset
1291-
LSRS R4,R1,#6 // EQ -> Carry
1284+
I_JH: LSRS R4,R1,#6 // EQ -> Carry
12921285
BCS start
12931286
LSRS R4,R1,#8 // LG -> Carry
12941287
BCC start
12951288
B dojump
12961289
// *********************************************************************************************
12971290
.align 4
1298-
I_JOP: SXTH R0,R0 // R0 now has a signed offset
1299-
ASRS R0,#7 // Word offset
1300-
LSRS R4,R1,#3 // P -> Carry
1291+
I_JOP: LSRS R4,R1,#3 // P -> Carry
13011292
BCC start
13021293
B dojump
13031294
// *********************************************************************************************
@@ -1545,10 +1536,9 @@ I_XOP: // F18A PIX instruction
15451536
BICS R2,R7 // R2=000yyyyy 00000yyy
15461537

15471538
LSRS R4,R5,#8 // R4=00000000 xxxxxxxx
1548-
ADDS R2,R4 // R2=000yyyyy xxxxxzzz
15491539
MOVS R7,#7
1550-
ANDS R4,R7 // R4=00000000 00000xxx (bit offset)
1551-
SUBS R2,R4 // R2=000yyyyy xxxxxyyy (byte offset)
1540+
BICS R4,R7 // R4=00000000 xxxxx000
1541+
ORRS R2,R4 // R2=000yyyyy xxxxxyyy (byte offset)
15521542

15531543
ADR R7,VREGSL
15541544
LDR R7,[R7,#0] // Get offset

‎src/gpu.c‎

Lines changed: 19 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -15,6 +15,7 @@
1515

1616
#include "pico/stdlib.h"
1717
#include "hardware/structs/mpu.h"
18+
#include "pico.h" // For PICO_RP2040
1819

1920
#include <string.h> // memcpy
2021

@@ -61,9 +62,15 @@ static uint8_t preload [] = {
6162
* set up the MPU to guard a 256 byte page from a given address
6263
*/
6364
static void guard(void* a) {
64-
uintptr_t addr = (uintptr_t)a;
65-
mpu_hw->ctrl = 5;
66-
mpu_hw->rbar = (addr & (uint)~0xff) | M0PLUS_MPU_RBAR_VALID_BITS | 0;
65+
uintptr_t addr = (uintptr_t)a;
66+
#if PICO_RP2040 // Old memory protection unit
67+
mpu_hw->rbar = (addr & (uint)~0xff) | M0PLUS_MPU_RBAR_VALID_BITS | 0;
68+
mpu_hw->rasr = 1 | (0x07 << 1) | (0xfe << 8) | 0x10000000;
69+
#else
70+
mpu_hw->rnr = 0;
71+
mpu_hw->rbar = (addr & (uint)~31u) | (2u << M33_MPU_RBAR_AP_LSB) | M33_MPU_RBAR_XN_BITS;
72+
mpu_hw->rlar = (addr & (uint)~31u) | M33_MPU_RLAR_EN_BITS;
73+
#endif
6774
}
6875

6976
static int didFault = 0;
@@ -74,7 +81,7 @@ static int didFault = 0;
7481
void isr_hardfault () {
7582
didFault = 1;
7683
tms9918->registers [0x38] = 0; // Stop the GPU
77-
mpu_hw->rasr = 0; // Turn off memory protection
84+
mpu_hw->ctrl = 0; // Turn off memory protection - all models
7885
}
7986

8087
/*
@@ -114,9 +121,15 @@ static void __attribute__ ((noinline)) volatileHack () {
114121
restart:
115122
tms9918->registers [0x38] = 1;
116123
tms9918->status [2] |= 0x80; // Running
117-
mpu_hw->rasr = 1 | (0x07 << 1) | (0xfe << 8) | 0x10000000; // Turn on memory protection
124+
125+
#if PICO_RP2040 // Old memory protection unit
126+
mpu_hw->ctrl = M0PLUS_MPU_CTRL_PRIVDEFENA_BITS | M0PLUS_MPU_CTRL_ENABLE_BITS; // (=5) Turn on memory protection
127+
#else
128+
mpu_hw->ctrl = M33_MPU_CTRL_PRIVDEFENA_BITS | M33_MPU_CTRL_ENABLE_BITS; // (=5) Turn on memory protection
129+
#endif
118130
lastAddress = run9900 (&(tms9918->vram [0]), lastAddress, 0xFFFE, &(tms9918->registers [0x38]));
119-
mpu_hw->rasr = 0; // Turn off memory protection
131+
mpu_hw->ctrl = 0; // Turn off memory protection - all models
132+
120133
if (tms9918->registers [0x38] & 1) { // GPU program decided to stop itself?
121134
tms9918->gpuAddress = lastAddress;
122135
tms9918->restart = 0;

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