chore(metadata): full vyges-metadata.json with interfaces, rtl_files, schema

Author: shivarammysore

vyges-metadata.json

@@ -6,6 +6,8 @@
     "type": "git",
     "url": "https://github.com/lowRISC/opentitan",
     "commit": "304378684dfcf5be73bbd14faffa71790793d8c6",
+    "ip_path": "hw/ip/aon_timer",
+    "private": false,
     "rtl_path": "rtl",
     "rtl_files": [
       "rtl/aon_timer.sv",
@@ -14,5 +16,50 @@
       "rtl/aon_timer_reg_top.sv"
     ]
   },
-  "updated": "2026-02-19T06:03:45Z"
+  "updated": "2026-02-19T06:12:02Z",
+  "$schema": "https://vyges.com/schema/v1/vyges-metadata.schema.json",
+  "x-version": "1.0.0",
+  "description": "Aon Timer. OpenTitan IP block from hw/ip/aon_timer.",
+  "template": "opentitan-ip-template@1.0.0",
+  "target": [
+    "fpga",
+    "asic"
+  ],
+  "design_type": [
+    "digital"
+  ],
+  "maturity": "imported",
+  "created": "2026-02-19T06:12:02Z",
+  "interfaces": [
+    {
+      "type": "bus",
+      "direction": "input",
+      "protocol": "TL-UL",
+      "width": 32,
+      "description": "TL-UL host interface for register access"
+    },
+    {
+      "type": "bus",
+      "direction": "output",
+      "protocol": "Timer",
+      "description": "Always-on timer wakeup and interrupt"
+    }
+  ],
+  "categories": {
+    "primary": "timer",
+    "secondary": [
+      "low-power",
+      "always-on"
+    ],
+    "tags": [
+      "low-power",
+      "always-on",
+      "opentitan",
+      "lowrisc-opentitan"
+    ]
+  },
+  "community": {
+    "issues": "https://github.com/vyges-ip/opentitan-aon-timer/issues",
+    "contributions": "https://github.com/vyges-ip/opentitan-aon-timer/pulls"
+  }
 }