QSPI inital settings

Author: x-ximena

include/qspi_flash.h

@@ -0,0 +1,17 @@
+#ifndef ROCKETLIB_QSPI_FLASH.H
+#define ROCKETLIB_QSPI_FLASH.H
+
+#include <stdbool.h>
+#include <stdint.h>
+
+#include "common.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* ROCKETLIB_QSPI_FLASH.H */

stm32h7/mx25l25645g.c

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+#include "stm32h7xx_hal.h"
+
+// Normal SPI
+const QSPI_CommandTypeDef command = {
+    .Instruction = 0x0;
+    .Address = 0x014;
+    .AlternateBytes = 0x0;
+    .AdressSize = 0x0; // 8-bits
+    .AlternateBytesSize = 0x0;
+    .DummyCycles = 0x8;
+    .InstructionMode = 0x1; // Mode for a single line
+    .AddressMode = 0x1;
+    .AlternateBytesMode = 0x1;
+    .DataMode = 0x1;  
+    .NbData = 0x0;
+    .DdrMode = 0; // DDR disabled
+    .DdrHoldHalfCycle = 0x0;
+    .SIOOMode = 0x0;
+}
+
+// Quad SPI
+const QSPI_CommandTypeDef command = {
+    .Instruction = 0x0;
+    .Address = 0x014;
+    .AlternateBytes = 0x0;
+    .AdressSize = 0x0; // 8-bits
+    .AlternateBytesSize = 0x0;
+    .DummyCycles = 0x8;
+    .InstructionMode = 0x3; // Mode for four lines
+    .AddressMode = 0x3;
+    .AlternateBytesMode = 0x3;
+    .DataMode = 0x3; 
+    .NbData = 0x0;
+    .DdrMode = 0x1; // DDR enabled
+    .DdrHoldHalfCycle = 0x0;
+    .SIOOMode = 0x0;
+}
+
+// send to switch flash to qpsi mode
+wstatus_t qspi_switch() {
+    HAL_StatusTypeDef HAL_QSPI_Command (QSPI_HandleTypeDef * hqspi, QSPI_CommandTypeDef * cmd, uint32_t Timeout)
+}

stm32h7/mx25l25645g_defs.h

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+#ifndef ROCKETLIB_MX25l25645G_DEFS_H
+#define ROCKETLIB_MX25l25645G_DEFS_H
+
+#include <stdbool.h>
+#include <stdint.h>
+
+#include "common.h"
+
+typedef enum {
+    MX_CMD_READ = 0x03,
+    MX_CMD_FAST_READ = 0x0B,
+    MX_CMD_2READ = 0xBB,
+    MX_CMD_DREAD = 0x3B,
+    MX_CMD_4READ = 0xEB,
+    MX_CMD_QREAD = 0x6B,
+    MX_CMD_4DTRD = 0xED,
+    MX_CMD_PP = 0x02,
+    MX_CMD_4PP = 0x38,
+    MX_CMD_SE = 0x20,
+    MX_CMD_BE32K = 0x52,
+    MX_CMD_BE = 0xD8,
+    MX_CMD_CE = 0xC7
+} command_t;
+
+#endif /* ROCKETLIB_MX25l25645G_DEFS_H */