@@ -698,31 +698,6 @@ const ivt __attribute__((section(".image_vt"))) image_vector_table = {
698698 IVT_RSVD /* Reserved = 0 */
699699};
700700
701- /*******************************************************************************
702- * Variables for BOARD_BootClockRUN configuration
703- ******************************************************************************/
704- const clock_arm_pll_config_t armPllConfig_BOARD_BootClockRUN = {
705- .loopDivider = 100 , /* PLL loop divider, Fout = Fin * 50 */
706- .src = 0 , /* Bypass clock source, 0 - OSC 24M, 1 - CLK1_P and CLK1_N */
707- };
708- const clock_sys_pll_config_t sysPllConfig_BOARD_BootClockRUN = {
709- .loopDivider = 1 , /* PLL loop divider, Fout = Fin * ( 20 + loopDivider*2 + numerator / denominator ) */
710- .numerator = 0 , /* 30 bit numerator of fractional loop divider */
711- .denominator = 1 , /* 30 bit denominator of fractional loop divider */
712- .src = 0 , /* Bypass clock source, 0 - OSC 24M, 1 - CLK1_P and CLK1_N */
713- };
714- const clock_usb_pll_config_t usb1PllConfig_BOARD_BootClockRUN = {
715- .loopDivider = 0 , /* PLL loop divider, Fout = Fin * 20 */
716- .src = 0 , /* Bypass clock source, 0 - OSC 24M, 1 - CLK1_P and CLK1_N */
717- };
718- const clock_video_pll_config_t videoPllConfig_BOARD_BootClockRUN = {
719- .loopDivider = 31 , /* PLL loop divider, Fout = Fin * ( loopDivider + numerator / denominator ) */
720- .postDivider = 8 , /* Divider after PLL */
721- .numerator = 0 , /* 30 bit numerator of fractional loop divider, Fout = Fin * ( loopDivider + numerator / denominator ) */
722- .denominator = 1 , /* 30 bit denominator of fractional loop divider, Fout = Fin * ( loopDivider + numerator / denominator ) */
723- .src = 0 , /* Bypass clock source, 0 - OSC 24M, 1 - CLK1_P and CLK1_N */
724- };
725-
726701static void clock_init (void )
727702{
728703 if (CCM_ANALOG -> PLL_ARM & CCM_ANALOG_PLL_ARM_BYPASS_MASK ) {
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