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kaabiadanielinux
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fix(spi_flash): Resolve protocol errors and write verification bug
This commit improves the robustness and protocol compliance of the SPI flash driver by resolving critical bugs and standardizing command sequences. Key Changes: 1. **Write Verification Bug (spi_flash_write_sb):** * Replaced the complex bitwise verification logic with a direct comparison (`verify == buf[j]`) for robust data validation. 2. **Protocol Violations & Performance:** * **spi_flash_probe:** Fixed silent protocol failure by adding mandatory `WREN` before `WRSR` and adding explicit `wait_busy()` and `WRDI`. * **spi_flash_write_page:** Removed redundant `wait_busy()` after `WREN` to improve performance. * **Erase Functions:** Standardized erase flow by ensuring an explicit `wait_busy()` is performed after `WREN` before issuing the command. These changes prevent silent failures, potential flash corruption, and unnecessary latency. Signed-off-by: Badr Bacem KAABIA <[email protected]>
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src/spi_flash.c

Lines changed: 17 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -122,8 +122,6 @@ static int RAMFUNCTION spi_flash_write_page(uint32_t address, const void *data,
122122
while (len > 0) {
123123
wait_busy();
124124
flash_write_enable();
125-
wait_busy();
126-
127125
spi_cs_on(SPI_CS_PIO_BASE, SPI_CS_FLASH);
128126
spi_write(BYTE_WRITE);
129127
spi_read();
@@ -160,14 +158,21 @@ static int RAMFUNCTION spi_flash_write_sb(uint32_t address, const void *data, in
160158
spi_cs_off(SPI_CS_PIO_BASE, SPI_CS_FLASH);
161159
wait_busy();
162160
spi_flash_read(address, &verify, 1);
163-
if ((verify & ~(buf[j])) == 0) {
164-
if (verify != buf[j])
165-
return -1;
161+
/* Check if the read value matches the written value */
162+
if (verify == buf[j]) {
166163
j++;
167164
len--;
168165
address++;
169166
}
170-
wait_busy();
167+
else {
168+
/* Verification failed, return error */
169+
wolfBoot_printf(
170+
"SPI SB write verification failed at addr 0x%x. Wrote 0x%x, Read 0x%x\n",
171+
address,
172+
buf[j],
173+
verify);
174+
return -1;
175+
}
171176
}
172177
return 0;
173178
}
@@ -195,12 +200,16 @@ uint16_t spi_flash_probe(void)
195200
chip_write_mode = WB_WRITEPAGE;
196201

197202
#ifndef READONLY
203+
wait_busy();
204+
flash_write_enable();
198205
spi_cs_on(SPI_CS_PIO_BASE, SPI_CS_FLASH);
199206
spi_write(WRSR);
200207
spi_read();
201208
spi_write(0x00);
202209
spi_read();
203210
spi_cs_off(SPI_CS_PIO_BASE, SPI_CS_FLASH);
211+
wait_busy();
212+
flash_write_disable();
204213
#endif
205214

206215
wolfBoot_printf("SPI Probe: Manuf 0x%x, Product 0x%x\n", manuf, product);
@@ -224,6 +233,7 @@ int RAMFUNCTION spi_flash_sector_erase(uint32_t address)
224233

225234
wait_busy();
226235
flash_write_enable();
236+
wait_busy();
227237
spi_cs_on(SPI_CS_PIO_BASE, SPI_CS_FLASH);
228238
spi_write(SECTOR_ERASE);
229239
spi_read();
@@ -237,6 +247,7 @@ int RAMFUNCTION spi_flash_chip_erase(void)
237247
{
238248
wait_busy();
239249
flash_write_enable();
250+
wait_busy();
240251
spi_cs_on(SPI_CS_PIO_BASE, SPI_CS_FLASH);
241252
spi_write(CHIP_ERASE);
242253
spi_read();

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