@@ -45,6 +45,7 @@ This README describes configuration of supported targets.
4545* [ STM32F4] ( #stm32f4 )
4646* [ STM32F7] ( #stm32f7 )
4747* [ STM32G0] ( #stm32g0 )
48+ * [ STM32G4] ( #stm32g4 )
4849* [ STM32H5] ( #stm32h5 )
4950* [ STM32N6] ( #stm32n6 )
5051* [ STM32H7] ( #stm32h7 )
@@ -529,6 +530,79 @@ add-symbol-file test-app/image.elf 0x08008100
529530mon reset init
530531```
531532
533+ ## STM32G4
534+
535+ Supports STM32G4 single-bank Category 3 parts (verified on NUCLEO-G491RE,
536+ STM32G491RET6: 512KB flash, 96KB SRAM, Cortex-M4F).
537+
538+ The HAL boots at 170 MHz using HSI16 + PLL with PWR Range 1 Boost mode
539+ (RM0440 6.1.4), 4 flash wait states, prefetch + I/D-cache enabled.
540+
541+ Example 512KB partitioning on STM32G491RE:
542+
543+ - Sector size: 2KB
544+ - wolfBoot partition size: 32KB
545+ - Application partition size: 232KB
546+
547+ ``` C
548+ #define WOLFBOOT_SECTOR_SIZE 0x800 /* 2 KB */
549+ #define WOLFBOOT_PARTITION_BOOT_ADDRESS 0x08008000
550+ #define WOLFBOOT_PARTITION_SIZE 0x3A000 /* 232 KB */
551+ #define WOLFBOOT_PARTITION_UPDATE_ADDRESS 0x08042000
552+ #define WOLFBOOT_PARTITION_SWAP_ADDRESS 0x0807C000 /* 16 KB swap */
553+ ```
554+
555+ ### Building STM32G4
556+
557+ Reference configuration (see [ /config/examples/stm32g4.config] ( /config/examples/stm32g4.config ) ).
558+ You can copy this to wolfBoot root as ` .config ` : ` cp ./config/examples/stm32g4.config .config ` .
559+ To build you can use ` make ` .
560+
561+ The TARGET for this is ` stm32g4 ` : ` make TARGET=stm32g4 ` .
562+ Cortex-M4F is the default ARM core for this target.
563+ The option ` NVM_FLASH_WRITEONCE=1 ` is mandatory: the IAP driver writes one
564+ 64-bit doubleword per location and cannot rewrite without an erase first.
565+ The default signing scheme is ECC256 with SHA256.
566+
567+ NUCLEO-G491RE has no HSE, so HSI16 is used as the PLL source. The ST-LINK
568+ virtual COM port is wired to LPUART1 on PA2 (TX) / PA3 (RX) via AF12.
569+ Optional boot logs over LPUART1 at 115200 8N1 are enabled with
570+ ` CFLAGS_EXTRA+=-DDEBUG_UART ` .
571+
572+ This target is single-bank only -- keep ` DUALBANK_SWAP=0 ` .
573+
574+ ### STM32G4 Programming
575+
576+ Compile requirements: ` make TARGET=stm32g4 NVM_FLASH_WRITEONCE=1 `
577+
578+ The output is a single ` factory.bin ` that includes ` wolfboot.bin ` and
579+ ` test-app/image_v1_signed.bin ` combined together. This should be programmed
580+ to the flash start address ` 0x08000000 ` .
581+
582+ Flash using the STM32CubeProgrammer CLI:
583+
584+ ```
585+ STM32_Programmer_CLI -c port=swd -d factory.bin 0x08000000
586+ ```
587+
588+ ### STM32G4 Debugging
589+
590+ Use ` make DEBUG=1 ` and program firmware again.
591+
592+ Start GDB server on port 3333:
593+
594+ ```
595+ ST-LINK_gdbserver -d -e -r 1 -p 3333
596+ OR
597+ st-util -p 3333
598+ ```
599+
600+ ```
601+ arm-none-eabi-gdb
602+ add-symbol-file test-app/image.elf 0x08008100
603+ mon reset init
604+ ```
605+
532606## STM32C0
533607
534608Supports STM32C0x0/STM32C0x1. Instructions are for the STM Nucleo-C031C6 dev board.
0 commit comments