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Improve the cpp-check issue with spi_drv_stm32.c spi_write.
1 parent 2d3e1fc commit e353326

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2 files changed

+4
-12
lines changed

2 files changed

+4
-12
lines changed

hal/spi/spi_drv_stm32.c

Lines changed: 0 additions & 9 deletions
Original file line numberDiff line numberDiff line change
@@ -376,22 +376,13 @@ int qspi_transfer(uint8_t fmode, const uint8_t cmd,
376376
uint8_t RAMFUNCTION spi_read(void)
377377
{
378378
while (!(SPI1_SR & SPI_SR_RX_NOTEMPTY));
379-
#ifdef SPI1_RXDR
380379
return SPI1_RXDR;
381-
#else
382-
return SPI1_DR;
383-
#endif
384380
}
385381

386382
void RAMFUNCTION spi_write(const char byte)
387383
{
388384
while (!(SPI1_SR & SPI_SR_TX_EMPTY));
389-
390-
#ifdef SPI1_TXDR
391385
SPI1_TXDR = (uint8_t)byte;
392-
#else
393-
SPI1_DR = (uint8_t)byte;
394-
#endif
395386
}
396387
#endif /* SPI_FLASH || WOLFBOOT_TPM */
397388

hal/spi/spi_drv_stm32.h

Lines changed: 4 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -434,8 +434,8 @@
434434
#define SPI1_CFG2 (*(volatile uint32_t *)(SPI1_BASE + 0x0C))
435435
#define SPI1_SR (*(volatile uint32_t *)(SPI1_BASE + 0x14))
436436
#define SPI1_IFCR (*(volatile uint32_t *)(SPI1_BASE + 0x18))
437-
#define SPI1_TXDR (*(volatile uint8_t *)(SPI1_BASE + 0x20))
438-
#define SPI1_RXDR (*(volatile uint8_t *)(SPI1_BASE + 0x30))
437+
#define SPI1_TXDR (*(volatile uint8_t *)(SPI1_BASE + 0x20))
438+
#define SPI1_RXDR (*(volatile uint8_t *)(SPI1_BASE + 0x30))
439439

440440
#define SPI_CR1_SPI_EN (1 << 0)
441441
#define SPI_CR1_MASRX (1 << 8) /* master automatic suspension in Receive mode */
@@ -479,7 +479,8 @@
479479
#define SPI1_CR1 (*(volatile uint32_t *)(SPI1_BASE))
480480
#define SPI1_CR2 (*(volatile uint32_t *)(SPI1_BASE + 0x04))
481481
#define SPI1_SR (*(volatile uint32_t *)(SPI1_BASE + 0x08))
482-
#define SPI1_DR (*(volatile uint8_t *)(SPI1_BASE + 0x0c))
482+
#define SPI1_TXDR (*(volatile uint8_t *)(SPI1_BASE + 0x0c))
483+
#define SPI1_RXDR (*(volatile uint8_t *)(SPI1_BASE + 0x0c))
483484

484485
#define SPI_CR1_CLOCK_PHASE_SHIFT (0)
485486
#define SPI_CR1_CLOCK_POL_SHIFT (1)

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