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Add RealTek AmebaPro2 (RTL8735B) HUK crypto-callback port
Binds wolfCrypt AES (GCM/ECB/CBC/CTR) and HUK-bound ECDSA sign to the RTL8735B silicon Hardware Unique Key via the crypto-callback (CryptoCb) framework. A 256-bit seed runs through the HAL secure HKDF key-ladder against the HUK to land a device-bound working key in a secure key-storage slot; the working key never enters software. Pure crypto-callback device: no new wolfSSL core API or struct fields, and no changes to shared core files. AES reads its seed from the standard aes->devKey; ECDSA reads a port-defined wc_AmebaPro2_EccKey (the HUK-wrapped scalar + seed) the caller attaches via the standard ecc_key->devCtx. The HAL needs 32-byte-aligned DMA buffers, so unaligned iv/aad/in/out are bounced through aligned temporaries. Enabled with WOLFSSL_REALTEK_HUK + WOLF_CRYPTO_CB; --enable-amebapro2 builds a host compile-test against a HAL shim. Validated on RTL8735B silicon (FreeRTOS SDK and Zephyr): full wolfcrypt_test PASS, the HUK AES modes (incl. unaligned-buffer GCM), and HUK-bound ECDSA (P-256 signature verifies against the original public key). See wolfcrypt/src/port/realtek/README.md.
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‎configure.ac‎

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@@ -3212,6 +3212,25 @@ case "$ENABLED_STSAFE" in
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esac
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# RealTek AmebaPro2 (RTL8735B) HUK crypto-callback port.
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# On-target the application supplies the AmebaPro2 HAL include path. This option
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# is a host compile-test of the port: it swaps the HAL headers for a shim
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# (WOLFSSL_AMEBAPRO2_HOST_TEST) so the cryptocb dispatch and wiring build without
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# the vendor SDK. It forces crypto callbacks on (see the cryptocb block).
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# Example: "./configure --enable-amebapro2"
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ENABLED_AMEBAPRO2="no"
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AC_ARG_ENABLE([amebapro2],
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[AS_HELP_STRING([--enable-amebapro2],
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[Enable RealTek AmebaPro2 (RTL8735B) HUK crypto-callback port (host compile-test).])],
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[ ENABLED_AMEBAPRO2=$enableval ],
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[ ENABLED_AMEBAPRO2=no ])
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if test "x$ENABLED_AMEBAPRO2" != "xno"
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then
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AM_CFLAGS="$AM_CFLAGS -DWOLFSSL_REALTEK_HUK -DWOLFSSL_AMEBAPRO2_HOST_TEST -DHAVE_AES_ECB"
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fi
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# NXP SE050
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# Example: "./configure --with-se050=/home/pi/simw_top"
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ENABLED_SE050="no"
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[ ENABLED_CRYPTOCB_SW_TEST=yes ]
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)
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if test "x$ENABLED_PKCS11" = "xyes" || test "x$ENABLED_WOLFTPM" = "xyes" || test "$ENABLED_CAAM" != "no"
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if test "x$ENABLED_PKCS11" = "xyes" || test "x$ENABLED_WOLFTPM" = "xyes" || test "$ENABLED_CAAM" != "no" || test "x$ENABLED_AMEBAPRO2" != "xno"
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then
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ENABLED_CRYPTOCB=yes
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fi
@@ -12429,6 +12448,7 @@ AM_CONDITIONAL([BUILD_IOTSAFE],[test "x$ENABLED_IOTSAFE" = "xyes"])
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AM_CONDITIONAL([BUILD_IOTSAFE_HWRNG],[test "x$ENABLED_IOTSAFE_HWRNG" = "xyes"])
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AM_CONDITIONAL([BUILD_SE050],[test "x$ENABLED_SE050" = "xyes"])
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AM_CONDITIONAL([BUILD_STSAFE],[test "x$ENABLED_STSAFE" != "xno"])
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AM_CONDITIONAL([BUILD_AMEBAPRO2],[test "x$ENABLED_AMEBAPRO2" != "xno"])
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AM_CONDITIONAL([BUILD_TROPIC01],[test "x$ENABLED_TROPIC01" = "xyes"])
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AM_CONDITIONAL([BUILD_KDF],[test "x$ENABLED_KDF" = "xyes"])
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AM_CONDITIONAL([BUILD_HMAC],[test "x$ENABLED_HMAC" = "xyes"])
@@ -13008,6 +13028,7 @@ echo " * IoT-Safe: $ENABLED_IOTSAFE"
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echo " * IoT-Safe HWRNG: $ENABLED_IOTSAFE_HWRNG"
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echo " * NXP SE050: $ENABLED_SE050"
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echo " * STMicro STSAFE: $ENABLED_STSAFE"
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echo " * RealTek AmebaPro2 HUK: $ENABLED_AMEBAPRO2"
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echo " * TROPIC01: $ENABLED_TROPIC01"
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echo " * Maxim Integrated MAXQ10XX: $ENABLED_MAXQ10XX"
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echo " * PSA: $ENABLED_PSA"

‎wolfcrypt/src/include.am‎

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@@ -105,6 +105,9 @@ EXTRA_DIST += wolfcrypt/src/port/ti/ti-aes.c \
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wolfcrypt/src/port/st/README.md \
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wolfcrypt/src/port/st/STM32MP13.md \
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wolfcrypt/src/port/st/STM32MP25.md \
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wolfcrypt/src/port/realtek/amebapro2.c \
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wolfcrypt/src/port/realtek/amebapro2_shim.h \
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wolfcrypt/src/port/realtek/README.md \
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wolfcrypt/src/port/tropicsquare/tropic01.c \
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wolfcrypt/src/port/tropicsquare/README.md \
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wolfcrypt/src/port/af_alg/afalg_aes.c \
@@ -244,6 +247,10 @@ if BUILD_TROPIC01
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src_libwolfssl@LIBSUFFIX@_la_SOURCES += wolfcrypt/src/port/tropicsquare/tropic01.c
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endif
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if BUILD_AMEBAPRO2
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src_libwolfssl@LIBSUFFIX@_la_SOURCES += wolfcrypt/src/port/realtek/amebapro2.c
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endif
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if BUILD_PSA
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src_libwolfssl@LIBSUFFIX@_la_SOURCES += wolfcrypt/src/port/psa/psa.c
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src_libwolfssl@LIBSUFFIX@_la_SOURCES += wolfcrypt/src/port/psa/psa_hash.c

‎wolfcrypt/src/port/realtek/README.md‎

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# RealTek AmebaPro2 (RTL8735B) HUK Port
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Binds wolfCrypt keys to the RTL8735B silicon Hardware Unique Key (HUK) through
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the AmebaPro2 HAL crypto engine, via the wolfCrypt crypto-callback (CryptoCb)
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framework. A 256-bit "seed" is run through the HAL HKDF key-ladder against the
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HUK to land a device-bound working key in a secure key-storage slot; AES
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(GCM/ECB/CBC/CTR) then runs from that slot and the working key never enters
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software. It is a pure crypto-callback device and adds no wolfSSL core API or
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struct fields: AES reads its seed from the standard `aes->devKey`, and ECDSA
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reads a `wc_AmebaPro2_EccKey` (the HUK-wrapped scalar + seed) the caller attaches
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via the standard `ecc_key->devCtx`. This mirrors the device pattern the STM32
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DHUK port (`wc_Stm32_DhukRegister`) also uses.
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## Hardware
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RTL8735B / AmebaPro2 security blocks used by this port (from the
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`Ameba-AIoT/nuwa_hal_realtek` SDK, `rtl8735b` branch, headers under
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`ameba/amebapro2/source/fwlib/rtl8735b/include/`):
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- HUK in OTP: `SB_OTP_HIGH_VAL_HUK1` (0x21), `HUK2` (0x22), `HUK_RMA` (0x2F).
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- HKDF key-ladder in secure RAM: `hal_hkdf_hmac_sha256_secure_init`,
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`hal_hkdf_extract_secure_all`, `hal_hkdf_expand_secure_all` -- derive the HUK
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into a secure key-storage slot without exposing the key to software.
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- AES secure-key ops that reference the derived slot by number:
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`hal_crypto_aes_ecb_sk_init`, `hal_crypto_aes_gcm_sk_init` (key never leaves
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hardware).
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- The HUK-bound ECDSA sign path reuses the AES secure-key engine above to unwrap
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the wrapped scalar, then signs in software. The HW ECDSA engine (`hal_ecdsa.h`)
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and OTP-resident ECDSA keys (`hal_otp_ecdsa_key_*`) are follow-ons, not yet
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used.
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- TRNG (`hal_trng.h`); the `ameba-zephyr-pro2-platform` repo provides a Zephyr
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entropy driver (`entropy_amebapro2.c`, DT `realtek,amebapro2-trng`) that feeds
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wolfCrypt's `wc_GenerateSeed` via `sys_rand_get`.
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## Enabling
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```c
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#define WOLFSSL_REALTEK_HUK /* enable the AmebaPro2 HUK device */
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#define WOLF_CRYPTO_CB /* required -- HUK routes through crypto callbacks */
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```
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Set these in `user_settings.h`. The application/board CMake must add
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the AmebaPro2 HAL include directory (e.g.
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`.../fwlib/rtl8735b/include/`) to the wolfSSL library include path so this port
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can include `hal_crypto.h` and `hal_hkdf.h`.
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Configurable (override in `user_settings.h` before including wolfSSL):
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| Macro | Default | Meaning |
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|--------------------------------|---------|--------------------------------------|
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| `WC_HUK_DEVID` | 809 | CryptoCb device id (STM32 DHUK is 808) |
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| `WC_AMEBAPRO2_HUK_SK_IDX` | 1 | Secure-key slot holding the HUK (HUK1) |
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| `WC_AMEBAPRO2_HKDF_PRK_IDX` | 3 | Intermediate HKDF PRK slot |
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| `WC_AMEBAPRO2_DERIVED_WB_IDX` | 4 | Derived working-key slot (AES uses it) |
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| `WC_AMEBAPRO2_HKDF_CRYPTO_SEL` | 0 | `crypto_sel` for the secure HKDF init |
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| `WC_AMEBAPRO2_MAX_WRAPPED` | 96 | Max wrapped-scalar blob the ECDSA sign path unwraps |
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## API
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```c
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#include <wolfssl/wolfcrypt/port/realtek/amebapro2.h>
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/* One-time: register the AmebaPro2 HUK crypto-callback device. */
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wc_AmebaPro2_HukRegister(WC_HUK_DEVID);
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/* AES / GCM: enable via devId at init, then pass the 256-bit seed as the key.
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* The seed is HKDF input that diversifies the HUK -- it is NOT the AES key. */
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Aes aes;
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byte seed[32]; /* per-purpose derivation seed (need not be secret) */
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wc_AesInit(&aes, NULL, WC_HUK_DEVID);
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wc_AesGcmSetKey(&aes, seed, 32);
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wc_AesGcmEncrypt(&aes, ct, pt, ptSz, iv, 12, tag, tagSz, aad, aadSz); /* full GCM */
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wc_AesFree(&aes);
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/* AES-ECB / AES-CBC follow the same pattern (wc_AesSetKey + wc_AesEcb*/
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/* wc_AesCbc* with devId = WC_HUK_DEVID). */
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wc_AmebaPro2_HukUnRegister(WC_HUK_DEVID);
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```
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The seed maps to a device-bound working key as:
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HUK (slot `WC_AMEBAPRO2_HUK_SK_IDX`) -> `hal_hkdf_extract_secure_all` -> PRK slot
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-> `hal_hkdf_expand_secure_all` -> working key in `WC_AMEBAPRO2_DERIVED_WB_IDX`
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-> `hal_crypto_aes_gcm_sk_init` / `hal_crypto_aes_ecb_sk_init`. The derive and
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the AES op run under one crypto-mutex hold; the working key never enters
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software. Identical seed -> identical working key (deterministic, so GMAC
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verifies and AES round-trips); a wrong seed yields a different key (GCM decrypt
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returns `AES_GCM_AUTH_E`).
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HUK-bound ECDSA sign (Stage 3, wrapped-scalar): point the key's crypto-callback
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context at a `wc_AmebaPro2_EccKey` (the scalar AES-wrapped under a HUK-derived
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key, plus its 32-byte seed) -- no dedicated wolfSSL import API:
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```c
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#include <wolfssl/wolfcrypt/port/realtek/amebapro2.h>
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wc_AmebaPro2_EccKey hk = { seed, 32, wrapped, wrappedLen, plainLen };
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ecc_key key;
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wc_ecc_init_ex(&key, NULL, WC_HUK_DEVID);
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wc_ecc_set_curve(&key, plainLen, ECC_SECP256R1);
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key.devCtx = &hk; /* borrowed; must outlive the key */
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wc_ecc_sign_hash(hash, hashSz, sig, &sigSz, rng, &key);
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```
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At sign time the port derives the slot key from the seed, ECB-unwraps the scalar
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into a short-lived buffer, signs, and scrubs it. The wrapped blob is device-bound
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(it only unwraps on the silicon whose HUK produced the slot key). The scalar is
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briefly in software during the sign; an OTP-resident model (`hal_ecdsa_select_prk`,
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scalar never in software) and routing the sign itself through the HW ECDSA engine
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(`hal_ecdsa`) are follow-ons.
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## Notes / limitations
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- The HAL GCM path assumes a 96-bit (12-byte) IV (standard J0). A non-12-byte
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IV returns a hard error (not a software fallback, which would key off the seed
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rather than the device-bound key).
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- AES-CBC and AES-CTR chain in software over single-block
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`hal_crypto_aes_ecb_sk_*` calls because the HAL exposes no CBC/CTR secure-key
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variant; the key still stays in hardware. CTR maintains the wolfCrypt counter
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state (`aes->reg`/`tmp`/`left`) so partial blocks continue across calls.
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- The HAL crypto engine DMAs its buffers on 32-byte (cache-line) boundaries and
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rejects an unaligned GCM iv/aad. The port stages key/iv/aad/tag on aligned
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temporaries and bounces unaligned in/out through aligned buffers, so callers
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need not align.
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- Each operation derives the working key from the Aes' own `devKey` seed under
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the crypto mutex (no shared port global), so concurrent `Aes` objects are
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safe.
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- `--enable-amebapro2` builds a host compile-test only: it swaps the HAL headers
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for `amebapro2_shim.h` (sentinel stubs, no real crypto) to exercise the
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crypto-callback dispatch and build wiring without the vendor SDK. All
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functional validation requires RTL8735B hardware.
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## Status
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Validated on RTL8735B silicon (both the RealTek FreeRTOS SDK app and a Zephyr
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image): registration; AES-GCM (encrypt / deterministic tag / decrypt-verify /
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round-trip / wrong-seed -> `AES_GCM_AUTH_E` / unaligned buffers / non-12-byte-IV
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reject); AES-ECB; AES-CBC (incl. in-place, multi-call); AES-CTR; and HUK-bound
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ECDSA (P-256) -- all pass.
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- Stage 0 (skeleton, build wiring, host compile-test): done.
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- Stage 1 (HUK key-ladder + full AES-GCM): done, validated on hardware.
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- Stage 2 (AES-ECB / AES-CBC / AES-CTR): done, validated on hardware.
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- Stage 3 (HUK-bound ECDSA sign, wrapped-scalar): done, validated on RTL8735B
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(P-256 sign verifies against the original public key; tampered hash fails).
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OTP-resident keys and HW-ECDSA-engine signing are follow-ons.
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## Benchmarks (software crypto baseline)
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`wolfcrypt_test` (full self-test, all PASS) and `wolfcrypt_benchmark` were run on
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the RTL8735B EVB to validate the core library and toolchain on this target. The
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figures below are **pure software wolfCrypt** -- they are NOT the HUK device
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(which routes AES through the silicon engine for HUK-derived keys); they serve as
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a reference baseline and to size the benefit of hardware offload.
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- Target: RTL8735B "KM4" Arm Cortex-M33 (ARMv8-M Mainline, TrustZone + DSP) at
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500 MHz (`CPU_CLK`); DDR at 533 MHz.
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- Toolchain / build: RealTek ASDK 10.3.0 (GCC 10.3.0), SDK default `-Os`,
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FreeRTOS, `WOLFCRYPT_ONLY`, `SINGLE_THREADED`, big-integer math via the generic
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`WOLFSSL_SP_MATH_ALL` (portable C, no Cortex-M assembly), `BENCH_EMBEDDED`.
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- Build options live with the SDK example (not in the wolfSSL tree):
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`component/example/wolfcrypt_test/{user_settings.h, wolfcrypt_test.cmake,
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main.c}` of the AmebaPro2 FreeRTOS SDK. The RNG is seeded from the SDK
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`rtw_get_random_bytes`; `current_time()` uses `hal_read_systime_us()`.
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Symmetric / hash (higher is better):
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| Algorithm | Throughput |
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|---------------------|------------|
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| AES-128-CBC enc/dec | 9.55 / 9.67 MiB/s |
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| AES-256-CBC enc/dec | 7.25 / 7.02 MiB/s |
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| AES-128-GCM enc/dec | 5.35 / 5.33 MiB/s |
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| AES-256-GCM enc/dec | 4.53 / 4.52 MiB/s |
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| AES-128-CTR | 9.75 MiB/s |
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| AES-128-ECB enc/dec | 10.42 / 10.56 MiB/s |
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| AES-CCM enc/dec | 4.73 / 4.65 MiB/s |
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| GMAC (4-bit table) | 13.43 MiB/s |
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| AES-128-CMAC | 8.84 MiB/s |
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| ChaCha20 | 24.79 MiB/s |
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| ChaCha20-Poly1305 | 15.83 MiB/s |
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| Poly1305 | 64.77 MiB/s |
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| SHA-1 | 29.19 MiB/s |
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| SHA-256 | 10.94 MiB/s |
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| SHA-512 | 7.29 MiB/s |
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| SHA3-256 | 6.61 MiB/s |
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| HMAC-SHA256 | 10.85 MiB/s |
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Public key (higher is better):
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| Operation | Rate |
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|-----------------------|------|
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| RSA-2048 public | 214.7 ops/s |
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| RSA-2048 private | 6.14 ops/s |
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| RSA-2048 key gen | 0.40 ops/s |
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| DH-2048 key gen/agree | 17.67 / 15.23 ops/s |
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| ECDSA P-256 sign/verify | 40.03 / 29.81 ops/s |
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| ECDHE P-256 agree | 40.69 ops/s |
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| Curve25519 key gen/agree | 414.8 / 419.4 ops/s |
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| Ed25519 sign/verify | 788.3 / 397.0 ops/s |
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The tables above are the portable-C baseline. The assembly backends below raise
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these substantially. Curve25519/Ed25519 already use the dedicated
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`curve25519.c`/`ed25519.c` fast code.
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## Optimizations (measured on RTL8735B @ 500 MHz, -Os)
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Two wolfCrypt assembly backends apply to this Cortex-M33 and were validated on
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hardware (both keep `wolfcrypt_test` all-PASS). Neither needs wolfSSL source
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changes -- they are build-config selections plus adding the relevant asm files.
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### 1. Public key -- `sp_cortexm.c` (Thumb-2/DSP single-precision)
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Enable with `WOLFSSL_SP_ARM_CORTEX_M_ASM` + `WOLFSSL_HAVE_SP_RSA` +
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`WOLFSSL_HAVE_SP_ECC` + `WOLFSSL_HAVE_SP_DH`, and add `wolfcrypt/src/sp_cortexm.c`
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to the build (alongside the generic `sp_int.c` for sizes without an asm path).
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| Operation | Generic C | sp_cortexm | Speedup |
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|------------------------|-----------|------------|---------|
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| ECC P-256 key gen | 40.7 | 541.2 ops/s | 13.3x |
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| ECDSA P-256 sign | 40.0 | 427.6 ops/s | 10.7x |
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| ECDSA P-256 verify | 29.8 | 292.7 ops/s | 9.8x |
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| ECDHE P-256 agree | 40.7 | 318.1 ops/s | 7.8x |
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| RSA-2048 public | 214.7 | 618.4 ops/s | 2.9x |
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| RSA-2048 private | 6.14 | 19.0 ops/s | 3.1x |
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| DH-2048 agree | 15.2 | 38.3 ops/s | 2.5x |
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### 2. Symmetric -- Thumb-2 asm (`port/arm/thumb2-*-asm.S`)
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Enable with `WOLFSSL_ARMASM` + `WOLFSSL_ARMASM_THUMB2` +
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`WOLFSSL_ARMASM_NO_HW_CRYPTO` + `WOLFSSL_ARMASM_NO_NEON` + `WOLFSSL_ARM_ARCH=7`,
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and add `thumb2-aes-asm.S`, `thumb2-sha256-asm.S`, `thumb2-sha512-asm.S`,
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`thumb2-sha3-asm.S`, `thumb2-chacha-asm.S`, `thumb2-poly1305-asm.S`.
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`WOLFSSL_ARMASM` is a global switch, so provide the `.S` for every covered
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module. (Curve25519/Ed25519 also have Thumb-2 asm but their `ge_operations.c`
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integration assumes 64-bit and was left on the C path here.)
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| Algorithm | Generic C | Thumb-2 asm | Speedup |
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|---------------------|-----------|-------------|---------|
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| AES-128-CBC enc | 9.55 | 20.85 MiB/s | 2.2x |
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| AES-128-ECB enc | 10.42 | 20.82 MiB/s | 2.0x |
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| AES-128-CTR | 9.75 | 20.47 MiB/s | 2.1x |
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| AES-128-GCM enc | 5.35 | 10.30 MiB/s | 1.9x |
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| GMAC | 13.43 | 20.81 MiB/s | 1.5x |
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| AES-128-CMAC | 8.84 | 14.67 MiB/s | 1.7x |
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| ChaCha20 | 24.79 | 46.44 MiB/s | 1.9x |
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| ChaCha20-Poly1305 | 15.83 | 25.38 MiB/s | 1.6x |
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| SHA-256 | 10.94 | 17.83 MiB/s | 1.6x |
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| SHA3-256 | 6.61 | 8.64 MiB/s | 1.3x |
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| HMAC-SHA256 | 10.85 | 17.66 MiB/s | 1.6x |
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### Note on hardware offload
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For AES, hashing and ECDSA the RTL8735B has a dedicated crypto engine (the HAL
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`hal_crypto_*` / `hal_ecdsa` blocks this HUK port already uses for HUK-derived
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keys). A general (any-key) HW crypto-callback port over that engine would beat
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the Thumb-2 software figures above and is the recommended production path for
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symmetric throughput; the Thumb-2 asm is the portable software fallback. The
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`sp_cortexm.c` PK speedup is worth taking regardless, since it needs no silicon
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support.

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