Fix STM32 CubeMX AES callback clock cleanup and error mapping

Author: dgarske

wolfcrypt/src/port/st/README.md

@@ -101,7 +101,7 @@ Some newer families (H5/H7S/U3/U5/WBA/C5/N6, plus the L562 sub-variant) expose a
 wc_Stm32_DhukRegister(devId);      /* once; serves AES + ECDSA (+ CCB) */
 ```
 
-(For an AES-only build without CCB/ECC, `wc_Stm32_CubeAesRegister(devId)` registers a cipher-only device.) HW PKA on the HAL build requires the application to build/link ST's `stm32XXxx_hal_pka.c` and provide a `PKA_HandleTypeDef hpka;` initialized with `HAL_PKA_Init(&hpka)` (a CubeMX `MX_PKA_Init`); wolfSSL references `hpka` as `extern`. Note: CCB key *provisioning* (`wc_ecc_make_key`) derives the scalar in software, so it needs a build without `WOLF_CRYPTO_CB_ONLY_ECC` -- provision the CCB blob there, after which CCB *sign* runs under the stripped config. Worked examples in [`STM32_Bare_Test`](https://github.com/wolfSSL/wolfssl-examples-stm32): `main_cubeaes.c` (AES) and `main_cubecrypto.c` (ECC + CCB + AES), validated on NUCLEO-U385RG-Q.
+(For a build without CCB, `wc_Stm32_CubeAesRegister(devId)` registers the same CubeMX device: AES, plus ECDSA sign/verify on the HW PKA when `WOLFSSL_STM32_PKA` is enabled -- so it also satisfies `WOLF_CRYPTO_CB_ONLY_ECC` without CCB. It falls back to cipher-only when the PKA is not built in.) HW PKA on the HAL build requires the application to build/link ST's `stm32XXxx_hal_pka.c` and provide a `PKA_HandleTypeDef hpka;` initialized with `HAL_PKA_Init(&hpka)` (a CubeMX `MX_PKA_Init`); wolfSSL references `hpka` as `extern`. Note: CCB key *provisioning* (`wc_ecc_make_key`) derives the scalar in software, so it needs a build without `WOLF_CRYPTO_CB_ONLY_ECC` -- provision the CCB blob there, after which CCB *sign* runs under the stripped config. Worked examples in [`STM32_Bare_Test`](https://github.com/wolfSSL/wolfssl-examples-stm32): `main_cubeaes.c` (AES) and `main_cubecrypto.c` (ECC + CCB + AES), validated on NUCLEO-U385RG-Q.
 
 ### Coding
 

wolfcrypt/src/port/st/stm32.c

@@ -5090,6 +5090,9 @@ static int Stm32Cube_AesEcb(struct Aes* aes, byte* out, const byte* in,
 
     ret = wolfSSL_CryptHwMutexLock();
     if (ret != 0) {
+        /* wc_Stm32_Aes_Init enabled the CRYP clock (STM32_HW_CLOCK_AUTO);
+         * release it before bailing out. */
+        wc_Stm32_Aes_Cleanup();
         return ret;
     }
 
@@ -5129,7 +5132,9 @@ static int Stm32Cube_AesEcb(struct Aes* aes, byte* out, const byte* in,
     }
 #endif
     if (ret != HAL_OK) {
-        ret = WC_TIMEOUT_E;
+        /* Keep HAL_TIMEOUT distinct from HAL_ERROR/HAL_BUSY so callers and
+         * debugging can tell a real timeout from a HW fault. */
+        ret = (ret == HAL_TIMEOUT) ? WC_TIMEOUT_E : WC_HW_E;
     }
 
     HAL_CRYP_DeInit(&hcryp);

wolfssl/wolfcrypt/port/st/stm32.h

@@ -1000,10 +1000,13 @@ int stm32_ecc_sign_hash_ex(const byte* hash, word32 hashlen, struct WC_RNG* rng,
     void wc_Stm32_DhukUnRegister(int devId);
 #endif
 
-/* CubeMX/HAL AES crypto-callback device. Register at a devId, then init an Aes
- * with it (wc_AesInit) to run AES on the HAL through the crypto callback -- this
- * makes WOLF_CRYPTO_CB_ONLY_AES work on the HAL build. With WOLFSSL_STM32_CCB
- * enabled, wc_Stm32_DhukRegister already covers AES too (same devId). */
+/* CubeMX/HAL crypto-callback device. Register at a devId, then init an Aes
+ * with it (wc_AesInit) to run AES on the HAL through the crypto callback --
+ * this makes WOLF_CRYPTO_CB_ONLY_AES work on the HAL build. When
+ * WOLFSSL_STM32_PKA && HAVE_ECC are also enabled it additionally routes ECDSA
+ * sign/verify to the HW PKA, so it satisfies WOLF_CRYPTO_CB_ONLY_ECC too (no
+ * CCB required). With WOLFSSL_STM32_CCB enabled, wc_Stm32_DhukRegister already
+ * covers AES + ECDSA (same devId). */
 #if defined(WOLFSSL_STM32_CUBEMX) && defined(WOLF_CRYPTO_CB)
     int  wc_Stm32_CubeAesRegister(int devId);
     void wc_Stm32_CubeAesUnRegister(int devId);