Small error in doc/cpu_td4.jpg

[Odie-123]

Hi,
there is a small error in the circuit diagram at doc/cpu_td4.jpg (see attached image). The NAND gate used as an inverter (IC10, 7410) is not connected to D7 but to D6. In your PowerPoint (多谐振荡器.ppt) it is drawn correctly.

Your 4-BIT CPU is a really nice and clever design!

Greetings,
Odie-123

[TzOk83]

Also clock and reset lines are swapped.

What I don't understand is why all registers are done on 74HC161, which are counters?

[wuxx]

Yes, the schematic in the hardware directory is correct, while the one in the doc directory is collected from the internet and may contain minor errors