Support Z80 part with cache

[0x444454]

Memory access is still a bottleneck.
Consider using a more modern CPU (e.g. Z280) which adds instruction and data cache, plus several other nice features.
See also here:

https://github.com/Konamiman/Z280TechnicalManual/blob/master/A-Z80_Z280_Compatibility.md

[ytmytm]

Interesting, I didn't know about this part. Thanks!

I'll put it on my to do list to obtain it to see if it can be used as a drop-in replacement here.

[lgblgblgb]

I'm not sure about Z280, but for Z180, it's problematic as it does not implement all Z80 things, for example the "undocumented" opcodes like using the IX register as two 8 bit ones (IXL and IXH) + same for IY, and possible other stuffs. Also, there can be a problem, that more modern Z80-compatible CPUs/MCUs have on-chip peripherals which uses the I/O space partly and I/O ops are not even routed then to the outside bus :( For example the "very modern" eZ80 would be nice to use in places where I have a Z80 but there for example every ports 0x00...0xFF are used by the chip itself :( So usually is a big no-no to use them in existing designs then, where Z80 was used before :( But I would be very much interested to know if there is a good candidate to replace existing Z80 with a more modern parts which do not have problems like I mentioned ...

[0x444454]

Indeed, the eZ80 and other modern Z80 variants may be tricky to adapt, but most importantly they don’t have cache memory so even if they are more efficient at the same clock frequency, they will still be impacted by the C128 memory bottleneck.

I am not an expert on the Z280, so I am not sure how feasible/easy it is to use it as a replacement.
While the Z280 can be configured to work on a classic 8-bit Z80 bus (“OPT” pin tied to GND), it still multiplexes (AD0..AD7), so there is at least some demultiplexing needed.

[lgblgblgb]

Btw eZ80 - IMHO/IIRC - also has a Z80 bus mode, I would more worrying on other details as well (and yes, eZ80 doesn't have a cache, in fact one of the design factors was that SRAM is cheaper/faster than ever before so even no need for that ... unlike with some older though newer than Z80-family parts).

[ytmytm]

Perhaps such Z80 replacement should be isolated from C128 bus until access is needed. Something like this project for C64: https://github.com/kneehighspy/Z80-Card_for_Commodore_C64
just not in form of a cartridge, but something that would be plugged into Z80 socket on C128's mainboard.

[ytmytm]

Here is an early attempt. The whole project is attached. The GAL code is exactly the same as here.

z280-dot-gal-latch.zip

Today I ran some tests on this daughterboard.

Unfortunately it doesn't work as it should yet - the computer doesn't enter C128 mode.
The test program that I put into diagnostic ROM (offset $5000 within 32K Kernal ROM, that appears at $0000 for Z80 after reset).
The program just increases border colour in a loop:

	LD BC, $D020
	LD A, 0
LOOP:	OUT (C), A
	INC A
	JR LOOP

I get different patterns at:

• normal clock (2 cycles / within low phase of 1 MHz tick)
• at dot clock speed (4 cycles)
• at doubled dot clock (8 cycles)
• even at quadrupled (16 cycles)

With faster clocks I have to reset mutliple times until correct startup. With normal clock it works almost every time.

Once it starts it's completely stable, won't lock up randomly.

I also get different patterns with Z280 memory cache enabled, so I suppose that feature works too:

	LD C, $12	; cache control register
	LD L, 00001000b ; enable data cache, enable code cache
	.db 0edh,6eh ; ldctl	(c),hl 

I gather from this that:

• the circuit in general works and I got the shared address/data bus right
• reading code from ROM works
• outputing data to I/O works

Project files are attached here, they need two modifications for the next revision:

• U2/U6 74'373 /OE (pin 1) has to be tied to GND, connecting it to CLK1MHZ was not a good idea (as suspected); without /OE another part can be used (like in ZZ80RC project)
• JP5: CLKFAST/CLKOUT jumper is useless, should be connected to CLKOUT at all times

A Z80 diagnostic code that doesn't use RAM would be nice. Right now I can't enter C128 mode, so I have no way of testing memory access without writing some more elaborate Z80 code and I'm not Z80 coder.

References:

• https://github.com/wwarthen/CPU280/
• https://github.com/Plasmode/ZZ80RC