soc: intel_adsp: condition mem-coherence select on cache mgmt

The ADSP family and both series symbols select
CACHE_CAN_SAY_MEM_COHERENCE unconditionally, but that symbol is only
defined under CACHE_MANAGEMENT, so a build that turns cache management
off aborts on an unsatisfiable select. Guard the three selects with the
dependency they need.

Signed-off-by: Benjamin Cabé <benjamin@zephyrproject.org>
Assisted-by: Claude:opus-5

Author: kartben

soc/intel/intel_adsp/Kconfig

@@ -9,7 +9,7 @@ config SOC_FAMILY_INTEL_ADSP
 	select CPU_HAS_DCACHE
 	select CPU_HAS_ICACHE
 	select CPU_CACHE_INCOHERENT
-	select CACHE_CAN_SAY_MEM_COHERENCE
+	select CACHE_CAN_SAY_MEM_COHERENCE if CACHE_MANAGEMENT
 	select SOC_HAS_CACHE_FUNCTIONS
 	select IPC_SERVICE if DT_HAS_INTEL_ADSP_HOST_IPC_ENABLED
 	imply XTENSA_ENABLE_BACKTRACE

soc/intel/intel_adsp/ace/Kconfig

@@ -6,7 +6,7 @@ config SOC_SERIES_INTEL_ADSP_ACE
 	select XTENSA
 	select XTENSA_HAL if (("$(ZEPHYR_TOOLCHAIN_VARIANT)" != "xcc") && ("$(ZEPHYR_TOOLCHAIN_VARIANT)" != "xt-clang"))
 	select ATOMIC_OPERATIONS_BUILTIN if "$(ZEPHYR_TOOLCHAIN_VARIANT)" != "xcc"
-	select CACHE_CAN_SAY_MEM_COHERENCE
+	select CACHE_CAN_SAY_MEM_COHERENCE if CACHE_MANAGEMENT
 	select ARCH_HAS_DIRECTED_IPIS
 	select SCHED_IPI_SUPPORTED if SMP
 	select ARCH_HAS_CUSTOM_CPU_IDLE

soc/intel/intel_adsp/cavs/Kconfig

@@ -10,7 +10,7 @@ config SOC_SERIES_INTEL_ADSP_CAVS
 	select XTENSA_USE_CORE_CRT1
 	select ATOMIC_OPERATIONS_BUILTIN if "$(ZEPHYR_TOOLCHAIN_VARIANT)" != "xcc"
 	select ATOMIC_OPERATIONS_ARCH if "$(ZEPHYR_TOOLCHAIN_VARIANT)" = "xcc"
-	select CACHE_CAN_SAY_MEM_COHERENCE
+	select CACHE_CAN_SAY_MEM_COHERENCE if CACHE_MANAGEMENT
 	select ARCH_HAS_GDBSTUB
 	select HAS_PM
 	select PM_STATE_SET_IRQ_UNLOCKED