diff --git a/bfd/archures.c b/bfd/archures.c
index 5c104af6ef35..e4cede3f49d9 100644
--- a/bfd/archures.c
+++ b/bfd/archures.c
@@ -454,6 +454,7 @@ DESCRIPTION
.#define bfd_mach_rx 0x75
.#define bfd_mach_rx_v2 0x76
.#define bfd_mach_rx_v3 0x77
+.#define bfd_mach_rx_v3_dfpu 0x78
. bfd_arch_s390, {* IBM s390. *}
.#define bfd_mach_s390_31 31
.#define bfd_mach_s390_64 64
@@ -536,6 +537,10 @@ DESCRIPTION
.#define bfd_mach_aarch64_8R 1
.#define bfd_mach_aarch64_ilp32 32
.#define bfd_mach_aarch64_llp64 64
+. bfd_arch_nios2, {* Nios II. *}
+.#define bfd_mach_nios2 0
+.#define bfd_mach_nios2r1 1
+.#define bfd_mach_nios2r2 2
. bfd_arch_visium, {* Visium. *}
.#define bfd_mach_visium 1
. bfd_arch_wasm32, {* WebAssembly. *}
@@ -677,6 +682,7 @@ extern const bfd_arch_info_type bfd_msp430_arch;
extern const bfd_arch_info_type bfd_mt_arch;
extern const bfd_arch_info_type bfd_nds32_arch;
extern const bfd_arch_info_type bfd_nfp_arch;
+extern const bfd_arch_info_type bfd_nios2_arch;
extern const bfd_arch_info_type bfd_ns32k_arch;
extern const bfd_arch_info_type bfd_or1k_arch;
extern const bfd_arch_info_type bfd_pdp11_arch;
@@ -765,6 +771,7 @@ static const bfd_arch_info_type * const bfd_archures_list[] =
&bfd_mt_arch,
&bfd_nds32_arch,
&bfd_nfp_arch,
+ &bfd_nios2_arch,
&bfd_ns32k_arch,
&bfd_or1k_arch,
&bfd_pdp11_arch,
diff --git a/bfd/bfd-in2.h b/bfd/bfd-in2.h
index a2f75b258c4c..1a98ed75381a 100644
--- a/bfd/bfd-in2.h
+++ b/bfd/bfd-in2.h
@@ -1719,6 +1719,7 @@ enum bfd_architecture
#define bfd_mach_rx 0x75
#define bfd_mach_rx_v2 0x76
#define bfd_mach_rx_v3 0x77
+#define bfd_mach_rx_v3_dfpu 0x78
bfd_arch_s390, /* IBM s390. */
#define bfd_mach_s390_31 31
#define bfd_mach_s390_64 64
diff --git a/bfd/cpu-rx.c b/bfd/cpu-rx.c
index a5fccbe7d6a6..a78dbdfb9801 100644
--- a/bfd/cpu-rx.c
+++ b/bfd/cpu-rx.c
@@ -1,5 +1,5 @@
/* BFD support for the RX processor.
- Copyright (C) 2008-2024 Free Software Foundation, Inc.
+ Copyright (C) 2008-2025 Free Software Foundation, Inc.
This file is part of BFD, the Binary File Descriptor library.
@@ -27,12 +27,13 @@
bfd_default_compatible, bfd_default_scan, \
bfd_arch_default_fill, next, 0 }
-static const bfd_arch_info_type arch_info_struct[2] =
+static const bfd_arch_info_type arch_info_struct[4] =
{
- N (bfd_mach_rx_v2, "rx:v2", 3, false, arch_info_struct + 1),
- N (bfd_mach_rx_v3, "rx:v3", 3, false, NULL)
+ N (bfd_mach_rx, "rx", 3, false, arch_info_struct + 1),
+ N (bfd_mach_rx_v2, "rx:v2", 3, false, arch_info_struct + 2),
+ N (bfd_mach_rx_v3, "rx:v3", 3, false, arch_info_struct + 3),
+ N (bfd_mach_rx_v3_dfpu, "rx:v3", 3, false, NULL)
};
const bfd_arch_info_type bfd_rx_arch =
N (bfd_mach_rx, "rx", 4, true, arch_info_struct + 0);
-
diff --git a/bfd/elf32-rx.c b/bfd/elf32-rx.c
index db1ab777d3f7..365dabc56c01 100644
--- a/bfd/elf32-rx.c
+++ b/bfd/elf32-rx.c
@@ -1,5 +1,5 @@
/* Renesas RX specific support for 32-bit ELF.
- Copyright (C) 2008-2024 Free Software Foundation, Inc.
+ Copyright (C) 2008-2025 Free Software Foundation, Inc.
This file is part of BFD, the Binary File Descriptor library.
@@ -671,17 +671,43 @@ rx_elf_relocate_section
relocation = 0;
else
{
+ relocation += rel->r_addend;
if (howto->pc_relative)
{
- relocation -= (input_section->output_section->vma
+ bfd_vma pc_pos = input_section->output_section->vma
+ input_section->output_offset
- + rel->r_offset);
+ + rel->r_offset;
+ // sanity check
+ if (pc_pos > UINT32_MAX || relocation > UINT32_MAX)
+ {
+ /* xgettext:c-format */
+ _bfd_error_handler(_("%pB:%pA: invalid relocation range %s "),
+ input_bfd, input_section,
+ name);
+ return false;
+ }
+
+ uint32_t forward_jump, backward_jump;
+ if (relocation > pc_pos)
+ {
+ forward_jump = relocation - pc_pos;
+ backward_jump = UINT32_MAX - relocation + pc_pos + 1;
+ }
+ else
+ {
+ forward_jump = UINT32_MAX - pc_pos + relocation + 1;
+ backward_jump = pc_pos - relocation;
+ }
+ if (forward_jump < backward_jump)
+ relocation = forward_jump;
+ else
+ relocation = -(bfd_signed_vma)backward_jump;
+
if (r_type != R_RX_RH_3_PCREL
&& r_type != R_RX_DIR3U_PCREL)
relocation ++;
}
- relocation += rel->r_addend;
}
r = bfd_reloc_ok;
@@ -745,12 +771,15 @@ rx_elf_relocate_section
case R_RX_RH_8_NEG:
WARN_REDHAT ("RX_RH_8_NEG");
- relocation = - relocation;
+ relocation = -(bfd_signed_vma)relocation;
/* Fall through. */
case R_RX_DIR8S_PCREL:
+ if(((bfd_signed_vma)relocation >= -128) && ((bfd_signed_vma)relocation <=127))
+ {
UNSAFE_FOR_PID;
RANGE (-128, 127);
OP (0) = relocation;
+ }
break;
case R_RX_DIR8S:
@@ -767,7 +796,7 @@ rx_elf_relocate_section
case R_RX_RH_16_NEG:
WARN_REDHAT ("RX_RH_16_NEG");
- relocation = - relocation;
+ relocation = -(bfd_signed_vma)relocation;
/* Fall through. */
case R_RX_DIR16S_PCREL:
UNSAFE_FOR_PID;
@@ -794,7 +823,7 @@ rx_elf_relocate_section
case R_RX_DIR16S:
UNSAFE_FOR_PID;
- RANGE (-32768, 65535);
+ RANGE (-32768, 32767); /*Applied range_check_1015.patch*/
if (BIGE (output_bfd) && !(input_section->flags & SEC_CODE))
{
OP (1) = relocation;
@@ -844,15 +873,18 @@ rx_elf_relocate_section
break;
case R_RX_DIR3U_PCREL:
+ if((relocation >= 3) && (relocation <=10))
+ {
RANGE (3, 10);
OP (0) &= 0xf8;
OP (0) |= relocation & 0x07;
+ }
break;
case R_RX_RH_24_NEG:
UNSAFE_FOR_PID;
WARN_REDHAT ("RX_RH_24_NEG");
- relocation = - relocation;
+ relocation = -(bfd_signed_vma)relocation;
/* Fall through. */
case R_RX_DIR24S_PCREL:
RANGE (-0x800000, 0x7fffff);
@@ -1460,7 +1492,10 @@ rx_elf_relocate_section
if (r != bfd_reloc_ok)
{
- const char * msg = NULL;
+ /* xgettext:c-format */
+ const char * msg = _("%pB(%pA): internal error: unknown error");
+
+ bool relocation_ok = false;
switch (r)
{
@@ -1470,15 +1505,18 @@ rx_elf_relocate_section
if (r_type == R_RX_DIR24S_PCREL)
/* xgettext:c-format */
msg = _("%pB(%pA): error: call to undefined function '%s'");
- else
+ else {
(*info->callbacks->reloc_overflow)
(info, (h ? &h->root : NULL), name, howto->name, (bfd_vma) 0,
input_bfd, input_section, rel->r_offset);
+ relocation_ok = true;
+ }
break;
case bfd_reloc_undefined:
(*info->callbacks->undefined_symbol)
(info, name, input_bfd, input_section, rel->r_offset, true);
+ relocation_ok = true;
break;
case bfd_reloc_other:
@@ -1502,13 +1540,13 @@ rx_elf_relocate_section
break;
default:
- /* xgettext:c-format */
- msg = _("%pB(%pA): internal error: unknown error");
break;
}
- if (msg)
+ if (!relocation_ok) {
_bfd_error_handler (msg, input_bfd, input_section, name);
+ return false;
+ }
}
}
@@ -2456,6 +2494,7 @@ elf32_rx_relax_section (bfd *abfd,
if (irel->r_addend & RX_RELAXA_IMM6)
{
long ssymval;
+ const long delta = 10000;
GET_RELOC;
@@ -2464,7 +2503,7 @@ elf32_rx_relax_section (bfd *abfd,
code = insn[0] & 0x03;
- if (code == 0 && ssymval <= 8388607 && ssymval >= -8388608)
+ if (code == 0 && ssymval <= 8388607 && ssymval >= -(8388608 - delta))
{
unsigned int newrel = ELF32_R_TYPE (srel->r_info);
@@ -2478,7 +2517,7 @@ elf32_rx_relax_section (bfd *abfd,
}
}
- else if (code == 3 && ssymval <= 32767 && ssymval >= -32768)
+ else if (code == 3 && ssymval <= 32767 && ssymval >= -(32768 - delta))
{
unsigned int newrel = ELF32_R_TYPE (srel->r_info);
@@ -2592,7 +2631,7 @@ elf32_rx_relax_section (bfd *abfd,
{
int dspcode, offset = 0;
long ssymval;
-
+ const long delta = 10000;
GET_RELOC;
if ((insn[0] & 0xfc) == 0xfc)
@@ -2611,7 +2650,7 @@ elf32_rx_relax_section (bfd *abfd,
ssymval = (long) symval;
code = (insn[1] >> 2) & 3;
- if (code == 0 && ssymval <= 8388607 && ssymval >= -8388608)
+ if (code == 0 && ssymval <= 8388607 && ssymval >= -(8388608 - delta))
{
unsigned int newrel = ELF32_R_TYPE (srel->r_info);
@@ -2625,7 +2664,7 @@ elf32_rx_relax_section (bfd *abfd,
}
}
- else if (code == 3 && ssymval <= 32767 && ssymval >= -32768)
+ else if (code == 3 && ssymval <= 32767 && ssymval >= -(32768 - delta))
{
unsigned int newrel = ELF32_R_TYPE (srel->r_info);
@@ -3049,7 +3088,8 @@ elf32_rx_relax_section (bfd *abfd,
return true;
error_return:
- free (free_contents);
+ if (free_contents != NULL)
+ free (free_contents);
if (shndx_buf != NULL)
{
@@ -3057,7 +3097,8 @@ elf32_rx_relax_section (bfd *abfd,
free (shndx_buf);
}
- free (free_intsyms);
+ if (free_intsyms != NULL)
+ free (free_intsyms);
return false;
}
@@ -3122,6 +3163,15 @@ describe_flags (flagword flags, char *buf)
else
strcat (buf, ", GCC ABI");
+ if(flags & E_FLAG_RX_V1)
+ strcat (buf, ", V1");
+ else if(flags & E_FLAG_RX_V2)
+ strcat (buf, ", V2");
+ else if(flags & E_FLAG_RX_V3)
+ strcat (buf, ", V3");
+
+ if(flags & E_FLAG_RX_V3_DFPU)
+ strcat (buf, ", DFPU support");
if (flags & E_FLAG_RX_SINSNS_SET)
strcat (buf, flags & E_FLAG_RX_SINSNS_YES ? ", uses String instructions" : ", bans String instructions");
@@ -3165,10 +3215,24 @@ rx_elf_merge_private_bfd_data (bfd * ibfd, struct bfd_link_info *info)
old_flags &= ~ E_FLAG_RX_SINSNS_MASK;
old_flags |= (new_flags & E_FLAG_RX_SINSNS_MASK);
}
-
- known_flags = E_FLAG_RX_ABI | E_FLAG_RX_64BIT_DOUBLES
- | E_FLAG_RX_DSP | E_FLAG_RX_PID | E_FLAG_RX_SINSNS_MASK;
-
+ /* if different ISA versions update to the newest one */
+ if ((new_flags & E_FLAG_RX_V3) || (old_flags & E_FLAG_RX_V3))
+ {
+ new_flags &= ~ E_FLAG_RX_V_MASK;
+ new_flags |= E_FLAG_RX_V3;
+ old_flags &= ~ E_FLAG_RX_V_MASK;
+ old_flags |= E_FLAG_RX_V3;
+ }
+ else if ((new_flags & E_FLAG_RX_V2) || (old_flags & E_FLAG_RX_V2))
+ {
+ new_flags &= ~ E_FLAG_RX_V_MASK;
+ new_flags |= E_FLAG_RX_V2;
+ old_flags &= ~ E_FLAG_RX_V_MASK;
+ old_flags |= E_FLAG_RX_V2;
+ }
+ known_flags = E_FLAG_RX_ABI | E_FLAG_RX_64BIT_DOUBLES |
+ E_FLAG_RX_DSP | E_FLAG_RX_PID | E_FLAG_RX_SINSNS_MASK |
+ E_FLAG_RX_V_MASK | E_FLAG_RX_V3_DFPU;
if ((old_flags ^ new_flags) & known_flags)
{
/* Only complain if flag bits we care about do not match.
@@ -3226,17 +3290,18 @@ rx_elf_print_private_bfd_data (bfd * abfd, void * ptr)
static int
elf32_rx_machine (bfd * abfd ATTRIBUTE_UNUSED)
{
-#if 0 /* FIXME: EF_RX_CPU_MASK collides with E_FLAG_RX_...
- Need to sort out how these flag bits are used.
- For now we assume that the flags are OK. */
- if ((elf_elfheader (abfd)->e_flags & EF_RX_CPU_MASK) == EF_RX_CPU_RX)
-#endif
- if ((elf_elfheader (abfd)->e_flags & E_FLAG_RX_V2))
- return bfd_mach_rx_v2;
- else if ((elf_elfheader (abfd)->e_flags & E_FLAG_RX_V3))
- return bfd_mach_rx_v3;
- else
- return bfd_mach_rx;
+ const int flags = elf_elfheader (abfd)->e_flags;
+
+ switch (flags & (E_FLAG_RX_V1|E_FLAG_RX_V2|E_FLAG_RX_V3)) {
+ case E_FLAG_RX_V3:
+ if (flags & E_FLAG_RX_V3_DFPU)
+ return bfd_mach_rx_v3_dfpu;
+ return bfd_mach_rx_v3;
+ case E_FLAG_RX_V2:
+ return bfd_mach_rx_v2;
+ case E_FLAG_RX_V1:
+ return bfd_mach_rx;
+ }
return 0;
}
@@ -3260,7 +3325,7 @@ rx_elf_object_p (bfd * abfd)
&& abfd->target_defaulted)
return false;
- /* BFD->target_defaulted is not set to TRUE when a target is chosen
+ /* BFD->target_defaulted is not set to true when a target is chosen
as a fallback, so we check for "scanning" to know when to stop
using the non-swapping target. */
if (abfd->xvec == &rx_elf32_be_ns_vec
@@ -3311,7 +3376,7 @@ rx_elf_object_p (bfd * abfd)
The correct LMA for the section is fffc0140 + (2050-2010).
*/
- phdr[i].p_vaddr = sec->sh_addr + (sec->sh_offset - phdr[i].p_offset);
+ phdr[i].p_vaddr = sec->sh_addr - (sec->sh_offset - phdr[i].p_offset);
break;
}
}
@@ -3321,9 +3386,10 @@ rx_elf_object_p (bfd * abfd)
bsec = abfd->sections;
while (bsec)
{
- if (phdr[i].p_filesz
- && phdr[i].p_vaddr <= bsec->vma
- && bsec->vma <= phdr[i].p_vaddr + (phdr[i].p_filesz - 1))
+ if (bsec->flags & (SEC_LOAD | SEC_ALLOC)
+ && phdr[i].p_vaddr > 0
+ && phdr[i].p_offset <= (bfd_vma) bsec->filepos
+ && (bfd_vma) bsec->filepos + 1 <= phdr[i].p_offset + (phdr[i].p_filesz))
{
bsec->lma = phdr[i].p_paddr + (bsec->vma - phdr[i].p_vaddr);
}
@@ -3724,6 +3790,59 @@ elf32_rx_modify_headers (bfd *abfd, struct bfd_link_info *info)
return _bfd_elf_modify_headers (abfd, info);
}
+/* Issue 816133.
+ Note we intercept the elf_backend_section_flags vector rather than the
+ elf_section_from_shdr vector because the former is called from inside
+ _bfd_elf_make_section_from_shdr (which sets the LMA for sections) whereas
+ the latter is only called from some, but not all, of the places where
+ BFD sections are built from ELF header values. */
+
+ static bool
+ rx_set_section_flags (const Elf_Internal_Shdr * hdr)
+ {
+ bfd * abfd;
+ Elf_Internal_Phdr * phdr;
+ asection * sec;
+ unsigned int i;
+
+ sec = hdr->bfd_section;
+ abfd = sec->owner;
+
+ /* We are forced to set the VADDR of segments to be the same as their PADDR
+ when they are written out to a file. (See elf32_rx_modify_program_headers
+ above). This means that when we read in the section headers from such a
+ modified file we can find that we have sections whoes SH_ADDR field does
+ not match up with the P_VADDR field of any program header. This means
+ that the ELF_IS_SECTION_IN_SEGMENT macro will fail for this section and so
+ the _bfd_elf_make_section_from_shdr function call above will have defaulted
+ to setting the section's LMA to its VMA.
+
+ We want to catch this effect and compute the correct LMA for the section. */
+
+ /* We only care about loadable sections that have real contents. */
+ if ((hdr->bfd_section->flags & (SEC_ALLOC | SEC_LOAD)) != (SEC_ALLOC | SEC_LOAD)
+ || hdr->sh_size == 0)
+ return true;
+
+ phdr = elf_tdata (abfd)->phdr;
+
+ for (i = 0; i < elf_elfheader (abfd)->e_phnum; i++, phdr++)
+ {
+ if (phdr->p_type == PT_LOAD
+ /* We cannot use the VADDR of the segment to match to the
+ section's VMA so instead we look at file offsets. */
+ && hdr->sh_offset >= phdr->p_offset
+ && hdr->sh_offset < phdr->p_offset + phdr->p_filesz)
+ {
+ /* FIXME: Should we check that the section ends inside the segment as well ? */
+ sec->lma = phdr->p_paddr + hdr->sh_offset - phdr->p_offset;
+ break;
+ }
+ }
+
+ return true;
+ }
+
/* The default literal sections should always be marked as "code" (i.e.,
SHF_EXECINSTR). This is particularly important for big-endian mode
when we do not want their contents byte reversed. */
@@ -3829,7 +3948,7 @@ rx_table_find (struct bfd_hash_entry *vent, void *vinfo)
}
}
- /* Return TRUE to keep scanning, FALSE to end the traversal. */
+ /* Return true to keep scanning, false to end the traversal. */
return true;
}
@@ -4064,6 +4183,7 @@ rx_additional_link_map_text (bfd *obfd, struct bfd_link_info *info, FILE *mapfil
#define elf_symbol_leading_char ('_')
#define elf_backend_can_gc_sections 1
#define elf_backend_modify_headers elf32_rx_modify_headers
+#define elf_backend_section_flags rx_set_section_flags
#define bfd_elf32_bfd_reloc_type_lookup rx_reloc_type_lookup
#define bfd_elf32_bfd_reloc_name_lookup rx_reloc_name_lookup
diff --git a/gdb/features/rxv2-core.xml b/gdb/features/rxv2-core.xml
new file mode 100644
index 000000000000..67a0986df32e
--- /dev/null
+++ b/gdb/features/rxv2-core.xml
@@ -0,0 +1,82 @@
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
diff --git a/gdb/features/rxv2.c b/gdb/features/rxv2.c
new file mode 100644
index 000000000000..5c2c8d187191
--- /dev/null
+++ b/gdb/features/rxv2.c
@@ -0,0 +1,89 @@
+/* TODO::::::::::::::: */
+/* THIS FILE IS GENERATED. Original: rxv2.xml */
+
+#include "defs.h"
+#include "osabi.h"
+#include "target-descriptions.h"
+
+struct target_desc *tdesc_rx_v2;
+static void
+initialize_tdesc_rxv2 (void)
+{
+ target_desc_up result = allocate_target_description ();
+ struct tdesc_feature *feature;
+
+
+ feature = tdesc_create_feature (result.get(), "org.gnu.gdb.rx.corev2");
+ tdesc_type_with_fields *field_type;
+ field_type = tdesc_create_flags (feature, "rx_psw_flags", 4);
+ tdesc_add_flag (field_type, 0, "C");
+ tdesc_add_flag (field_type, 1, "Z");
+ tdesc_add_flag (field_type, 2, "S");
+ tdesc_add_flag (field_type, 3, "O");
+ tdesc_add_flag (field_type, 4, "");
+ tdesc_add_flag (field_type, 16, "I");
+ tdesc_add_flag (field_type, 17, "U");
+ tdesc_add_flag (field_type, 18, "");
+ tdesc_add_flag (field_type, 20, "PM");
+ tdesc_add_flag (field_type, 21, "");
+ tdesc_add_flag (field_type, 24, "IPL");
+ tdesc_add_flag (field_type, 25, "IPL");
+ tdesc_add_flag (field_type, 26, "IPL");
+ tdesc_add_flag (field_type, 27, "IPL");
+ tdesc_add_flag (field_type, 28, "");
+
+ field_type = tdesc_create_flags (feature, "rx_fpsw_flags", 4);
+ tdesc_add_flag (field_type, 0, "RM");
+ tdesc_add_flag (field_type, 1, "RM");
+ tdesc_add_flag (field_type, 2, "CV");
+ tdesc_add_flag (field_type, 3, "CO");
+ tdesc_add_flag (field_type, 4, "CZ");
+ tdesc_add_flag (field_type, 5, "CU");
+ tdesc_add_flag (field_type, 6, "CX");
+ tdesc_add_flag (field_type, 7, "CE");
+ tdesc_add_flag (field_type, 8, "DN");
+ tdesc_add_flag (field_type, 9, "");
+ tdesc_add_flag (field_type, 10, "EV");
+ tdesc_add_flag (field_type, 11, "EO");
+ tdesc_add_flag (field_type, 12, "EZ");
+ tdesc_add_flag (field_type, 13, "EU");
+ tdesc_add_flag (field_type, 14, "EX");
+ tdesc_add_flag (field_type, 15, "");
+ tdesc_add_flag (field_type, 26, "FV");
+ tdesc_add_flag (field_type, 27, "FO");
+ tdesc_add_flag (field_type, 28, "FZ");
+ tdesc_add_flag (field_type, 29, "FU");
+ tdesc_add_flag (field_type, 30, "FX");
+ tdesc_add_flag (field_type, 31, "FS");
+
+ tdesc_create_reg (feature, "r0", 0, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "r1", 1, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "r2", 2, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "r3", 3, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "r4", 4, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "r5", 5, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "r6", 6, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "r7", 7, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "r8", 8, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "r9", 9, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "r10", 10, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "r11", 11, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "r12", 12, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "r13", 13, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "r14", 14, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "r15", 15, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "usp", 16, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "isp", 17, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "psw", 18, 1, NULL, 32, "rx_psw_flags");
+ tdesc_create_reg (feature, "pc", 19, 1, NULL, 32, "code_ptr");
+ tdesc_create_reg (feature, "intb", 20, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "bpsw", 21, 1, NULL, 32, "rx_psw_flags");
+ tdesc_create_reg (feature, "bpc", 22, 1, NULL, 32, "code_ptr");
+ tdesc_create_reg (feature, "fintv", 23, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "fpsw", 24, 1, NULL, 32, "rx_fpsw_flags");
+ tdesc_create_reg (feature, "acc0", 25, 1, NULL, 96, "uint128");
+ tdesc_create_reg (feature, "acc1", 26, 1, NULL, 96, "uint128");
+ tdesc_create_reg (feature, "extb", 27, 1, NULL, 32, "uint32");
+
+ tdesc_rx_v2 = result.release();
+}
diff --git a/gdb/features/rxv2.xml b/gdb/features/rxv2.xml
new file mode 100644
index 000000000000..b99c4382471f
--- /dev/null
+++ b/gdb/features/rxv2.xml
@@ -0,0 +1,12 @@
+
+
+
+
+
+ rxv2
+
+
diff --git a/gdb/features/rxv3-core.xml b/gdb/features/rxv3-core.xml
new file mode 100644
index 000000000000..7a0973097010
--- /dev/null
+++ b/gdb/features/rxv3-core.xml
@@ -0,0 +1,102 @@
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
diff --git a/gdb/features/rxv3.c b/gdb/features/rxv3.c
new file mode 100644
index 000000000000..41f4d77911a1
--- /dev/null
+++ b/gdb/features/rxv3.c
@@ -0,0 +1,114 @@
+/* TODO::::::::::::::: */
+/* THIS FILE IS GENERATED. Original: rxv3.xml */
+
+#include "defs.h"
+#include "osabi.h"
+#include "target-descriptions.h"
+
+struct target_desc *tdesc_rx_v3;
+static void
+initialize_tdesc_rxv3 (void)
+{
+ target_desc_up result = allocate_target_description ();
+ struct tdesc_feature *feature;
+
+
+ feature = tdesc_create_feature (result.get(), "org.gnu.gdb.rx.corev3");
+ tdesc_type_with_fields *field_type;
+ field_type = tdesc_create_flags (feature, "rx_psw_flags", 4);
+ tdesc_add_flag (field_type, 0, "C");
+ tdesc_add_flag (field_type, 1, "Z");
+ tdesc_add_flag (field_type, 2, "S");
+ tdesc_add_flag (field_type, 3, "O");
+ tdesc_add_flag (field_type, 4, "");
+ tdesc_add_flag (field_type, 16, "I");
+ tdesc_add_flag (field_type, 17, "U");
+ tdesc_add_flag (field_type, 18, "");
+ tdesc_add_flag (field_type, 20, "PM");
+ tdesc_add_flag (field_type, 21, "");
+ tdesc_add_flag (field_type, 24, "IPL");
+ tdesc_add_flag (field_type, 25, "IPL");
+ tdesc_add_flag (field_type, 26, "IPL");
+ tdesc_add_flag (field_type, 27, "IPL");
+ tdesc_add_flag (field_type, 28, "");
+
+ field_type = tdesc_create_flags (feature, "rx_fpsw_flags", 4);
+ tdesc_add_flag (field_type, 0, "RM");
+ tdesc_add_flag (field_type, 1, "RM");
+ tdesc_add_flag (field_type, 2, "CV");
+ tdesc_add_flag (field_type, 3, "CO");
+ tdesc_add_flag (field_type, 4, "CZ");
+ tdesc_add_flag (field_type, 5, "CU");
+ tdesc_add_flag (field_type, 6, "CX");
+ tdesc_add_flag (field_type, 7, "CE");
+ tdesc_add_flag (field_type, 8, "DN");
+ tdesc_add_flag (field_type, 9, "");
+ tdesc_add_flag (field_type, 10, "EV");
+ tdesc_add_flag (field_type, 11, "EO");
+ tdesc_add_flag (field_type, 12, "EZ");
+ tdesc_add_flag (field_type, 13, "EU");
+ tdesc_add_flag (field_type, 14, "EX");
+ tdesc_add_flag (field_type, 15, "");
+ tdesc_add_flag (field_type, 26, "FV");
+ tdesc_add_flag (field_type, 27, "FO");
+ tdesc_add_flag (field_type, 28, "FZ");
+ tdesc_add_flag (field_type, 29, "FU");
+ tdesc_add_flag (field_type, 30, "FX");
+ tdesc_add_flag (field_type, 31, "FS");
+
+ tdesc_create_reg (feature, "r0", 0, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "r1", 1, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "r2", 2, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "r3", 3, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "r4", 4, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "r5", 5, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "r6", 6, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "r7", 7, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "r8", 8, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "r9", 9, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "r10", 10, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "r11", 11, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "r12", 12, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "r13", 13, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "r14", 14, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "r15", 15, 1, NULL, 32, "uint32");
+
+ tdesc_create_reg (feature, "usp", 16, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "isp", 17, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "psw", 18, 1, NULL, 32, "rx_psw_flags");
+ tdesc_create_reg (feature, "pc", 19, 1, NULL, 32, "code_ptr");
+ tdesc_create_reg (feature, "intb", 20, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "bpsw", 21, 1, NULL, 32, "rx_psw_flags");
+ tdesc_create_reg (feature, "bpc", 22, 1, NULL, 32, "code_ptr");
+ tdesc_create_reg (feature, "fintv", 23, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "fpsw", 24, 1, NULL, 32, "rx_fpsw_flags");
+ tdesc_create_reg (feature, "acc0", 25, 1, NULL, 96, "uint128");
+ tdesc_create_reg (feature, "acc1", 26, 1, NULL, 96, "uint128");
+ tdesc_create_reg (feature, "extb", 27, 1, NULL, 32, "uint32");
+
+ tdesc_create_reg (feature, "dr0", 28, 1, NULL, 64, "ieee_double");
+ tdesc_create_reg (feature, "dr1", 29, 1, NULL, 64, "ieee_double");
+ tdesc_create_reg (feature, "dr2", 30, 1, NULL, 64, "ieee_double");
+ tdesc_create_reg (feature, "dr3", 31, 1, NULL, 64, "ieee_double");
+ tdesc_create_reg (feature, "dr4", 32, 1, NULL, 64, "ieee_double");
+ tdesc_create_reg (feature, "dr5", 33, 1, NULL, 64, "ieee_double");
+ tdesc_create_reg (feature, "dr6", 34, 1, NULL, 64, "ieee_double");
+ tdesc_create_reg (feature, "dr7", 35, 1, NULL, 64, "ieee_double");
+ tdesc_create_reg (feature, "dr8", 36, 1, NULL, 64, "ieee_double");
+ tdesc_create_reg (feature, "dr9", 37, 1, NULL, 64, "ieee_double");
+ tdesc_create_reg (feature, "dr10", 38, 1, NULL, 64, "ieee_double");
+ tdesc_create_reg (feature, "dr11", 39, 1, NULL, 64, "ieee_double");
+ tdesc_create_reg (feature, "dr12", 40, 1, NULL, 64, "ieee_double");
+ tdesc_create_reg (feature, "dr13", 41, 1, NULL, 64, "ieee_double");
+ tdesc_create_reg (feature, "dr14", 42, 1, NULL, 64, "ieee_double");
+ tdesc_create_reg (feature, "dr15", 43, 1, NULL, 64, "ieee_double");
+
+
+
+ tdesc_create_reg (feature, "dpsw", 44, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "dcmr", 45, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "decnt", 46, 1, NULL, 32, "uint32");
+ tdesc_create_reg (feature, "depc", 47, 1, NULL, 32, "uint32");
+
+ tdesc_rx_v3 = result.release();
+}
diff --git a/gdb/features/rxv3.xml b/gdb/features/rxv3.xml
new file mode 100644
index 000000000000..6dbca4619675
--- /dev/null
+++ b/gdb/features/rxv3.xml
@@ -0,0 +1,12 @@
+
+
+
+
+
+ rxv3
+
+
diff --git a/gdb/rx-tdep.c b/gdb/rx-tdep.c
index 6b12fe0a3148..be7080e6a05c 100644
--- a/gdb/rx-tdep.c
+++ b/gdb/rx-tdep.c
@@ -31,6 +31,7 @@
#include "frame-unwind.h"
#include "frame-base.h"
#include "value.h"
+#include "cli/cli-cmds.h"
#include "gdbcore.h"
#include "dwarf2/frame.h"
#include "remote.h"
@@ -42,7 +43,10 @@
#include "elf-bfd.h"
#include
+#include "target-descriptions.h"
#include "features/rx.c"
+#include "features/rxv2.c"
+#include "features/rxv3.c"
/* Certain important register numbers. */
enum
@@ -50,7 +54,7 @@ enum
RX_SP_REGNUM = 0,
RX_R1_REGNUM = 1,
RX_R4_REGNUM = 4,
- RX_FP_REGNUM = 6,
+ RX_FP_REGNUM = 10,
RX_R15_REGNUM = 15,
RX_USP_REGNUM = 16,
RX_PSW_REGNUM = 18,
@@ -59,7 +63,10 @@ enum
RX_BPC_REGNUM = 22,
RX_FPSW_REGNUM = 24,
RX_ACC_REGNUM = 25,
- RX_NUM_REGS = 26
+ RX_NUM_REGS = 26,
+ RXV2_NUM_REGS = 28,
+ RXV3_DR0_REGNUM = 28,
+ RXV3_NUM_REGS = 47
};
/* RX frame types. */
@@ -117,7 +124,8 @@ struct rx_prologue
/* reg_offset[R] is the offset from the CFA at which register R is
saved, or 1 if register R has not been saved. (Real values are
always zero or negative.) */
- int reg_offset[RX_NUM_REGS];
+ /* RXV3_NUM_REGS > RXV2_NUM_REGS > RX_NUM_REGS we just have to ignore the last ones */
+ int reg_offset[RXV3_NUM_REGS];
};
/* RX register names */
@@ -128,6 +136,124 @@ static const char *const rx_register_names[] = {
"fpsw", "acc",
};
+static const char *const rxv2_register_names[] = {
+ "r0",
+ "r1",
+ "r2",
+ "r3",
+ "r4",
+ "r5",
+ "r6",
+ "r7",
+ "r8",
+ "r9",
+ "r10",
+ "r11",
+ "r12",
+ "r13",
+ "r14",
+ "r15",
+ "usp",
+ "isp",
+ "psw",
+ "pc",
+ "intb",
+ "bpsw",
+ "bpc",
+ "fintv",
+ "fpsw",
+ "acc0",
+ "acc1",
+ "extb"
+};
+
+static const char *const rxv3_register_names[] = {
+ "r0",
+ "r1",
+ "r2",
+ "r3",
+ "r4",
+ "r5",
+ "r6",
+ "r7",
+ "r8",
+ "r9",
+ "r10",
+ "r11",
+ "r12",
+ "r13",
+ "r14",
+ "r15",
+ "usp",
+ "isp",
+ "psw",
+ "pc",
+ "intb",
+ "bpsw",
+ "bpc",
+ "fintv",
+ "fpsw",
+ "acc0",
+ "acc1",
+ "extb",
+ "dr0",
+ "dr1",
+ "dr2",
+ "dr3",
+ "dr4",
+ "dr5",
+ "dr6",
+ "dr7",
+ "dr8",
+ "dr9",
+ "dr10",
+ "dr11",
+ "dr12",
+ "dr13",
+ "dr14",
+ "dr15",
+ "dpsw",
+ "dcmr",
+ "decnt",
+ "depc",
+};
+
+/* The list of available "set rx ..." and "show rx ..." commands. */
+static struct cmd_list_element *setrxcmdlist = NULL;
+static struct cmd_list_element *showrxcmdlist = NULL;
+
+/* The 64bit-double mode to assume. */
+static const char *const rx_64bit_double_strings[] =
+{
+ "auto",
+ "1",
+ "0",
+ "on",
+ "off",
+ NULL
+};
+
+/* The isa mode to assume. */
+static const char *const rx_isa_strings[] =
+{
+ "auto",
+ "v1",
+ "v2",
+ "v3",
+ NULL
+ };
+
+static const char *const rx_double_fpu_strings[] =
+{
+ "auto",
+ "1",
+ "0",
+ "on",
+ "off",
+ NULL
+};
+
+static unsigned long machine = bfd_mach_rx;
/* Function for finding saved registers in a 'struct pv_area'; this
function is passed to pv_area::scan.
@@ -147,29 +273,22 @@ check_for_saved (void *result_untyped, pv_t addr, CORE_ADDR size, pv_t value)
result->reg_offset[value.reg] = addr.k;
}
-/* Define a "handle" struct for fetching the next opcode. */
-struct rx_get_opcode_byte_handle
-{
- CORE_ADDR pc;
-};
-
/* Fetch a byte on behalf of the opcode decoder. HANDLE contains
the memory address of the next byte to fetch. If successful,
the address in the handle is updated and the byte fetched is
returned as the value of the function. If not successful, -1
is returned. */
static int
-rx_get_opcode_byte (void *handle)
+rx_get_opcode_byte (RX_Data *handle)
{
- struct rx_get_opcode_byte_handle *opcdata
- = (struct rx_get_opcode_byte_handle *) handle;
+ RX_Data *opcdata = handle;
int status;
gdb_byte byte;
- status = target_read_code (opcdata->pc, &byte, 1);
+ status = target_read_code (opcdata->addr, &byte, 1);
if (status == 0)
{
- opcdata->pc += 1;
+ opcdata->addr += 1;
return byte;
}
else
@@ -186,18 +305,33 @@ rx_analyze_prologue (CORE_ADDR start_pc, CORE_ADDR limit_pc,
{
CORE_ADDR pc, next_pc;
int rn;
- pv_t reg[RX_NUM_REGS];
+ /* for RX we will ignore the last 2 */
+ pv_t reg[RXV3_NUM_REGS];
CORE_ADDR after_last_frame_setup_insn = start_pc;
memset (result, 0, sizeof (*result));
result->frame_type = frame_type;
+ switch(machine)
+ {
+ case bfd_mach_rx:
for (rn = 0; rn < RX_NUM_REGS; rn++)
{
reg[rn] = pv_register (rn, 0);
result->reg_offset[rn] = 1;
}
+ break;
+ case bfd_mach_rx_v2:
+ case bfd_mach_rx_v3:
+ case bfd_mach_rx_v3_dfpu:
+ for (rn = 0; rn < RXV2_NUM_REGS; rn++)
+ {
+ reg[rn] = pv_register (rn, 0);
+ result->reg_offset[rn] = 1;
+ }
+ break;
+ }
pv_area stack (RX_SP_REGNUM, gdbarch_addr_bit (current_inferior ()->arch ()));
@@ -230,12 +364,12 @@ rx_analyze_prologue (CORE_ADDR start_pc, CORE_ADDR limit_pc,
while (pc < limit_pc)
{
int bytes_read;
- struct rx_get_opcode_byte_handle opcode_handle;
+ RX_Data opcode_handle;
RX_Opcode_Decoded opc;
- opcode_handle.pc = pc;
+ opcode_handle.addr = pc;
bytes_read = rx_decode_opcode (pc, &opc, rx_get_opcode_byte,
- &opcode_handle);
+ &opcode_handle, machine);
next_pc = pc + bytes_read;
if (opc.id == RXO_pushm /* pushm r1, r2 */
@@ -294,6 +428,20 @@ rx_analyze_prologue (CORE_ADDR start_pc, CORE_ADDR limit_pc,
if ((rdst == RX_SP_REGNUM || rdst == RX_FP_REGNUM) && addend < 0)
after_last_frame_setup_insn = next_pc;
}
+ else if (opc.id == RXO_sub /* sub #const, rdst */
+ && opc.op[0].type == RX_Operand_Register
+ && opc.op[1].type == RX_Operand_Register
+ && opc.op[2].type == RX_Operand_Immediate)
+ {
+ int rdst = opc.op[0].reg;
+ int addend = -opc.op[2].addend;
+ int rsrc = opc.op[1].reg;
+ reg[rdst] = pv_add_constant (reg[rsrc], addend);
+ /* Negative adjustments to the stack pointer or frame pointer
+ are (most likely) part of the prologue. */
+ if ((rdst == RX_SP_REGNUM || rdst == RX_FP_REGNUM) && addend < 0)
+ after_last_frame_setup_insn = next_pc;
+ }
else if (opc.id == RXO_mov
&& opc.op[0].type == RX_Operand_Indirect
&& opc.op[1].type == RX_Operand_Register
@@ -306,32 +454,6 @@ rx_analyze_prologue (CORE_ADDR start_pc, CORE_ADDR limit_pc,
/* This moves an argument register to the stack. Don't
record it, but allow it to be a part of the prologue. */
}
- else if (opc.id == RXO_branch
- && opc.op[0].type == RX_Operand_Immediate
- && next_pc < opc.op[0].addend)
- {
- /* When a loop appears as the first statement of a function
- body, gcc 4.x will use a BRA instruction to branch to the
- loop condition checking code. This BRA instruction is
- marked as part of the prologue. We therefore set next_pc
- to this branch target and also stop the prologue scan.
- The instructions at and beyond the branch target should
- no longer be associated with the prologue.
-
- Note that we only consider forward branches here. We
- presume that a forward branch is being used to skip over
- a loop body.
-
- A backwards branch is covered by the default case below.
- If we were to encounter a backwards branch, that would
- most likely mean that we've scanned through a loop body.
- We definitely want to stop the prologue scan when this
- happens and that is precisely what is done by the default
- case below. */
-
- after_last_frame_setup_insn = opc.op[0].addend;
- break; /* Scan no further if we hit this case. */
- }
else
{
/* Terminate the prologue scan. */
@@ -417,7 +539,7 @@ rx_frame_type (const frame_info_ptr &this_frame, void **this_cache)
const char *name;
CORE_ADDR pc, start_pc, lim_pc;
int bytes_read;
- struct rx_get_opcode_byte_handle opcode_handle;
+ RX_Data opcode_handle;
RX_Opcode_Decoded opc;
gdb_assert (this_cache != NULL);
@@ -433,9 +555,9 @@ rx_frame_type (const frame_info_ptr &this_frame, void **this_cache)
/* No cached value; scan the function. The frame type is cached in
rx_analyze_prologue / rx_analyze_frame_prologue. */
-
+
pc = get_frame_pc (this_frame);
-
+
/* Attempt to find the last address in the function. If it cannot
be determined, set the limit to be a short ways past the frame's
pc. */
@@ -444,9 +566,9 @@ rx_frame_type (const frame_info_ptr &this_frame, void **this_cache)
while (pc < lim_pc)
{
- opcode_handle.pc = pc;
+ opcode_handle.addr = pc;
bytes_read = rx_decode_opcode (pc, &opc, rx_get_opcode_byte,
- &opcode_handle);
+ &opcode_handle, machine);
if (bytes_read <= 0 || opc.id == RXO_rts)
return RX_FRAME_TYPE_NORMAL;
@@ -628,13 +750,41 @@ rx_exception_sniffer (const struct frame_unwind *self,
exception_frame_p);
}
-/* Data structure for normal code using instruction-based prologue
- analyzer. */
+enum unwind_stop_reason
+rx_frame_unwind_stop_reason (const frame_info_ptr& this_frame,
+ void **this_cache)
+{
+ /* find function start */
+ CORE_ADDR func_start = get_frame_func (this_frame);
+ CORE_ADDR func_addr, func_end;
+ const char *funcName = NULL;
+ RX_Data opcode_handle;
+ RX_Opcode_Decoded opc;
+ /* find function end */
+ if (!find_pc_partial_function (func_start, &funcName, &func_addr, &func_end))
+ {
+ /*don't know what happened. leave this to default handling */
+ return UNWIND_NO_REASON;
+ }
+ /*check the last 2 bytes before the end of the function to see if they are
+ RTE or RTFI. If yes this means this is an interrupt function, stop here */
+ opcode_handle.addr = func_end - 2;
+ if(rx_decode_opcode (func_end - 2, &opc, rx_get_opcode_byte,
+ &opcode_handle, machine) == 2)
+ {
+ if((opc.id == RXO_rte) || (opc.id == RXO_rtfi))
+ {
+ return UNWIND_OUTERMOST;
+ }
+ }
+
+ return UNWIND_NO_REASON;
+}
static const struct frame_unwind rx_frame_unwind = {
"rx prologue",
NORMAL_FRAME,
- default_frame_unwind_stop_reason,
+ rx_frame_unwind_stop_reason,
rx_frame_this_id,
rx_frame_prev_register,
NULL,
@@ -922,6 +1072,52 @@ rx_return_value (struct gdbarch *gdbarch,
return RETURN_VALUE_REGISTER_CONVENTION;
}
+/* Breakpoints
+ Suppress software breakpoints in case of REE simulator and hw. */
+
+static int
+rx_memory_insert_breakpoint (struct gdbarch *gdbarch,
+ struct bp_target_info *bp_tgt)
+ {
+ int status = MEMORY_ERROR;
+ for (inferior *inf : all_inferiors_safe ())
+ {
+ if (strcmp(inf->top_target ()->shortname(), "sim") == 0)
+ {
+ status = default_memory_insert_breakpoint (gdbarch, bp_tgt);
+ }
+ }
+ return status;
+}
+
+static int
+rx_memory_remove_breakpoint (struct gdbarch *gdbarch,
+ struct bp_target_info *bp_tgt)
+{
+ int status = MEMORY_ERROR;
+ for (inferior *inf : all_inferiors_safe ())
+ {
+ if (strcmp(inf->top_target ()->shortname(), "sim") == 0)
+ {
+ status = default_memory_insert_breakpoint (gdbarch, bp_tgt);
+ }
+ }
+ return status;
+}
+
+/* Implement the "breakpoint_from_pc" gdbarch method. */
+static const gdb_byte *
+rx_breakpoint_from_pc (struct gdbarch *gdbarch, CORE_ADDR *pcptr, int *lenptr)
+{
+#ifdef __FOR_E2_STUDIO__
+ static gdb_byte breakpoint[] = { 0x01 };
+#else
+ static gdb_byte breakpoint[] = { 0x00 };
+#endif
+ *lenptr = sizeof breakpoint;
+ return breakpoint;
+}
+
constexpr gdb_byte rx_break_insn[] = { 0x00 };
typedef BP_MANIPULATION (rx_break_insn) rx_breakpoint;
@@ -937,10 +1133,57 @@ rx_dwarf_reg_to_regnum (struct gdbarch *gdbarch, int reg)
return RX_PSW_REGNUM;
else if (reg == 17)
return RX_PC_REGNUM;
+ else if(32 <= reg && reg <= 47)
+ return reg + (RXV3_DR0_REGNUM - 32);
else
return -1;
}
+
+/* Implement the unconditional_branch_address gdbarch method. */
+
+static CORE_ADDR
+rx_unconditional_branch_address (struct gdbarch *gdbarch, CORE_ADDR pc)
+{
+ int bytes_read;
+ RX_Opcode_Decoded opc;
+ RX_Data opcode_handle;
+
+ opcode_handle.addr = pc;
+
+ bytes_read = rx_decode_opcode (pc, &opc, rx_get_opcode_byte,
+ &opcode_handle, machine);
+
+ if (bytes_read > 0
+ && (opc.id == RXO_branch || opc.id == RXO_branchrel)
+ && (opc.op[1].type == RX_Operand_None
+ || (opc.op[1].type == RX_Operand_Condition
+ && opc.op[1].reg == RXC_always))
+ && opc.op[0].type == RX_Operand_Immediate)
+ {
+ uint32_t addr = opc.op[0].addend; /* ensure we use 32-bit addrs */
+ if (opc.id != RXO_branch)
+ addr += pc;
+ return addr;
+ }
+
+ return 0;
+}
+
+static void
+set_rx_command (const char *args, int from_tty)
+{
+ printf_unfiltered (_("\
+ \"set rx\" must be followed by an apporpriate subcommand.\n"));
+ help_list (setrxcmdlist, "set rx ", all_commands, gdb_stdout);
+}
+
+static void
+show_rx_command (const char *args, int from_tty)
+{
+ cmd_show_list (showrxcmdlist, from_tty);
+}
+
/* Allocate and initialize a gdbarch object. */
static struct gdbarch *
rx_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
@@ -957,38 +1200,76 @@ rx_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
elf_flags = 0;
- /* Try to find the architecture in the list of already defined
- architectures. */
- for (arches = gdbarch_list_lookup_by_info (arches, &info);
- arches != NULL;
- arches = gdbarch_list_lookup_by_info (arches->next, &info))
+ if (!tdesc_has_registers (tdesc))
+ {
+ if (((elf_flags & E_FLAG_RX_V_MASK) == E_FLAG_RX_V3)
+ && (elf_flags & E_FLAG_RX_V3_DFPU))
{
- rx_gdbarch_tdep *tdep
- = gdbarch_tdep (arches->gdbarch);
-
- if (tdep->elf_flags != elf_flags)
- continue;
-
- return arches->gdbarch;
+ machine = bfd_mach_rx_v3_dfpu;
+ tdesc = tdesc_rx_v3;
}
-
- if (tdesc == NULL)
+ else if ((elf_flags & E_FLAG_RX_V_MASK) == E_FLAG_RX_V3)
+ {
+ machine = bfd_mach_rx_v3;
+ tdesc = tdesc_rx_v2;
+ }
+ else if ((elf_flags & E_FLAG_RX_V_MASK) == E_FLAG_RX_V2)
+ {
+ machine = bfd_mach_rx_v2;
+ tdesc = tdesc_rx_v2;
+ }
+ else
+ {
+ machine = bfd_mach_rx;
tdesc = tdesc_rx;
+ }
+ }
- /* Check any target description for validity. */
+ /* Check target description for validity. */
if (tdesc_has_registers (tdesc))
{
- const struct tdesc_feature *feature;
- bool valid_p = true;
-
+ const struct tdesc_feature *feature = NULL;
+ int valid_p, i;
+ switch(machine)
+ {
+ case bfd_mach_rx:
feature = tdesc_find_feature (tdesc, "org.gnu.gdb.rx.core");
+ break;
+ case bfd_mach_rx_v2:
+ case bfd_mach_rx_v3:
+ feature = tdesc_find_feature (tdesc, "org.gnu.gdb.rx.corev2");
+ break;
+ case bfd_mach_rx_v3_dfpu:
+ feature = tdesc_find_feature (tdesc, "org.gnu.gdb.rx.corev3");
+ break;
+ }
+ if (feature == NULL)
+ return NULL;
- if (feature != NULL)
- {
tdesc_data = tdesc_data_alloc ();
- for (int i = 0; i < RX_NUM_REGS; i++)
- valid_p &= tdesc_numbered_register (feature, tdesc_data.get (), i,
- rx_register_names[i]);
+
+ valid_p = 1;
+ switch(machine)
+ {
+ case bfd_mach_rx:
+ for (i = 0; i < RX_NUM_REGS; i++)
+ {
+ valid_p &= tdesc_numbered_register (feature, tdesc_data.get (), i, rx_register_names[i]);
+ }
+ break;
+ case bfd_mach_rx_v2:
+ case bfd_mach_rx_v3:
+ for (i = 0; i < RXV2_NUM_REGS; i++)
+ {
+ valid_p &= tdesc_numbered_register (feature, tdesc_data.get (), i, rxv2_register_names[i]);
+ }
+ break;
+ case bfd_mach_rx_v3_dfpu:
+ for (i = 0; i < RXV3_NUM_REGS; i++)
+ {
+ valid_p &= tdesc_numbered_register (feature, tdesc_data.get (), i, rxv3_register_names[i]);
+ }
+ break;
}
if (!valid_p)
@@ -1003,8 +1284,20 @@ rx_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
tdep->elf_flags = elf_flags;
+ switch(machine)
+ {
+ case bfd_mach_rx:
set_gdbarch_num_regs (gdbarch, RX_NUM_REGS);
- tdesc_use_registers (gdbarch, tdesc, std::move (tdesc_data));
+ break;
+ case bfd_mach_rx_v2:
+ case bfd_mach_rx_v3:
+ set_gdbarch_num_regs (gdbarch, RXV2_NUM_REGS);
+ break;
+ case bfd_mach_rx_v3_dfpu:
+ set_gdbarch_num_regs (gdbarch, RXV3_NUM_REGS);
+ break;
+ }
+ //tdesc_use_registers (gdbarch, tdesc, std::move (tdesc_data));
set_gdbarch_num_pseudo_regs (gdbarch, 0);
set_gdbarch_pc_regnum (gdbarch, RX_PC_REGNUM);
@@ -1013,8 +1306,26 @@ rx_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
set_gdbarch_decr_pc_after_break (gdbarch, 1);
set_gdbarch_breakpoint_kind_from_pc (gdbarch, rx_breakpoint::kind_from_pc);
set_gdbarch_sw_breakpoint_from_kind (gdbarch, rx_breakpoint::bp_from_kind);
+ set_gdbarch_memory_insert_breakpoint (gdbarch, rx_memory_insert_breakpoint);
+ set_gdbarch_memory_remove_breakpoint (gdbarch, rx_memory_remove_breakpoint);
set_gdbarch_skip_prologue (gdbarch, rx_skip_prologue);
+ switch(machine)
+ {
+ case bfd_mach_rx:
+ set_gdbarch_print_insn (gdbarch, print_insn_rx);
+ break;
+ case bfd_mach_rx_v2:
+ set_gdbarch_print_insn (gdbarch, print_insn_rxv2);
+ break;
+ case bfd_mach_rx_v3:
+ set_gdbarch_print_insn (gdbarch, print_insn_rxv3);
+ break;
+ case bfd_mach_rx_v3_dfpu:
+ set_gdbarch_print_insn (gdbarch, print_insn_rxv3_dfpu);
+ break;
+ }
+
/* Target builtin data types. */
set_gdbarch_char_signed (gdbarch, 0);
set_gdbarch_short_bit (gdbarch, 16);
@@ -1067,4 +1378,14 @@ _initialize_rx_tdep ()
{
gdbarch_register (bfd_arch_rx, rx_gdbarch_init);
initialize_tdesc_rx ();
+ initialize_tdesc_rxv2 ();
+ initialize_tdesc_rxv3 ();
+
+ add_prefix_cmd ("rx", no_class, set_rx_command,
+ _("Various RX-specific commands."),
+ &setrxcmdlist, 0, &setlist);
+
+ add_prefix_cmd ("rx", no_class, show_rx_command,
+ _("Various RX-specific commands."),
+ &showrxcmdlist, 0, &showlist);
}
diff --git a/include/dis-asm.h b/include/dis-asm.h
index 3bdecd37a81f..03e8a0d254a2 100644
--- a/include/dis-asm.h
+++ b/include/dis-asm.h
@@ -369,6 +369,10 @@ extern int print_insn_s12z (bfd_vma, disassemble_info *);
extern int print_insn_sh (bfd_vma, disassemble_info *);
extern int print_insn_sparc (bfd_vma, disassemble_info *);
extern int print_insn_rx (bfd_vma, disassemble_info *);
+extern int print_insn_rx (bfd_vma, disassemble_info *);
+extern int print_insn_rxv2 (bfd_vma, disassemble_info *);
+extern int print_insn_rxv3 (bfd_vma, disassemble_info *);
+extern int print_insn_rxv3_dfpu (bfd_vma, disassemble_info *);
extern int print_insn_rl78 (bfd_vma, disassemble_info *);
extern int print_insn_rl78_g10 (bfd_vma, disassemble_info *);
extern int print_insn_rl78_g13 (bfd_vma, disassemble_info *);
diff --git a/include/elf/rx.h b/include/elf/rx.h
index 1832b2730345..979ec8d43deb 100644
--- a/include/elf/rx.h
+++ b/include/elf/rx.h
@@ -123,8 +123,11 @@ END_RELOC_NUMBERS (R_RX_max)
#define E_FLAG_RX_SINSNS_YES (1 << 7) /* Set if string instructions are used in the binary. */
#define E_FLAG_RX_SINSNS_NO 0 /* Bit-5 if this binary must not be linked with a string instruction using binary. */
#define E_FLAG_RX_SINSNS_MASK (3 << 6) /* Mask of bits used to determine string instruction use. */
-#define E_FLAG_RX_V2 (1 << 8) /* RX v2 instructions */
-#define E_FLAG_RX_V3 (1 << 9) /* RX v3 instructions */
+#define E_FLAG_RX_V1 (1 << 4) /* RX v1 instructions */
+#define E_FLAG_RX_V2 (1 << 5) /* RX v2 instructions */
+#define E_FLAG_RX_V3 (1 << 8) /* RX v3 instructions */
+#define E_FLAG_RX_V3_DFPU (1 << 9) /* instructions with DFPU (only for RX v3)*/
+#define E_FLAG_RX_V_MASK (19 << 4) /* Mask of bits used to determine ISA */
/* These define the addend field of R_RX_RH_RELAX relocations. */
#define RX_RELAXA_IMM6 0x00000010 /* Imm8/16/24/32 at bit offset 6. */
@@ -133,7 +136,7 @@ END_RELOC_NUMBERS (R_RX_max)
#define RX_RELAXA_DSP6 0x00000080 /* Dsp0/8/16 at bit offset 6. */
#define RX_RELAXA_DSP14 0x00000100 /* Dsp0/8/16 at bit offset 14. */
#define RX_RELAXA_BRA 0x00000200 /* Any type of branch (must be decoded). */
-#define RX_RELAXA_RNUM 0x0000000f /* Number of associated relocations. */
+#define RX_RELAXA_RNUM 0x0000000f /* Number of associated relocations. */
/* These mark the place where alignment is requested, and the place where the filler bytes end. */
#define RX_RELAXA_ALIGN 0x10000000 /* Start alignment; the remaining bits are the alignment value. */
#define RX_RELAXA_ELIGN 0x20000000 /* End alignment; the remaining bits are the alignment value. */
diff --git a/include/opcode/rx.h b/include/opcode/rx.h
index 834ead724c06..3b8257a3889b 100644
--- a/include/opcode/rx.h
+++ b/include/opcode/rx.h
@@ -22,6 +22,7 @@
/* The RX decoder in libopcodes is used by the simulator, gdb's
analyzer, and the disassembler. Given an opcode data source,
it decodes the next opcode into the following structures. */
+#include "dis-asm.h"
#ifdef __cplusplus
extern "C" {
@@ -48,11 +49,16 @@ typedef enum
RX_Operand_None,
RX_Operand_Immediate, /* #addend */
RX_Operand_Register, /* Rn */
+ RX_Operand_DR_Register, /* DRn */
+ RX_Operand_DRH_Register, /* DRHn */
+ RX_Operand_DRL_Register, /* DRLn */
+ RX_Operand_DCTRL_Register, //TODO: split more to be able to display flags like PSW registers
RX_Operand_Indirect, /* [Rn + addend] */
RX_Operand_Zero_Indirect,/* [Rn] */
RX_Operand_Postinc, /* [Rn+] */
RX_Operand_Predec, /* [-Rn] */
RX_Operand_Condition, /* eq, gtu, etc */
+ RX_Operand_DFPU_Condition, /* eq, le, etc */
RX_Operand_Flag, /* [UIOSZC] */
RX_Operand_TwoReg, /* [Rn + scale*R2] */
RX_Operand_DoubleReg, /* DRn */
@@ -201,8 +207,25 @@ typedef enum
RXO_dadd,
RXO_dcmp,
RXO_ddiv,
+ RXO_dmov_1,
+ RXO_dmov_2,
+ RXO_dmov_3,
+ RXO_dmov_4,
+ RXO_dmov_5,
+ RXO_dmov_6,
+ RXO_dmov_7,
+ RXO_dmov_8,
+ RXO_dmov_9,
+ RXO_dmov_10,
+ RXO_dmov_11,
+ RXO_dmov_12,
+ RXO_dmov_13,
+ RXO_dmov_14,
+ RXO_dmov_15,
RXO_dmul,
RXO_dneg,
+ RXO_dpopm_2,
+ RXO_dpushm_2,
RXO_dround,
RXO_dsqrt,
RXO_dsub,
@@ -234,6 +257,12 @@ typedef enum
#define RXC_always 14
#define RXC_never 15
+typedef struct
+{
+ bfd_vma addr;
+ disassemble_info * dis;
+} RX_Data;
+
typedef struct
{
RX_Operand_Type type;
@@ -250,7 +279,7 @@ typedef struct
char * syntax;
RX_Size size;
/* By convention, these are destination, source1, source2. */
- RX_Opcode_Operand op[3];
+ RX_Opcode_Operand op[5];
/* The logic here is:
newflags = (oldflags & ~(int)flags_0) | flags_1 | (op_flags & flags_s)
@@ -273,7 +302,7 @@ typedef struct
Register numbers 0..15 are general registers. 16..31 are control
registers. 32..47 are condition codes. */
-int rx_decode_opcode (unsigned long, RX_Opcode_Decoded *, int (*)(void *), void *);
+int rx_decode_opcode (unsigned long, RX_Opcode_Decoded *, int (*)(RX_Data *), RX_Data *, unsigned long);
#ifdef __cplusplus
}
diff --git a/include/sim/sim-rx.h b/include/sim/sim-rx.h
index a950b26ad4ea..60998eaa3bfd 100644
--- a/include/sim/sim-rx.h
+++ b/include/sim/sim-rx.h
@@ -1,6 +1,6 @@
/* sim-rx.h --- interface between RX simulator and GDB.
- Copyright (C) 2008-2024 Free Software Foundation, Inc.
+ Copyright (C) 2008-2025 Free Software Foundation, Inc.
Contributed by Red Hat.
@@ -49,7 +49,29 @@ enum sim_rx_regnum
sim_rx_bpc_regnum,
sim_rx_fintv_regnum,
sim_rx_fpsw_regnum,
- sim_rx_acc_regnum,
+ sim_rx_acc0_regnum,
+ sim_rx_acc1_regnum,
+ sim_rx_extb_regnum,
+ sim_rx_dr0_regnum,
+ sim_rx_dr1_regnum,
+ sim_rx_dr2_regnum,
+ sim_rx_dr3_regnum,
+ sim_rx_dr4_regnum,
+ sim_rx_dr5_regnum,
+ sim_rx_dr6_regnum,
+ sim_rx_dr7_regnum,
+ sim_rx_dr8_regnum,
+ sim_rx_dr9_regnum,
+ sim_rx_dr10_regnum,
+ sim_rx_dr11_regnum,
+ sim_rx_dr12_regnum,
+ sim_rx_dr13_regnum,
+ sim_rx_dr14_regnum,
+ sim_rx_dr15_regnum,
+ sim_rx_dpsw_regnum,
+ sim_rx_dcmr_regnum,
+ sim_rx_decnt_regnum,
+ sim_rx_depc_regnum,
sim_rx_num_regs
};
diff --git a/ld/configure.tgt b/ld/configure.tgt
index b5f272e5ba28..99c14eb4212e 100644
--- a/ld/configure.tgt
+++ b/ld/configure.tgt
@@ -56,6 +56,7 @@ if test "${ac_default_ld_warn_rwx_segments}" = unset; then
hppa*-*-* | \
mips*-*-* | \
microblaze*-*-* | \
+ rx*-*-* | \
sparc*-*-* | \
v850*-*-*)
ac_default_ld_warn_rwx_segments=0
diff --git a/opcodes/disassemble.c b/opcodes/disassemble.c
index 733a0c07aa67..ccc6e040397a 100644
--- a/opcodes/disassemble.c
+++ b/opcodes/disassemble.c
@@ -392,6 +392,13 @@ disassembler (enum bfd_architecture a,
#endif
#ifdef ARCH_rx
case bfd_arch_rx:
+ if (bfd_get_mach (abfd) == bfd_mach_rx_v3_dfpu)
+ disassemble = print_insn_rxv3_dfpu;
+ else if (bfd_get_mach (abfd) == bfd_mach_rx_v3)
+ disassemble = print_insn_rxv3;
+ else if (bfd_get_mach (abfd) == bfd_mach_rx_v2)
+ disassemble = print_insn_rxv2;
+ else
disassemble = print_insn_rx;
break;
#endif
diff --git a/opcodes/rx-decode.c b/opcodes/rx-decode.c
index 13b9af549dec..3d6fe14d9deb 100644
--- a/opcodes/rx-decode.c
+++ b/opcodes/rx-decode.c
@@ -35,8 +35,8 @@
typedef struct
{
RX_Opcode_Decoded * rx;
- int (* getbyte)(void *);
- void * ptr;
+ int (* getbyte)(RX_Data *);
+ RX_Data * ptr;
unsigned char * op;
} LocalData;
@@ -94,9 +94,9 @@ static int _ld[2] =
rx->op[n].size = s )
/* This is for the BWL and BW bitfields. */
-static int SCALE[] = { 1, 2, 4, 0 };
+static int SCALE[4] = { 1, 2, 4, 0 };
/* This is for the prefix size enum. */
-static int PSCALE[] = { 4, 1, 1, 1, 2, 2, 2, 3, 4, 8 };
+static int PSCALE[RX_MAX_SIZE] = { 4, 1, 1, 1, 2, 2, 2, 3, 4, 4, 0 };
#define GET_SCALE(_indx) ((unsigned)(_indx) < ARRAY_SIZE (SCALE) ? SCALE[(_indx)] : 0)
#define GET_PSCALE(_indx) ((unsigned)(_indx) < ARRAY_SIZE (PSCALE) ? PSCALE[(_indx)] : 0)
@@ -289,8 +289,9 @@ rx_disp (int n, int type, int reg, unsigned int size, LocalData * ld)
int
rx_decode_opcode (unsigned long pc AU,
RX_Opcode_Decoded * rx,
- int (* getbyte)(void *),
- void * ptr)
+ int (* getbyte)(RX_Data *),
+ RX_Data * ptr,
+ unsigned long machine)
{
LocalData lds, * ld = &lds;
unsigned char op[20] = {0};
@@ -320,7 +321,7 @@ rx_decode_opcode (unsigned long pc AU,
op[0]);
}
SYNTAX("brk");
-#line 1050 "rx-decode.opc"
+#line 1090 "rx-decode.opc"
ID(brk);
}
@@ -335,7 +336,7 @@ rx_decode_opcode (unsigned long pc AU,
op[0]);
}
SYNTAX("dbt");
-#line 1053 "rx-decode.opc"
+#line 1093 "rx-decode.opc"
ID(dbt);
}
@@ -350,7 +351,7 @@ rx_decode_opcode (unsigned long pc AU,
op[0]);
}
SYNTAX("rts");
-#line 831 "rx-decode.opc"
+#line 832 "rx-decode.opc"
ID(rts);
/*----------------------------------------------------------------------*/
@@ -368,7 +369,7 @@ rx_decode_opcode (unsigned long pc AU,
op[0]);
}
SYNTAX("nop");
-#line 837 "rx-decode.opc"
+#line 838 "rx-decode.opc"
ID(nop);
/*----------------------------------------------------------------------*/
@@ -386,7 +387,7 @@ rx_decode_opcode (unsigned long pc AU,
op[0]);
}
SYNTAX("bra.a %a0");
-#line 809 "rx-decode.opc"
+#line 810 "rx-decode.opc"
ID(branch); DC(pc + IMMex(3));
}
@@ -401,7 +402,7 @@ rx_decode_opcode (unsigned long pc AU,
op[0]);
}
SYNTAX("bsr.a %a0");
-#line 825 "rx-decode.opc"
+#line 826 "rx-decode.opc"
ID(jsr); DC(pc + IMMex(3));
}
@@ -418,13 +419,13 @@ rx_decode_opcode (unsigned long pc AU,
op_semantics_1:
{
/** 0000 0110 mx00 00ss rsrc rdst sub %2%S2, %1 */
-#line 567 "rx-decode.opc"
+#line 568 "rx-decode.opc"
int mx AU = (op[1] >> 6) & 0x03;
-#line 567 "rx-decode.opc"
+#line 568 "rx-decode.opc"
int ss AU = op[1] & 0x03;
-#line 567 "rx-decode.opc"
+#line 568 "rx-decode.opc"
int rsrc AU = (op[2] >> 4) & 0x0f;
-#line 567 "rx-decode.opc"
+#line 568 "rx-decode.opc"
int rdst AU = op[2] & 0x0f;
if (trace)
{
@@ -437,7 +438,7 @@ rx_decode_opcode (unsigned long pc AU,
printf (" rdst = 0x%x\n", rdst);
}
SYNTAX("sub %2%S2, %1");
-#line 567 "rx-decode.opc"
+#line 568 "rx-decode.opc"
ID(sub); S2Pm(ss, rsrc, mx); SR(rdst); DR(rdst); F_OSZC;
}
@@ -479,13 +480,13 @@ rx_decode_opcode (unsigned long pc AU,
op_semantics_2:
{
/** 0000 0110 mx00 01ss rsrc rdst cmp %2%S2, %1 */
-#line 555 "rx-decode.opc"
+#line 556 "rx-decode.opc"
int mx AU = (op[1] >> 6) & 0x03;
-#line 555 "rx-decode.opc"
+#line 556 "rx-decode.opc"
int ss AU = op[1] & 0x03;
-#line 555 "rx-decode.opc"
+#line 556 "rx-decode.opc"
int rsrc AU = (op[2] >> 4) & 0x0f;
-#line 555 "rx-decode.opc"
+#line 556 "rx-decode.opc"
int rdst AU = op[2] & 0x0f;
if (trace)
{
@@ -498,7 +499,7 @@ rx_decode_opcode (unsigned long pc AU,
printf (" rdst = 0x%x\n", rdst);
}
SYNTAX("cmp %2%S2, %1");
-#line 555 "rx-decode.opc"
+#line 556 "rx-decode.opc"
ID(sub); S2Pm(ss, rsrc, mx); SR(rdst); F_OSZC;
/*----------------------------------------------------------------------*/
@@ -543,13 +544,13 @@ rx_decode_opcode (unsigned long pc AU,
op_semantics_3:
{
/** 0000 0110 mx00 10ss rsrc rdst add %1%S1, %0 */
-#line 531 "rx-decode.opc"
+#line 532 "rx-decode.opc"
int mx AU = (op[1] >> 6) & 0x03;
-#line 531 "rx-decode.opc"
+#line 532 "rx-decode.opc"
int ss AU = op[1] & 0x03;
-#line 531 "rx-decode.opc"
+#line 532 "rx-decode.opc"
int rsrc AU = (op[2] >> 4) & 0x0f;
-#line 531 "rx-decode.opc"
+#line 532 "rx-decode.opc"
int rdst AU = op[2] & 0x0f;
if (trace)
{
@@ -562,7 +563,7 @@ rx_decode_opcode (unsigned long pc AU,
printf (" rdst = 0x%x\n", rdst);
}
SYNTAX("add %1%S1, %0");
-#line 531 "rx-decode.opc"
+#line 532 "rx-decode.opc"
ID(add); SPm(ss, rsrc, mx); DR(rdst); F_OSZC;
}
@@ -604,13 +605,13 @@ rx_decode_opcode (unsigned long pc AU,
op_semantics_4:
{
/** 0000 0110 mx00 11ss rsrc rdst mul %1%S1, %0 */
-#line 674 "rx-decode.opc"
+#line 675 "rx-decode.opc"
int mx AU = (op[1] >> 6) & 0x03;
-#line 674 "rx-decode.opc"
+#line 675 "rx-decode.opc"
int ss AU = op[1] & 0x03;
-#line 674 "rx-decode.opc"
+#line 675 "rx-decode.opc"
int rsrc AU = (op[2] >> 4) & 0x0f;
-#line 674 "rx-decode.opc"
+#line 675 "rx-decode.opc"
int rdst AU = op[2] & 0x0f;
if (trace)
{
@@ -623,7 +624,7 @@ rx_decode_opcode (unsigned long pc AU,
printf (" rdst = 0x%x\n", rdst);
}
SYNTAX("mul %1%S1, %0");
-#line 674 "rx-decode.opc"
+#line 675 "rx-decode.opc"
ID(mul); SPm(ss, rsrc, mx); DR(rdst); F_____;
}
@@ -665,13 +666,13 @@ rx_decode_opcode (unsigned long pc AU,
op_semantics_5:
{
/** 0000 0110 mx01 00ss rsrc rdst and %1%S1, %0 */
-#line 444 "rx-decode.opc"
+#line 445 "rx-decode.opc"
int mx AU = (op[1] >> 6) & 0x03;
-#line 444 "rx-decode.opc"
+#line 445 "rx-decode.opc"
int ss AU = op[1] & 0x03;
-#line 444 "rx-decode.opc"
+#line 445 "rx-decode.opc"
int rsrc AU = (op[2] >> 4) & 0x0f;
-#line 444 "rx-decode.opc"
+#line 445 "rx-decode.opc"
int rdst AU = op[2] & 0x0f;
if (trace)
{
@@ -684,7 +685,7 @@ rx_decode_opcode (unsigned long pc AU,
printf (" rdst = 0x%x\n", rdst);
}
SYNTAX("and %1%S1, %0");
-#line 444 "rx-decode.opc"
+#line 445 "rx-decode.opc"
ID(and); SPm(ss, rsrc, mx); DR(rdst); F__SZ_;
}
@@ -726,13 +727,13 @@ rx_decode_opcode (unsigned long pc AU,
op_semantics_6:
{
/** 0000 0110 mx01 01ss rsrc rdst or %1%S1, %0 */
-#line 462 "rx-decode.opc"
+#line 463 "rx-decode.opc"
int mx AU = (op[1] >> 6) & 0x03;
-#line 462 "rx-decode.opc"
+#line 463 "rx-decode.opc"
int ss AU = op[1] & 0x03;
-#line 462 "rx-decode.opc"
+#line 463 "rx-decode.opc"
int rsrc AU = (op[2] >> 4) & 0x0f;
-#line 462 "rx-decode.opc"
+#line 463 "rx-decode.opc"
int rdst AU = op[2] & 0x0f;
if (trace)
{
@@ -745,7 +746,7 @@ rx_decode_opcode (unsigned long pc AU,
printf (" rdst = 0x%x\n", rdst);
}
SYNTAX("or %1%S1, %0");
-#line 462 "rx-decode.opc"
+#line 463 "rx-decode.opc"
ID(or); SPm(ss, rsrc, mx); DR(rdst); F__SZ_;
}
@@ -791,13 +792,13 @@ rx_decode_opcode (unsigned long pc AU,
op_semantics_7:
{
/** 0000 0110 mx10 00sp 0000 0000 rsrc rdst sbb %1%S1, %0 */
-#line 580 "rx-decode.opc"
+#line 581 "rx-decode.opc"
int mx AU = (op[1] >> 6) & 0x03;
-#line 580 "rx-decode.opc"
+#line 581 "rx-decode.opc"
int sp AU = op[1] & 0x03;
-#line 580 "rx-decode.opc"
+#line 581 "rx-decode.opc"
int rsrc AU = (op[3] >> 4) & 0x0f;
-#line 580 "rx-decode.opc"
+#line 581 "rx-decode.opc"
int rdst AU = op[3] & 0x0f;
if (trace)
{
@@ -810,7 +811,7 @@ rx_decode_opcode (unsigned long pc AU,
printf (" rdst = 0x%x\n", rdst);
}
SYNTAX("sbb %1%S1, %0");
-#line 580 "rx-decode.opc"
+#line 581 "rx-decode.opc"
ID(sbb); SPm(sp, rsrc, mx); DR(rdst); F_OSZC;
/*----------------------------------------------------------------------*/
@@ -828,13 +829,13 @@ rx_decode_opcode (unsigned long pc AU,
op_semantics_8:
{
/** 0000 0110 mx10 00ss 0000 0100 rsrc rdst max %1%S1, %0 */
-#line 619 "rx-decode.opc"
+#line 620 "rx-decode.opc"
int mx AU = (op[1] >> 6) & 0x03;
-#line 619 "rx-decode.opc"
+#line 620 "rx-decode.opc"
int ss AU = op[1] & 0x03;
-#line 619 "rx-decode.opc"
+#line 620 "rx-decode.opc"
int rsrc AU = (op[3] >> 4) & 0x0f;
-#line 619 "rx-decode.opc"
+#line 620 "rx-decode.opc"
int rdst AU = op[3] & 0x0f;
if (trace)
{
@@ -847,7 +848,7 @@ rx_decode_opcode (unsigned long pc AU,
printf (" rdst = 0x%x\n", rdst);
}
SYNTAX("max %1%S1, %0");
-#line 619 "rx-decode.opc"
+#line 620 "rx-decode.opc"
ID(max); SPm(ss, rsrc, mx); DR(rdst);
/*----------------------------------------------------------------------*/
@@ -865,13 +866,13 @@ rx_decode_opcode (unsigned long pc AU,
op_semantics_9:
{
/** 0000 0110 mx10 00ss 0000 0101 rsrc rdst min %1%S1, %0 */
-#line 631 "rx-decode.opc"
+#line 632 "rx-decode.opc"
int mx AU = (op[1] >> 6) & 0x03;
-#line 631 "rx-decode.opc"
+#line 632 "rx-decode.opc"
int ss AU = op[1] & 0x03;
-#line 631 "rx-decode.opc"
+#line 632 "rx-decode.opc"
int rsrc AU = (op[3] >> 4) & 0x0f;
-#line 631 "rx-decode.opc"
+#line 632 "rx-decode.opc"
int rdst AU = op[3] & 0x0f;
if (trace)
{
@@ -884,7 +885,7 @@ rx_decode_opcode (unsigned long pc AU,
printf (" rdst = 0x%x\n", rdst);
}
SYNTAX("min %1%S1, %0");
-#line 631 "rx-decode.opc"
+#line 632 "rx-decode.opc"
ID(min); SPm(ss, rsrc, mx); DR(rdst);
/*----------------------------------------------------------------------*/
@@ -902,13 +903,13 @@ rx_decode_opcode (unsigned long pc AU,
op_semantics_10:
{
/** 0000 0110 mx10 00ss 0000 0110 rsrc rdst emul %1%S1, %0 */
-#line 689 "rx-decode.opc"
+#line 690 "rx-decode.opc"
int mx AU = (op[1] >> 6) & 0x03;
-#line 689 "rx-decode.opc"
+#line 690 "rx-decode.opc"
int ss AU = op[1] & 0x03;
-#line 689 "rx-decode.opc"
+#line 690 "rx-decode.opc"
int rsrc AU = (op[3] >> 4) & 0x0f;
-#line 689 "rx-decode.opc"
+#line 690 "rx-decode.opc"
int rdst AU = op[3] & 0x0f;
if (trace)
{
@@ -921,7 +922,7 @@ rx_decode_opcode (unsigned long pc AU,
printf (" rdst = 0x%x\n", rdst);
}
SYNTAX("emul %1%S1, %0");
-#line 689 "rx-decode.opc"
+#line 690 "rx-decode.opc"
ID(emul); SPm(ss, rsrc, mx); DR(rdst);
/*----------------------------------------------------------------------*/
@@ -939,13 +940,13 @@ rx_decode_opcode (unsigned long pc AU,
op_semantics_11:
{
/** 0000 0110 mx10 00ss 0000 0111 rsrc rdst emulu %1%S1, %0 */
-#line 701 "rx-decode.opc"
+#line 702 "rx-decode.opc"
int mx AU = (op[1] >> 6) & 0x03;
-#line 701 "rx-decode.opc"
+#line 702 "rx-decode.opc"
int ss AU = op[1] & 0x03;
-#line 701 "rx-decode.opc"
+#line 702 "rx-decode.opc"
int rsrc AU = (op[3] >> 4) & 0x0f;
-#line 701 "rx-decode.opc"
+#line 702 "rx-decode.opc"
int rdst AU = op[3] & 0x0f;
if (trace)
{
@@ -958,7 +959,7 @@ rx_decode_opcode (unsigned long pc AU,
printf (" rdst = 0x%x\n", rdst);
}
SYNTAX("emulu %1%S1, %0");
-#line 701 "rx-decode.opc"
+#line 702 "rx-decode.opc"
ID(emulu); SPm(ss, rsrc, mx); DR(rdst);
/*----------------------------------------------------------------------*/
@@ -976,13 +977,13 @@ rx_decode_opcode (unsigned long pc AU,
op_semantics_12:
{
/** 0000 0110 mx10 00ss 0000 1000 rsrc rdst div %1%S1, %0 */
-#line 713 "rx-decode.opc"
+#line 714 "rx-decode.opc"
int mx AU = (op[1] >> 6) & 0x03;
-#line 713 "rx-decode.opc"
+#line 714 "rx-decode.opc"
int ss AU = op[1] & 0x03;
-#line 713 "rx-decode.opc"
+#line 714 "rx-decode.opc"
int rsrc AU = (op[3] >> 4) & 0x0f;
-#line 713 "rx-decode.opc"
+#line 714 "rx-decode.opc"
int rdst AU = op[3] & 0x0f;
if (trace)
{
@@ -995,7 +996,7 @@ rx_decode_opcode (unsigned long pc AU,
printf (" rdst = 0x%x\n", rdst);
}
SYNTAX("div %1%S1, %0");
-#line 713 "rx-decode.opc"
+#line 714 "rx-decode.opc"
ID(div); SPm(ss, rsrc, mx); DR(rdst); F_O___;
/*----------------------------------------------------------------------*/
@@ -1013,13 +1014,13 @@ rx_decode_opcode (unsigned long pc AU,
op_semantics_13:
{
/** 0000 0110 mx10 00ss 0000 1001 rsrc rdst divu %1%S1, %0 */
-#line 725 "rx-decode.opc"
+#line 726 "rx-decode.opc"
int mx AU = (op[1] >> 6) & 0x03;
-#line 725 "rx-decode.opc"
+#line 726 "rx-decode.opc"
int ss AU = op[1] & 0x03;
-#line 725 "rx-decode.opc"
+#line 726 "rx-decode.opc"
int rsrc AU = (op[3] >> 4) & 0x0f;
-#line 725 "rx-decode.opc"
+#line 726 "rx-decode.opc"
int rdst AU = op[3] & 0x0f;
if (trace)
{
@@ -1032,7 +1033,7 @@ rx_decode_opcode (unsigned long pc AU,
printf (" rdst = 0x%x\n", rdst);
}
SYNTAX("divu %1%S1, %0");
-#line 725 "rx-decode.opc"
+#line 726 "rx-decode.opc"
ID(divu); SPm(ss, rsrc, mx); DR(rdst); F_O___;
/*----------------------------------------------------------------------*/
@@ -1050,13 +1051,13 @@ rx_decode_opcode (unsigned long pc AU,
op_semantics_14:
{
/** 0000 0110 mx10 00ss 0000 1100 rsrc rdst tst %1%S1, %2 */
-#line 498 "rx-decode.opc"
+#line 499 "rx-decode.opc"
int mx AU = (op[1] >> 6) & 0x03;
-#line 498 "rx-decode.opc"
+#line 499 "rx-decode.opc"
int ss AU = op[1] & 0x03;
-#line 498 "rx-decode.opc"
+#line 499 "rx-decode.opc"
int rsrc AU = (op[3] >> 4) & 0x0f;
-#line 498 "rx-decode.opc"
+#line 499 "rx-decode.opc"
int rdst AU = op[3] & 0x0f;
if (trace)
{
@@ -1069,7 +1070,7 @@ rx_decode_opcode (unsigned long pc AU,
printf (" rdst = 0x%x\n", rdst);
}
SYNTAX("tst %1%S1, %2");
-#line 498 "rx-decode.opc"
+#line 499 "rx-decode.opc"
ID(and); SPm(ss, rsrc, mx); S2R(rdst); F__SZ_;
/*----------------------------------------------------------------------*/
@@ -1087,13 +1088,13 @@ rx_decode_opcode (unsigned long pc AU,
op_semantics_15:
{
/** 0000 0110 mx10 00ss 0000 1101 rsrc rdst xor %1%S1, %0 */
-#line 477 "rx-decode.opc"
+#line 478 "rx-decode.opc"
int mx AU = (op[1] >> 6) & 0x03;
-#line 477 "rx-decode.opc"
+#line 478 "rx-decode.opc"
int ss AU = op[1] & 0x03;
-#line 477 "rx-decode.opc"
+#line 478 "rx-decode.opc"
int rsrc AU = (op[3] >> 4) & 0x0f;
-#line 477 "rx-decode.opc"
+#line 478 "rx-decode.opc"
int rdst AU = op[3] & 0x0f;
if (trace)
{
@@ -1106,7 +1107,7 @@ rx_decode_opcode (unsigned long pc AU,
printf (" rdst = 0x%x\n", rdst);
}
SYNTAX("xor %1%S1, %0");
-#line 477 "rx-decode.opc"
+#line 478 "rx-decode.opc"
ID(xor); SPm(ss, rsrc, mx); DR(rdst); F__SZ_;
/*----------------------------------------------------------------------*/
@@ -1124,13 +1125,13 @@ rx_decode_opcode (unsigned long pc AU,
op_semantics_16:
{
/** 0000 0110 mx10 00ss 0001 0000 rsrc rdst xchg %1%S1, %0 */
-#line 411 "rx-decode.opc"
+#line 412 "rx-decode.opc"
int mx AU = (op[1] >> 6) & 0x03;
-#line 411 "rx-decode.opc"
+#line 412 "rx-decode.opc"
int ss AU = op[1] & 0x03;
-#line 411 "rx-decode.opc"
+#line 412 "rx-decode.opc"
int rsrc AU = (op[3] >> 4) & 0x0f;
-#line 411 "rx-decode.opc"
+#line 412 "rx-decode.opc"
int rdst AU = op[3] & 0x0f;
if (trace)
{
@@ -1143,7 +1144,7 @@ rx_decode_opcode (unsigned long pc AU,
printf (" rdst = 0x%x\n", rdst);
}
SYNTAX("xchg %1%S1, %0");
-#line 411 "rx-decode.opc"
+#line 412 "rx-decode.opc"
ID(xchg); DR(rdst); SPm(ss, rsrc, mx);
/*----------------------------------------------------------------------*/
@@ -1161,13 +1162,13 @@ rx_decode_opcode (unsigned long pc AU,
op_semantics_17:
{
/** 0000 0110 mx10 00sd 0001 0001 rsrc rdst itof %1%S1, %0 */
-#line 954 "rx-decode.opc"
+#line 955 "rx-decode.opc"
int mx AU = (op[1] >> 6) & 0x03;
-#line 954 "rx-decode.opc"
+#line 955 "rx-decode.opc"
int sd AU = op[1] & 0x03;
-#line 954 "rx-decode.opc"
+#line 955 "rx-decode.opc"
int rsrc AU = (op[3] >> 4) & 0x0f;
-#line 954 "rx-decode.opc"
+#line 955 "rx-decode.opc"
int rdst AU = op[3] & 0x0f;
if (trace)
{
@@ -1180,7 +1181,7 @@ rx_decode_opcode (unsigned long pc AU,
printf (" rdst = 0x%x\n", rdst);
}
SYNTAX("itof %1%S1, %0");
-#line 954 "rx-decode.opc"
+#line 955 "rx-decode.opc"
ID(itof); DR (rdst); SPm(sd, rsrc, mx); F__SZ_;
/*----------------------------------------------------------------------*/
@@ -1198,13 +1199,13 @@ rx_decode_opcode (unsigned long pc AU,
op_semantics_18:
{
/** 0000 0110 mx10 00sd 0001 0101 rsrc rdst utof %1%S1, %0 */
-#line 1140 "rx-decode.opc"
+#line 1180 "rx-decode.opc"
int mx AU = (op[1] >> 6) & 0x03;
-#line 1140 "rx-decode.opc"
+#line 1180 "rx-decode.opc"
int sd AU = op[1] & 0x03;
-#line 1140 "rx-decode.opc"
+#line 1180 "rx-decode.opc"
int rsrc AU = (op[3] >> 4) & 0x0f;
-#line 1140 "rx-decode.opc"
+#line 1180 "rx-decode.opc"
int rdst AU = op[3] & 0x0f;
if (trace)
{
@@ -1217,7 +1218,7 @@ rx_decode_opcode (unsigned long pc AU,
printf (" rdst = 0x%x\n", rdst);
}
SYNTAX("utof %1%S1, %0");
-#line 1140 "rx-decode.opc"
+#line 1180 "rx-decode.opc"
ID(utof); DR (rdst); SPm(sd, rsrc, mx); F__SZ_;
/*----------------------------------------------------------------------*/
@@ -2488,11 +2489,11 @@ rx_decode_opcode (unsigned long pc AU,
op_semantics_19:
{
/** 0000 0110 1010 00ss 0000 0010 rsrc rdst adc %1%S1, %0 */
-#line 519 "rx-decode.opc"
+#line 520 "rx-decode.opc"
int ss AU = op[1] & 0x03;
-#line 519 "rx-decode.opc"
+#line 520 "rx-decode.opc"
int rsrc AU = (op[3] >> 4) & 0x0f;
-#line 519 "rx-decode.opc"
+#line 520 "rx-decode.opc"
int rdst AU = op[3] & 0x0f;
if (trace)
{
@@ -2504,7 +2505,7 @@ rx_decode_opcode (unsigned long pc AU,
printf (" rdst = 0x%x\n", rdst);
}
SYNTAX("adc %1%S1, %0");
-#line 519 "rx-decode.opc"
+#line 520 "rx-decode.opc"
ID(adc); SPm(ss, rsrc, 2); DR(rdst); F_OSZC;
/*----------------------------------------------------------------------*/
@@ -3677,7 +3678,7 @@ rx_decode_opcode (unsigned long pc AU,
case 0x0f:
{
/** 0000 1dsp bra.s %a0 */
-#line 800 "rx-decode.opc"
+#line 801 "rx-decode.opc"
int dsp AU = op[0] & 0x07;
if (trace)
{
@@ -3687,7 +3688,7 @@ rx_decode_opcode (unsigned long pc AU,
printf (" dsp = 0x%x\n", dsp);
}
SYNTAX("bra.s %a0");
-#line 800 "rx-decode.opc"
+#line 801 "rx-decode.opc"
ID(branch); DC(pc + dsp3map[dsp]);
}
@@ -3710,9 +3711,9 @@ rx_decode_opcode (unsigned long pc AU,
case 0x1f:
{
/** 0001 n dsp b%1.s %a0 */
-#line 790 "rx-decode.opc"
+#line 791 "rx-decode.opc"
int n AU = (op[0] >> 3) & 0x01;
-#line 790 "rx-decode.opc"
+#line 791 "rx-decode.opc"
int dsp AU = op[0] & 0x07;
if (trace)
{
@@ -3723,7 +3724,7 @@ rx_decode_opcode (unsigned long pc AU,
printf (" dsp = 0x%x\n", dsp);
}
SYNTAX("b%1.s %a0");
-#line 790 "rx-decode.opc"
+#line 791 "rx-decode.opc"
ID(branch); Scc(n); DC(pc + dsp3map[dsp]);
}
@@ -3745,7 +3746,7 @@ rx_decode_opcode (unsigned long pc AU,
case 0x2f:
{
/** 0010 cond b%1.b %a0 */
-#line 793 "rx-decode.opc"
+#line 794 "rx-decode.opc"
int cond AU = op[0] & 0x0f;
if (trace)
{
@@ -3755,7 +3756,7 @@ rx_decode_opcode (unsigned long pc AU,
printf (" cond = 0x%x\n", cond);
}
SYNTAX("b%1.b %a0");
-#line 793 "rx-decode.opc"
+#line 794 "rx-decode.opc"
ID(branch); Scc(cond); DC(pc + IMMex (1));
}
@@ -3770,7 +3771,7 @@ rx_decode_opcode (unsigned long pc AU,
op[0]);
}
SYNTAX("bra.b %a0");
-#line 803 "rx-decode.opc"
+#line 804 "rx-decode.opc"
ID(branch); DC(pc + IMMex(1));
}
@@ -3785,7 +3786,7 @@ rx_decode_opcode (unsigned long pc AU,
op[0]);
}
SYNTAX("bra.w %a0");
-#line 806 "rx-decode.opc"
+#line 807 "rx-decode.opc"
ID(branch); DC(pc + IMMex(2));
}
@@ -3800,7 +3801,7 @@ rx_decode_opcode (unsigned long pc AU,
op[0]);
}
SYNTAX("bsr.w %a0");
-#line 822 "rx-decode.opc"
+#line 823 "rx-decode.opc"
ID(jsr); DC(pc + IMMex(2));
}
@@ -3809,7 +3810,7 @@ rx_decode_opcode (unsigned long pc AU,
case 0x3b:
{
/** 0011 101c b%1.w %a0 */
-#line 796 "rx-decode.opc"
+#line 797 "rx-decode.opc"
int c AU = op[0] & 0x01;
if (trace)
{
@@ -3819,7 +3820,7 @@ rx_decode_opcode (unsigned long pc AU,
printf (" c = 0x%x\n", c);
}
SYNTAX("b%1.w %a0");
-#line 796 "rx-decode.opc"
+#line 797 "rx-decode.opc"
ID(branch); Scc(c); DC(pc + IMMex (2));
@@ -3833,13 +3834,13 @@ rx_decode_opcode (unsigned long pc AU,
op_semantics_20:
{
/** 0011 11sz d dst sppp mov%s #%1, %0 */
-#line 332 "rx-decode.opc"
+#line 333 "rx-decode.opc"
int sz AU = op[0] & 0x03;
-#line 332 "rx-decode.opc"
+#line 333 "rx-decode.opc"
int d AU = (op[1] >> 7) & 0x01;
-#line 332 "rx-decode.opc"
+#line 333 "rx-decode.opc"
int dst AU = (op[1] >> 4) & 0x07;
-#line 332 "rx-decode.opc"
+#line 333 "rx-decode.opc"
int sppp AU = op[1] & 0x0f;
if (trace)
{
@@ -3852,7 +3853,7 @@ rx_decode_opcode (unsigned long pc AU,
printf (" sppp = 0x%x\n", sppp);
}
SYNTAX("mov%s #%1, %0");
-#line 332 "rx-decode.opc"
+#line 333 "rx-decode.opc"
ID(mov); sBWL (sz); DIs(dst, d*16+sppp, sz); SC(IMM(1)); F_____;
}
@@ -3884,9 +3885,9 @@ rx_decode_opcode (unsigned long pc AU,
case 0x00:
{
/** 0011 1111 rega regb rtsd #%1, %2-%0 */
-#line 429 "rx-decode.opc"
+#line 430 "rx-decode.opc"
int rega AU = (op[1] >> 4) & 0x0f;
-#line 429 "rx-decode.opc"
+#line 430 "rx-decode.opc"
int regb AU = op[1] & 0x0f;
if (trace)
{
@@ -3897,7 +3898,7 @@ rx_decode_opcode (unsigned long pc AU,
printf (" regb = 0x%x\n", regb);
}
SYNTAX("rtsd #%1, %2-%0");
-#line 429 "rx-decode.opc"
+#line 430 "rx-decode.opc"
ID(rtsd); SC(IMM(1) * 4); S2R(rega); DR(regb);
/*----------------------------------------------------------------------*/
@@ -3915,11 +3916,11 @@ rx_decode_opcode (unsigned long pc AU,
op_semantics_21:
{
/** 0100 00ss rsrc rdst sub %2%S2, %1 */
-#line 564 "rx-decode.opc"
+#line 565 "rx-decode.opc"
int ss AU = op[0] & 0x03;
-#line 564 "rx-decode.opc"
+#line 565 "rx-decode.opc"
int rsrc AU = (op[1] >> 4) & 0x0f;
-#line 564 "rx-decode.opc"
+#line 565 "rx-decode.opc"
int rdst AU = op[1] & 0x0f;
if (trace)
{
@@ -3931,7 +3932,7 @@ rx_decode_opcode (unsigned long pc AU,
printf (" rdst = 0x%x\n", rdst);
}
SYNTAX("sub %2%S2, %1");
-#line 564 "rx-decode.opc"
+#line 565 "rx-decode.opc"
ID(sub); S2P(ss, rsrc); SR(rdst); DR(rdst); F_OSZC;
}
@@ -3973,11 +3974,11 @@ rx_decode_opcode (unsigned long pc AU,
op_semantics_22:
{
/** 0100 01ss rsrc rdst cmp %2%S2, %1 */
-#line 552 "rx-decode.opc"
+#line 553 "rx-decode.opc"
int ss AU = op[0] & 0x03;
-#line 552 "rx-decode.opc"
+#line 553 "rx-decode.opc"
int rsrc AU = (op[1] >> 4) & 0x0f;
-#line 552 "rx-decode.opc"
+#line 553 "rx-decode.opc"
int rdst AU = op[1] & 0x0f;
if (trace)
{
@@ -3989,7 +3990,7 @@ rx_decode_opcode (unsigned long pc AU,
printf (" rdst = 0x%x\n", rdst);
}
SYNTAX("cmp %2%S2, %1");
-#line 552 "rx-decode.opc"
+#line 553 "rx-decode.opc"
ID(sub); S2P(ss, rsrc); SR(rdst); F_OSZC;
}
@@ -4031,11 +4032,11 @@ rx_decode_opcode (unsigned long pc AU,
op_semantics_23:
{
/** 0100 10ss rsrc rdst add %1%S1, %0 */
-#line 528 "rx-decode.opc"
+#line 529 "rx-decode.opc"
int ss AU = op[0] & 0x03;
-#line 528 "rx-decode.opc"
+#line 529 "rx-decode.opc"
int rsrc AU = (op[1] >> 4) & 0x0f;
-#line 528 "rx-decode.opc"
+#line 529 "rx-decode.opc"
int rdst AU = op[1] & 0x0f;
if (trace)
{
@@ -4047,7 +4048,7 @@ rx_decode_opcode (unsigned long pc AU,
printf (" rdst = 0x%x\n", rdst);
}
SYNTAX("add %1%S1, %0");
-#line 528 "rx-decode.opc"
+#line 529 "rx-decode.opc"
ID(add); SP(ss, rsrc); DR(rdst); F_OSZC;
}
@@ -4089,11 +4090,11 @@ rx_decode_opcode (unsigned long pc AU,
op_semantics_24:
{
/** 0100 11ss rsrc rdst mul %1%S1, %0 */
-#line 671 "rx-decode.opc"
+#line 672 "rx-decode.opc"
int ss AU = op[0] & 0x03;
-#line 671 "rx-decode.opc"
+#line 672 "rx-decode.opc"
int rsrc AU = (op[1] >> 4) & 0x0f;
-#line 671 "rx-decode.opc"
+#line 672 "rx-decode.opc"
int rdst AU = op[1] & 0x0f;
if (trace)
{
@@ -4105,7 +4106,7 @@ rx_decode_opcode (unsigned long pc AU,
printf (" rdst = 0x%x\n", rdst);
}
SYNTAX("mul %1%S1, %0");
-#line 671 "rx-decode.opc"
+#line 672 "rx-decode.opc"
ID(mul); SP(ss, rsrc); DR(rdst); F_____;
}
@@ -4147,11 +4148,11 @@ rx_decode_opcode (unsigned long pc AU,
op_semantics_25:
{
/** 0101 00ss rsrc rdst and %1%S1, %0 */
-#line 441 "rx-decode.opc"
+#line 442 "rx-decode.opc"
int ss AU = op[0] & 0x03;
-#line 441 "rx-decode.opc"
+#line 442 "rx-decode.opc"
int rsrc AU = (op[1] >> 4) & 0x0f;
-#line 441 "rx-decode.opc"
+#line 442 "rx-decode.opc"
int rdst AU = op[1] & 0x0f;
if (trace)
{
@@ -4163,7 +4164,7 @@ rx_decode_opcode (unsigned long pc AU,
printf (" rdst = 0x%x\n", rdst);
}
SYNTAX("and %1%S1, %0");
-#line 441 "rx-decode.opc"
+#line 442 "rx-decode.opc"
ID(and); SP(ss, rsrc); DR(rdst); F__SZ_;
}
@@ -4205,11 +4206,11 @@ rx_decode_opcode (unsigned long pc AU,
op_semantics_26:
{
/** 0101 01ss rsrc rdst or %1%S1, %0 */
-#line 459 "rx-decode.opc"
+#line 460 "rx-decode.opc"
int ss AU = op[0] & 0x03;
-#line 459 "rx-decode.opc"
+#line 460 "rx-decode.opc"
int rsrc AU = (op[1] >> 4) & 0x0f;
-#line 459 "rx-decode.opc"
+#line 460 "rx-decode.opc"
int rdst AU = op[1] & 0x0f;
if (trace)
{
@@ -4221,7 +4222,7 @@ rx_decode_opcode (unsigned long pc AU,
printf (" rdst = 0x%x\n", rdst);
}
SYNTAX("or %1%S1, %0");
-#line 459 "rx-decode.opc"
+#line 460 "rx-decode.opc"
ID(or); SP(ss, rsrc); DR(rdst); F__SZ_;
}
@@ -4263,13 +4264,13 @@ rx_decode_opcode (unsigned long pc AU,
op_semantics_27:
{
/** 0101 1 s ss rsrc rdst movu%s %1, %0 */
-#line 380 "rx-decode.opc"
+#line 381 "rx-decode.opc"
int s AU = (op[0] >> 2) & 0x01;
-#line 380 "rx-decode.opc"
+#line 381 "rx-decode.opc"
int ss AU = op[0] & 0x03;
-#line 380 "rx-decode.opc"
+#line 381 "rx-decode.opc"
int rsrc AU = (op[1] >> 4) & 0x0f;
-#line 380 "rx-decode.opc"
+#line 381 "rx-decode.opc"
int rdst AU = op[1] & 0x0f;
if (trace)
{
@@ -4282,7 +4283,7 @@ rx_decode_opcode (unsigned long pc AU,
printf (" rdst = 0x%x\n", rdst);
}
SYNTAX("movu%s %1, %0");
-#line 380 "rx-decode.opc"
+#line 381 "rx-decode.opc"
ID(mov); uBW(s); SD(ss, rsrc, s); DR(rdst); F_____;
}
@@ -4359,9 +4360,9 @@ rx_decode_opcode (unsigned long pc AU,
case 0x00:
{
/** 0110 0000 immm rdst sub #%2, %0 */
-#line 561 "rx-decode.opc"
+#line 562 "rx-decode.opc"
int immm AU = (op[1] >> 4) & 0x0f;
-#line 561 "rx-decode.opc"
+#line 562 "rx-decode.opc"
int rdst AU = op[1] & 0x0f;
if (trace)
{
@@ -4372,7 +4373,7 @@ rx_decode_opcode (unsigned long pc AU,
printf (" rdst = 0x%x\n", rdst);
}
SYNTAX("sub #%2, %0");
-#line 561 "rx-decode.opc"
+#line 562 "rx-decode.opc"
ID(sub); S2C(immm); SR(rdst); DR(rdst); F_OSZC;
}
@@ -4386,9 +4387,9 @@ rx_decode_opcode (unsigned long pc AU,
case 0x00:
{
/** 0110 0001 immm rdst cmp #%2, %1 */
-#line 543 "rx-decode.opc"
+#line 544 "rx-decode.opc"
int immm AU = (op[1] >> 4) & 0x0f;
-#line 543 "rx-decode.opc"
+#line 544 "rx-decode.opc"
int rdst AU = op[1] & 0x0f;
if (trace)
{
@@ -4399,7 +4400,7 @@ rx_decode_opcode (unsigned long pc AU,
printf (" rdst = 0x%x\n", rdst);
}
SYNTAX("cmp #%2, %1");
-#line 543 "rx-decode.opc"
+#line 544 "rx-decode.opc"
ID(sub); S2C(immm); SR(rdst); F_OSZC;
}
@@ -4413,9 +4414,9 @@ rx_decode_opcode (unsigned long pc AU,
case 0x00:
{
/** 0110 0010 immm rdst add #%1, %0 */
-#line 525 "rx-decode.opc"
+#line 526 "rx-decode.opc"
int immm AU = (op[1] >> 4) & 0x0f;
-#line 525 "rx-decode.opc"
+#line 526 "rx-decode.opc"
int rdst AU = op[1] & 0x0f;
if (trace)
{
@@ -4426,7 +4427,7 @@ rx_decode_opcode (unsigned long pc AU,
printf (" rdst = 0x%x\n", rdst);
}
SYNTAX("add #%1, %0");
-#line 525 "rx-decode.opc"
+#line 526 "rx-decode.opc"
ID(add); SC(immm); DR(rdst); F_OSZC;
}
@@ -4440,9 +4441,9 @@ rx_decode_opcode (unsigned long pc AU,
case 0x00:
{
/** 0110 0011 immm rdst mul #%1, %0 */
-#line 637 "rx-decode.opc"
+#line 638 "rx-decode.opc"
int immm AU = (op[1] >> 4) & 0x0f;
-#line 637 "rx-decode.opc"
+#line 638 "rx-decode.opc"
int rdst AU = op[1] & 0x0f;
if (trace)
{
@@ -4453,7 +4454,7 @@ rx_decode_opcode (unsigned long pc AU,
printf (" rdst = 0x%x\n", rdst);
}
SYNTAX("mul #%1, %0");
-#line 637 "rx-decode.opc"
+#line 638 "rx-decode.opc"
if (immm == 1 && rdst == 0)
{
ID(nop2);
@@ -4476,9 +4477,9 @@ rx_decode_opcode (unsigned long pc AU,
case 0x00:
{
/** 0110 0100 immm rdst and #%1, %0 */
-#line 435 "rx-decode.opc"
+#line 436 "rx-decode.opc"
int immm AU = (op[1] >> 4) & 0x0f;
-#line 435 "rx-decode.opc"
+#line 436 "rx-decode.opc"
int rdst AU = op[1] & 0x0f;
if (trace)
{
@@ -4489,7 +4490,7 @@ rx_decode_opcode (unsigned long pc AU,
printf (" rdst = 0x%x\n", rdst);
}
SYNTAX("and #%1, %0");
-#line 435 "rx-decode.opc"
+#line 436 "rx-decode.opc"
ID(and); SC(immm); DR(rdst); F__SZ_;
}
@@ -4503,9 +4504,9 @@ rx_decode_opcode (unsigned long pc AU,
case 0x00:
{
/** 0110 0101 immm rdst or #%1, %0 */
-#line 453 "rx-decode.opc"
+#line 454 "rx-decode.opc"
int immm AU = (op[1] >> 4) & 0x0f;
-#line 453 "rx-decode.opc"
+#line 454 "rx-decode.opc"
int rdst AU = op[1] & 0x0f;
if (trace)
{
@@ -4516,7 +4517,7 @@ rx_decode_opcode (unsigned long pc AU,
printf (" rdst = 0x%x\n", rdst);
}
SYNTAX("or #%1, %0");
-#line 453 "rx-decode.opc"
+#line 454 "rx-decode.opc"
ID(or); SC(immm); DR(rdst); F__SZ_;
}
@@ -4530,9 +4531,9 @@ rx_decode_opcode (unsigned long pc AU,
case 0x00:
{
/** 0110 0110 immm rdst mov%s #%1, %0 */
-#line 329 "rx-decode.opc"
+#line 330 "rx-decode.opc"
int immm AU = (op[1] >> 4) & 0x0f;
-#line 329 "rx-decode.opc"
+#line 330 "rx-decode.opc"
int rdst AU = op[1] & 0x0f;
if (trace)
{
@@ -4543,7 +4544,7 @@ rx_decode_opcode (unsigned long pc AU,
printf (" rdst = 0x%x\n", rdst);
}
SYNTAX("mov%s #%1, %0");
-#line 329 "rx-decode.opc"
+#line 330 "rx-decode.opc"
ID(mov); DR(rdst); SC(immm); F_____;
}
@@ -4560,7 +4561,7 @@ rx_decode_opcode (unsigned long pc AU,
op[0]);
}
SYNTAX("rtsd #%1");
-#line 426 "rx-decode.opc"
+#line 427 "rx-decode.opc"
ID(rtsd); SC(IMM(1) * 4);
}
@@ -4573,11 +4574,11 @@ rx_decode_opcode (unsigned long pc AU,
op_semantics_28:
{
/** 0110 100i mmmm rdst shlr #%2, %0 */
-#line 751 "rx-decode.opc"
+#line 752 "rx-decode.opc"
int i AU = op[0] & 0x01;
-#line 751 "rx-decode.opc"
+#line 752 "rx-decode.opc"
int mmmm AU = (op[1] >> 4) & 0x0f;
-#line 751 "rx-decode.opc"
+#line 752 "rx-decode.opc"
int rdst AU = op[1] & 0x0f;
if (trace)
{
@@ -4589,7 +4590,7 @@ rx_decode_opcode (unsigned long pc AU,
printf (" rdst = 0x%x\n", rdst);
}
SYNTAX("shlr #%2, %0");
-#line 751 "rx-decode.opc"
+#line 752 "rx-decode.opc"
ID(shlr); S2C(i*16+mmmm); SR(rdst); DR(rdst); F__SZC;
}
@@ -4613,11 +4614,11 @@ rx_decode_opcode (unsigned long pc AU,
op_semantics_29:
{
/** 0110 101i mmmm rdst shar #%2, %0 */
-#line 741 "rx-decode.opc"
+#line 742 "rx-decode.opc"
int i AU = op[0] & 0x01;
-#line 741 "rx-decode.opc"
+#line 742 "rx-decode.opc"
int mmmm AU = (op[1] >> 4) & 0x0f;
-#line 741 "rx-decode.opc"
+#line 742 "rx-decode.opc"
int rdst AU = op[1] & 0x0f;
if (trace)
{
@@ -4629,7 +4630,7 @@ rx_decode_opcode (unsigned long pc AU,
printf (" rdst = 0x%x\n", rdst);
}
SYNTAX("shar #%2, %0");
-#line 741 "rx-decode.opc"
+#line 742 "rx-decode.opc"
ID(shar); S2C(i*16+mmmm); SR(rdst); DR(rdst); F_0SZC;
}
@@ -4653,11 +4654,11 @@ rx_decode_opcode (unsigned long pc AU,
op_semantics_30:
{
/** 0110 110i mmmm rdst shll #%2, %0 */
-#line 731 "rx-decode.opc"
+#line 732 "rx-decode.opc"
int i AU = op[0] & 0x01;
-#line 731 "rx-decode.opc"
+#line 732 "rx-decode.opc"
int mmmm AU = (op[1] >> 4) & 0x0f;
-#line 731 "rx-decode.opc"
+#line 732 "rx-decode.opc"
int rdst AU = op[1] & 0x0f;
if (trace)
{
@@ -4669,7 +4670,7 @@ rx_decode_opcode (unsigned long pc AU,
printf (" rdst = 0x%x\n", rdst);
}
SYNTAX("shll #%2, %0");
-#line 731 "rx-decode.opc"
+#line 732 "rx-decode.opc"
ID(shll); S2C(i*16+mmmm); SR(rdst); DR(rdst); F_OSZC;
}
@@ -4692,9 +4693,9 @@ rx_decode_opcode (unsigned long pc AU,
case 0x00:
{
/** 0110 1110 dsta dstb pushm %1-%2 */
-#line 393 "rx-decode.opc"
+#line 394 "rx-decode.opc"
int dsta AU = (op[1] >> 4) & 0x0f;
-#line 393 "rx-decode.opc"
+#line 394 "rx-decode.opc"
int dstb AU = op[1] & 0x0f;
if (trace)
{
@@ -4705,7 +4706,7 @@ rx_decode_opcode (unsigned long pc AU,
printf (" dstb = 0x%x\n", dstb);
}
SYNTAX("pushm %1-%2");
-#line 393 "rx-decode.opc"
+#line 394 "rx-decode.opc"
ID(pushm); SR(dsta); S2R(dstb); F_____;
}
@@ -4719,9 +4720,9 @@ rx_decode_opcode (unsigned long pc AU,
case 0x00:
{
/** 0110 1111 dsta dstb popm %1-%2 */
-#line 390 "rx-decode.opc"
+#line 391 "rx-decode.opc"
int dsta AU = (op[1] >> 4) & 0x0f;
-#line 390 "rx-decode.opc"
+#line 391 "rx-decode.opc"
int dstb AU = op[1] & 0x0f;
if (trace)
{
@@ -4732,7 +4733,7 @@ rx_decode_opcode (unsigned long pc AU,
printf (" dstb = 0x%x\n", dstb);
}
SYNTAX("popm %1-%2");
-#line 390 "rx-decode.opc"
+#line 391 "rx-decode.opc"
ID(popm); SR(dsta); S2R(dstb); F_____;
}
@@ -4747,11 +4748,11 @@ rx_decode_opcode (unsigned long pc AU,
op_semantics_31:
{
/** 0111 00im rsrc rdst add #%1, %2, %0 */
-#line 534 "rx-decode.opc"
+#line 535 "rx-decode.opc"
int im AU = op[0] & 0x03;
-#line 534 "rx-decode.opc"
+#line 535 "rx-decode.opc"
int rsrc AU = (op[1] >> 4) & 0x0f;
-#line 534 "rx-decode.opc"
+#line 535 "rx-decode.opc"
int rdst AU = op[1] & 0x0f;
if (trace)
{
@@ -4763,7 +4764,7 @@ rx_decode_opcode (unsigned long pc AU,
printf (" rdst = 0x%x\n", rdst);
}
SYNTAX("add #%1, %2, %0");
-#line 534 "rx-decode.opc"
+#line 535 "rx-decode.opc"
ID(add); SC(IMMex(im)); S2R(rsrc); DR(rdst); F_OSZC;
}
@@ -4805,9 +4806,9 @@ rx_decode_opcode (unsigned long pc AU,
op_semantics_32:
{
/** 0111 01im 0000 rsrc cmp #%2, %1%S1 */
-#line 546 "rx-decode.opc"
+#line 547 "rx-decode.opc"
int im AU = op[0] & 0x03;
-#line 546 "rx-decode.opc"
+#line 547 "rx-decode.opc"
int rsrc AU = op[1] & 0x0f;
if (trace)
{
@@ -4818,7 +4819,7 @@ rx_decode_opcode (unsigned long pc AU,
printf (" rsrc = 0x%x\n", rsrc);
}
SYNTAX("cmp #%2, %1%S1");
-#line 546 "rx-decode.opc"
+#line 547 "rx-decode.opc"
ID(sub); SR(rsrc); S2C(IMMex(im)); F_OSZC;
}
@@ -4827,9 +4828,9 @@ rx_decode_opcode (unsigned long pc AU,
op_semantics_33:
{
/** 0111 01im 0001rdst mul #%1, %0 */
-#line 649 "rx-decode.opc"
+#line 650 "rx-decode.opc"
int im AU = op[0] & 0x03;
-#line 649 "rx-decode.opc"
+#line 650 "rx-decode.opc"
int rdst AU = op[1] & 0x0f;
if (trace)
{
@@ -4840,7 +4841,7 @@ rx_decode_opcode (unsigned long pc AU,
printf (" rdst = 0x%x\n", rdst);
}
SYNTAX("mul #%1, %0");
-#line 649 "rx-decode.opc"
+#line 650 "rx-decode.opc"
int val = IMMex(im);
if (val == 1 && rdst == 0)
{
@@ -4868,9 +4869,9 @@ rx_decode_opcode (unsigned long pc AU,
op_semantics_34:
{
/** 0111 01im 0010 rdst and #%1, %0 */
-#line 438 "rx-decode.opc"
+#line 439 "rx-decode.opc"
int im AU = op[0] & 0x03;
-#line 438 "rx-decode.opc"
+#line 439 "rx-decode.opc"
int rdst AU = op[1] & 0x0f;
if (trace)
{
@@ -4881,7 +4882,7 @@ rx_decode_opcode (unsigned long pc AU,
printf (" rdst = 0x%x\n", rdst);
}
SYNTAX("and #%1, %0");
-#line 438 "rx-decode.opc"
+#line 439 "rx-decode.opc"
ID(and); SC(IMMex(im)); DR(rdst); F__SZ_;
}
@@ -4890,9 +4891,9 @@ rx_decode_opcode (unsigned long pc AU,
op_semantics_35:
{
/** 0111 01im 0011 rdst or #%1, %0 */
-#line 456 "rx-decode.opc"
+#line 457 "rx-decode.opc"
int im AU = op[0] & 0x03;
-#line 456 "rx-decode.opc"
+#line 457 "rx-decode.opc"
int rdst AU = op[1] & 0x0f;
if (trace)
{
@@ -4903,7 +4904,7 @@ rx_decode_opcode (unsigned long pc AU,
printf (" rdst = 0x%x\n", rdst);
}
SYNTAX("or #%1, %0");
-#line 456 "rx-decode.opc"
+#line 457 "rx-decode.opc"
ID(or); SC(IMMex(im)); DR(rdst); F__SZ_;
}
@@ -5005,7 +5006,7 @@ rx_decode_opcode (unsigned long pc AU,
case 0x4f:
{
/** 0111 0101 0100 rdst mov%s #%1, %0 */
-#line 310 "rx-decode.opc"
+#line 311 "rx-decode.opc"
int rdst AU = op[1] & 0x0f;
if (trace)
{
@@ -5015,7 +5016,7 @@ rx_decode_opcode (unsigned long pc AU,
printf (" rdst = 0x%x\n", rdst);
}
SYNTAX("mov%s #%1, %0");
-#line 310 "rx-decode.opc"
+#line 311 "rx-decode.opc"
ID(mov); DR(rdst); SC(IMM (1)); F_____;
}
@@ -5038,7 +5039,7 @@ rx_decode_opcode (unsigned long pc AU,
case 0x5f:
{
/** 0111 0101 0101 rsrc cmp #%2, %1 */
-#line 549 "rx-decode.opc"
+#line 550 "rx-decode.opc"
int rsrc AU = op[1] & 0x0f;
if (trace)
{
@@ -5048,7 +5049,7 @@ rx_decode_opcode (unsigned long pc AU,
printf (" rsrc = 0x%x\n", rsrc);
}
SYNTAX("cmp #%2, %1");
-#line 549 "rx-decode.opc"
+#line 550 "rx-decode.opc"
ID(sub); SR(rsrc); S2C(IMM(1)); F_OSZC;
}
@@ -5063,7 +5064,7 @@ rx_decode_opcode (unsigned long pc AU,
op[0], op[1]);
}
SYNTAX("int #%1");
-#line 1056 "rx-decode.opc"
+#line 1096 "rx-decode.opc"
ID(int); SC(IMM(1));
}
@@ -5075,7 +5076,7 @@ rx_decode_opcode (unsigned long pc AU,
case 0x00:
{
/** 0111 0101 0111 0000 0000 immm mvtipl #%1 */
-#line 1023 "rx-decode.opc"
+#line 1024 "rx-decode.opc"
int immm AU = op[2] & 0x0f;
if (trace)
{
@@ -5085,7 +5086,7 @@ rx_decode_opcode (unsigned long pc AU,
printf (" immm = 0x%x\n", immm);
}
SYNTAX("mvtipl #%1");
-#line 1023 "rx-decode.opc"
+#line 1024 "rx-decode.opc"
ID(mvtipl); SC(immm);
}
@@ -5107,7 +5108,7 @@ rx_decode_opcode (unsigned long pc AU,
op[0], op[1], op[2]);
}
SYNTAX("mvfdr");
-#line 1229 "rx-decode.opc"
+#line 1269 "rx-decode.opc"
ID(mvfdr); F_____;
}
@@ -5122,9 +5123,9 @@ rx_decode_opcode (unsigned long pc AU,
case 0x00:
{
/** 0111 0101 1010 0000 rdst rnum dpushm.l %1-%2 */
-#line 1223 "rx-decode.opc"
+#line 1263 "rx-decode.opc"
int rdst AU = (op[2] >> 4) & 0x0f;
-#line 1223 "rx-decode.opc"
+#line 1263 "rx-decode.opc"
int rnum AU = op[2] & 0x0f;
if (trace)
{
@@ -5135,7 +5136,7 @@ rx_decode_opcode (unsigned long pc AU,
printf (" rnum = 0x%x\n", rnum);
}
SYNTAX("dpushm.l %1-%2");
-#line 1223 "rx-decode.opc"
+#line 1263 "rx-decode.opc"
ID(dpushm); SCR(rdst); S2CR(rdst + rnum); F_____;
}
@@ -5149,9 +5150,9 @@ rx_decode_opcode (unsigned long pc AU,
case 0x00:
{
/** 0111 0101 1010 1000 rdst rnum dpopm.l %1-%2 */
-#line 1217 "rx-decode.opc"
+#line 1257 "rx-decode.opc"
int rdst AU = (op[2] >> 4) & 0x0f;
-#line 1217 "rx-decode.opc"
+#line 1257 "rx-decode.opc"
int rnum AU = op[2] & 0x0f;
if (trace)
{
@@ -5162,7 +5163,7 @@ rx_decode_opcode (unsigned long pc AU,
printf (" rnum = 0x%x\n", rnum);
}
SYNTAX("dpopm.l %1-%2");
-#line 1217 "rx-decode.opc"
+#line 1257 "rx-decode.opc"
ID(dpopm); SCR(rdst); S2CR(rdst + rnum); F_____;
}
@@ -5176,9 +5177,9 @@ rx_decode_opcode (unsigned long pc AU,
case 0x00:
{
/** 0111 0101 1011 0000 rdst rnum dpushm.d %1-%2 */
-#line 1220 "rx-decode.opc"
+#line 1260 "rx-decode.opc"
int rdst AU = (op[2] >> 4) & 0x0f;
-#line 1220 "rx-decode.opc"
+#line 1260 "rx-decode.opc"
int rnum AU = op[2] & 0x0f;
if (trace)
{
@@ -5189,7 +5190,7 @@ rx_decode_opcode (unsigned long pc AU,
printf (" rnum = 0x%x\n", rnum);
}
SYNTAX("dpushm.d %1-%2");
-#line 1220 "rx-decode.opc"
+#line 1260 "rx-decode.opc"
ID(dpushm); SDR(rdst); S2DR(rdst + rnum); F_____;
}
@@ -5203,9 +5204,9 @@ rx_decode_opcode (unsigned long pc AU,
case 0x00:
{
/** 0111 0101 1011 1000 rdst rnum dpopm.d %1-%2 */
-#line 1214 "rx-decode.opc"
+#line 1254 "rx-decode.opc"
int rdst AU = (op[2] >> 4) & 0x0f;
-#line 1214 "rx-decode.opc"
+#line 1254 "rx-decode.opc"
int rnum AU = op[2] & 0x0f;
if (trace)
{
@@ -5216,7 +5217,7 @@ rx_decode_opcode (unsigned long pc AU,
printf (" rnum = 0x%x\n", rnum);
}
SYNTAX("dpopm.d %1-%2");
-#line 1214 "rx-decode.opc"
+#line 1254 "rx-decode.opc"
ID(dpopm); SDR(rdst); S2DR(rdst + rnum); F_____;
}
@@ -5314,11 +5315,11 @@ rx_decode_opcode (unsigned long pc AU,
op_semantics_36:
{
/** 0111 0110 1001 0000 srcb 0000 rdst srca dadd %1, %2, %0 */
-#line 1238 "rx-decode.opc"
+#line 1278 "rx-decode.opc"
int srcb AU = (op[2] >> 4) & 0x0f;
-#line 1238 "rx-decode.opc"
+#line 1278 "rx-decode.opc"
int rdst AU = (op[3] >> 4) & 0x0f;
-#line 1238 "rx-decode.opc"
+#line 1278 "rx-decode.opc"
int srca AU = op[3] & 0x0f;
if (trace)
{
@@ -5330,7 +5331,7 @@ rx_decode_opcode (unsigned long pc AU,
printf (" srca = 0x%x\n", srca);
}
SYNTAX("dadd %1, %2, %0");
-#line 1238 "rx-decode.opc"
+#line 1278 "rx-decode.opc"
ID(dadd); DDR(rdst); SDR(srca); S2DR(srcb); F_____;
}
@@ -5345,11 +5346,11 @@ rx_decode_opcode (unsigned long pc AU,
op_semantics_37:
{
/** 0111 0110 1001 0000 srcb 0001 rdst srca dsub %1, %2, %0 */
-#line 1259 "rx-decode.opc"
+#line 1299 "rx-decode.opc"
int srcb AU = (op[2] >> 4) & 0x0f;
-#line 1259 "rx-decode.opc"
+#line 1299 "rx-decode.opc"
int rdst AU = (op[3] >> 4) & 0x0f;
-#line 1259 "rx-decode.opc"
+#line 1299 "rx-decode.opc"
int srca AU = op[3] & 0x0f;
if (trace)
{
@@ -5361,7 +5362,7 @@ rx_decode_opcode (unsigned long pc AU,
printf (" srca = 0x%x\n", srca);
}
SYNTAX("dsub %1, %2, %0");
-#line 1259 "rx-decode.opc"
+#line 1299 "rx-decode.opc"
ID(dsub); DDR(rdst); SDR(srca); S2DR(srcb); F_____;
}
@@ -5376,11 +5377,11 @@ rx_decode_opcode (unsigned long pc AU,
op_semantics_38:
{
/** 0111 0110 1001 0000 srcb 0010 rdst srca dmul %1, %2, %0 */
-#line 1247 "rx-decode.opc"
+#line 1287 "rx-decode.opc"
int srcb AU = (op[2] >> 4) & 0x0f;
-#line 1247 "rx-decode.opc"
+#line 1287 "rx-decode.opc"
int rdst AU = (op[3] >> 4) & 0x0f;
-#line 1247 "rx-decode.opc"
+#line 1287 "rx-decode.opc"
int srca AU = op[3] & 0x0f;
if (trace)
{
@@ -5392,7 +5393,7 @@ rx_decode_opcode (unsigned long pc AU,
printf (" srca = 0x%x\n", srca);
}
SYNTAX("dmul %1, %2, %0");
-#line 1247 "rx-decode.opc"
+#line 1287 "rx-decode.opc"
ID(dmul); DDR(rdst); SDR(srca); S2DR(srcb); F_____;
}
@@ -5407,11 +5408,11 @@ rx_decode_opcode (unsigned long pc AU,
op_semantics_39:
{
/** 0111 0110 1001 0000 srcb 0101 rdst srca ddiv %1, %2, %0 */
-#line 1244 "rx-decode.opc"
+#line 1284 "rx-decode.opc"
int srcb AU = (op[2] >> 4) & 0x0f;
-#line 1244 "rx-decode.opc"
+#line 1284 "rx-decode.opc"
int rdst AU = (op[3] >> 4) & 0x0f;
-#line 1244 "rx-decode.opc"
+#line 1284 "rx-decode.opc"
int srca AU = op[3] & 0x0f;
if (trace)
{
@@ -5423,7 +5424,7 @@ rx_decode_opcode (unsigned long pc AU,
printf (" srca = 0x%x\n", srca);
}
SYNTAX("ddiv %1, %2, %0");
-#line 1244 "rx-decode.opc"
+#line 1284 "rx-decode.opc"
ID(ddiv); DDR(rdst); SDR(srca); S2DR(srcb); F_____;
}
@@ -5438,11 +5439,11 @@ rx_decode_opcode (unsigned long pc AU,
op_semantics_40:
{
/** 0111 0110 1001 0000 srcb 1000 cond srca dcmp%0 %1, %2 */
-#line 1241 "rx-decode.opc"
+#line 1281 "rx-decode.opc"
int srcb AU = (op[2] >> 4) & 0x0f;
-#line 1241 "rx-decode.opc"
+#line 1281 "rx-decode.opc"
int cond AU = (op[3] >> 4) & 0x0f;
-#line 1241 "rx-decode.opc"
+#line 1281 "rx-decode.opc"
int srca AU = op[3] & 0x0f;
if (trace)
{
@@ -5454,7 +5455,7 @@ rx_decode_opcode (unsigned long pc AU,
printf (" srca = 0x%x\n", srca);
}
SYNTAX("dcmp%0 %1, %2");
-#line 1241 "rx-decode.opc"
+#line 1281 "rx-decode.opc"
ID(dcmp); DCND(cond); SDR(srca); S2DR(srcb); F_____;
}
@@ -5469,9 +5470,9 @@ rx_decode_opcode (unsigned long pc AU,
op_semantics_41:
{
/** 0111 0110 1001 0000 rsrc 1100 rdst 0000 dmov.d %1, %0 */
-#line 1179 "rx-decode.opc"
+#line 1219 "rx-decode.opc"
int rsrc AU = (op[2] >> 4) & 0x0f;
-#line 1179 "rx-decode.opc"
+#line 1219 "rx-decode.opc"
int rdst AU = (op[3] >> 4) & 0x0f;
if (trace)
{
@@ -5482,7 +5483,7 @@ rx_decode_opcode (unsigned long pc AU,
printf (" rdst = 0x%x\n", rdst);
}
SYNTAX("dmov.d %1, %0");
-#line 1179 "rx-decode.opc"
+#line 1219 "rx-decode.opc"
ID(dmov); DDR(rdst); SDR(rsrc); F_____;
}
@@ -5491,9 +5492,9 @@ rx_decode_opcode (unsigned long pc AU,
op_semantics_42:
{
/** 0111 0110 1001 0000 rsrc 1100 rdst 0001 dabs %1, %0 */
-#line 1235 "rx-decode.opc"
+#line 1275 "rx-decode.opc"
int rsrc AU = (op[2] >> 4) & 0x0f;
-#line 1235 "rx-decode.opc"
+#line 1275 "rx-decode.opc"
int rdst AU = (op[3] >> 4) & 0x0f;
if (trace)
{
@@ -5504,7 +5505,7 @@ rx_decode_opcode (unsigned long pc AU,
printf (" rdst = 0x%x\n", rdst);
}
SYNTAX("dabs %1, %0");
-#line 1235 "rx-decode.opc"
+#line 1275 "rx-decode.opc"
ID(dabs); DDR(rdst); SDR(rsrc); F_____;
}
@@ -5513,9 +5514,9 @@ rx_decode_opcode (unsigned long pc AU,
op_semantics_43:
{
/** 0111 0110 1001 0000 rsrc 1100 rdst 0010 dneg %1, %0 */
-#line 1250 "rx-decode.opc"
+#line 1290 "rx-decode.opc"
int rsrc AU = (op[2] >> 4) & 0x0f;
-#line 1250 "rx-decode.opc"
+#line 1290 "rx-decode.opc"
int rdst AU = (op[3] >> 4) & 0x0f;
if (trace)
{
@@ -5526,7 +5527,7 @@ rx_decode_opcode (unsigned long pc AU,
printf (" rdst = 0x%x\n", rdst);
}
SYNTAX("dneg %1, %0");
-#line 1250 "rx-decode.opc"
+#line 1290 "rx-decode.opc"
ID(dneg); DDR(rdst); SDR(rsrc); F_____;
}
@@ -5542,9 +5543,9 @@ rx_decode_opcode (unsigned long pc AU,
op_semantics_44:
{
/** 0111 0110 1001 0000 rsrc 1101 rdst 0000 dsqrt %1, %0 */
-#line 1256 "rx-decode.opc"
+#line 1296 "rx-decode.opc"
int rsrc AU = (op[2] >> 4) & 0x0f;
-#line 1256 "rx-decode.opc"
+#line 1296 "rx-decode.opc"
int rdst AU = (op[3] >> 4) & 0x0f;
if (trace)
{
@@ -5555,7 +5556,7 @@ rx_decode_opcode (unsigned long pc AU,
printf (" rdst = 0x%x\n", rdst);
}
SYNTAX("dsqrt %1, %0");
-#line 1256 "rx-decode.opc"
+#line 1296 "rx-decode.opc"
ID(dsqrt); DDR(rdst); SDR(rsrc); F_____;
}
@@ -5564,9 +5565,9 @@ rx_decode_opcode (unsigned long pc AU,
op_semantics_45:
{
/** 0111 0110 1001 0000 rsrc 1101 rdst 1000 dtoi %1, %0 */
-#line 1265 "rx-decode.opc"
+#line 1305 "rx-decode.opc"
int rsrc AU = (op[2] >> 4) & 0x0f;
-#line 1265 "rx-decode.opc"
+#line 1305 "rx-decode.opc"
int rdst AU = (op[3] >> 4) & 0x0f;
if (trace)
{
@@ -5577,7 +5578,7 @@ rx_decode_opcode (unsigned long pc AU,
printf (" rdst = 0x%x\n", rdst);
}
SYNTAX("dtoi %1, %0");
-#line 1265 "rx-decode.opc"
+#line 1305 "rx-decode.opc"
ID(dtoi); DDR(rdst); SDR(rsrc); F_____;
}
@@ -5586,9 +5587,9 @@ rx_decode_opcode (unsigned long pc AU,
op_semantics_46:
{
/** 0111 0110 1001 0000 rsrc 1101 rdst 1001 dtou %1, %0 */
-#line 1268 "rx-decode.opc"
+#line 1308 "rx-decode.opc"
int rsrc AU = (op[2] >> 4) & 0x0f;
-#line 1268 "rx-decode.opc"
+#line 1308 "rx-decode.opc"
int rdst AU = (op[3] >> 4) & 0x0f;
if (trace)
{
@@ -5599,7 +5600,7 @@ rx_decode_opcode (unsigned long pc AU,
printf (" rdst = 0x%x\n", rdst);
}
SYNTAX("dtou %1, %0");
-#line 1268 "rx-decode.opc"
+#line 1308 "rx-decode.opc"
ID(dtou); DDR(rdst); SDR(rsrc); F_____;
}
@@ -5608,9 +5609,9 @@ rx_decode_opcode (unsigned long pc AU,
op_semantics_47:
{
/** 0111 0110 1001 0000 rsrc 1101 rdst 1100 dtof %1, %0 */
-#line 1262 "rx-decode.opc"
+#line 1302 "rx-decode.opc"
int rsrc AU = (op[2] >> 4) & 0x0f;
-#line 1262 "rx-decode.opc"
+#line 1302 "rx-decode.opc"
int rdst AU = (op[3] >> 4) & 0x0f;
if (trace)
{
@@ -5621,7 +5622,7 @@ rx_decode_opcode (unsigned long pc AU,
printf (" rdst = 0x%x\n", rdst);
}
SYNTAX("dtof %1, %0");
-#line 1262 "rx-decode.opc"
+#line 1302 "rx-decode.opc"
ID(dtof); DDR(rdst); SDR(rsrc); F_____;
}
@@ -5630,9 +5631,9 @@ rx_decode_opcode (unsigned long pc AU,
op_semantics_48:
{
/** 0111 0110 1001 0000 rsrc 1101 rdst 1101 dround %1, %0 */
-#line 1253 "rx-decode.opc"
+#line 1293 "rx-decode.opc"
int rsrc AU = (op[2] >> 4) & 0x0f;
-#line 1253 "rx-decode.opc"
+#line 1293 "rx-decode.opc"
int rdst AU = (op[3] >> 4) & 0x0f;
if (trace)
{
@@ -5643,7 +5644,7 @@ rx_decode_opcode (unsigned long pc AU,
printf (" rdst = 0x%x\n", rdst);
}
SYNTAX("dround %1, %0");
-#line 1253 "rx-decode.opc"
+#line 1293 "rx-decode.opc"
ID(dround); DDR(rdst); SDR(rsrc); F_____;
}
@@ -6929,11 +6930,11 @@ rx_decode_opcode (unsigned long pc AU,
op_semantics_49:
{
/** 0111 100b ittt rdst bset #%1, %0 */
-#line 968 "rx-decode.opc"
+#line 969 "rx-decode.opc"
int b AU = op[0] & 0x01;
-#line 968 "rx-decode.opc"
+#line 969 "rx-decode.opc"
int ittt AU = (op[1] >> 4) & 0x0f;
-#line 968 "rx-decode.opc"
+#line 969 "rx-decode.opc"
int rdst AU = op[1] & 0x0f;
if (trace)
{
@@ -6945,7 +6946,7 @@ rx_decode_opcode (unsigned long pc AU,
printf (" rdst = 0x%x\n", rdst);
}
SYNTAX("bset #%1, %0");
-#line 968 "rx-decode.opc"
+#line 969 "rx-decode.opc"
ID(bset); BWL(LSIZE); SC(b*16+ittt); DR(rdst); F_____;
@@ -6970,11 +6971,11 @@ rx_decode_opcode (unsigned long pc AU,
op_semantics_50:
{
/** 0111 101b ittt rdst bclr #%1, %0 */
-#line 980 "rx-decode.opc"
+#line 981 "rx-decode.opc"
int b AU = op[0] & 0x01;
-#line 980 "rx-decode.opc"
+#line 981 "rx-decode.opc"
int ittt AU = (op[1] >> 4) & 0x0f;
-#line 980 "rx-decode.opc"
+#line 981 "rx-decode.opc"
int rdst AU = op[1] & 0x0f;
if (trace)
{
@@ -6986,7 +6987,7 @@ rx_decode_opcode (unsigned long pc AU,
printf (" rdst = 0x%x\n", rdst);
}
SYNTAX("bclr #%1, %0");
-#line 980 "rx-decode.opc"
+#line 981 "rx-decode.opc"
ID(bclr); BWL(LSIZE); SC(b*16+ittt); DR(rdst); F_____;
@@ -7011,11 +7012,11 @@ rx_decode_opcode (unsigned long pc AU,
op_semantics_51:
{
/** 0111 110b ittt rdst btst #%2, %1 */
-#line 992 "rx-decode.opc"
+#line 993 "rx-decode.opc"
int b AU = op[0] & 0x01;
-#line 992 "rx-decode.opc"
+#line 993 "rx-decode.opc"
int ittt AU = (op[1] >> 4) & 0x0f;
-#line 992 "rx-decode.opc"
+#line 993 "rx-decode.opc"
int rdst AU = op[1] & 0x0f;
if (trace)
{
@@ -7027,7 +7028,7 @@ rx_decode_opcode (unsigned long pc AU,
printf (" rdst = 0x%x\n", rdst);
}
SYNTAX("btst #%2, %1");
-#line 992 "rx-decode.opc"
+#line 993 "rx-decode.opc"
ID(btst); BWL(LSIZE); S2C(b*16+ittt); SR(rdst); F___ZC;
@@ -7051,7 +7052,7 @@ rx_decode_opcode (unsigned long pc AU,
case 0x00:
{
/** 0111 1110 0000 rdst not %0 */
-#line 483 "rx-decode.opc"
+#line 484 "rx-decode.opc"
int rdst AU = op[1] & 0x0f;
if (trace)
{
@@ -7061,7 +7062,7 @@ rx_decode_opcode (unsigned long pc AU,
printf (" rdst = 0x%x\n", rdst);
}
SYNTAX("not %0");
-#line 483 "rx-decode.opc"
+#line 484 "rx-decode.opc"
ID(xor); DR(rdst); SR(rdst); S2C(~0); F__SZ_;
}
@@ -7069,7 +7070,7 @@ rx_decode_opcode (unsigned long pc AU,
case 0x10:
{
/** 0111 1110 0001 rdst neg %0 */
-#line 504 "rx-decode.opc"
+#line 505 "rx-decode.opc"
int rdst AU = op[1] & 0x0f;
if (trace)
{
@@ -7079,7 +7080,7 @@ rx_decode_opcode (unsigned long pc AU,
printf (" rdst = 0x%x\n", rdst);
}
SYNTAX("neg %0");
-#line 504 "rx-decode.opc"
+#line 505 "rx-decode.opc"
ID(sub); DR(rdst); SC(0); S2R(rdst); F_OSZC;
}
@@ -7087,7 +7088,7 @@ rx_decode_opcode (unsigned long pc AU,
case 0x20:
{
/** 0111 1110 0010 rdst abs %0 */
-#line 586 "rx-decode.opc"
+#line 587 "rx-decode.opc"
int rdst AU = op[1] & 0x0f;
if (trace)
{
@@ -7097,7 +7098,7 @@ rx_decode_opcode (unsigned long pc AU,
printf (" rdst = 0x%x\n", rdst);
}
SYNTAX("abs %0");
-#line 586 "rx-decode.opc"
+#line 587 "rx-decode.opc"
ID(abs); DR(rdst); SR(rdst); F_OSZ_;
}
@@ -7105,7 +7106,7 @@ rx_decode_opcode (unsigned long pc AU,
case 0x30:
{
/** 0111 1110 0011 rdst sat %0 */
-#line 906 "rx-decode.opc"
+#line 907 "rx-decode.opc"
int rdst AU = op[1] & 0x0f;
if (trace)
{
@@ -7115,7 +7116,7 @@ rx_decode_opcode (unsigned long pc AU,
printf (" rdst = 0x%x\n", rdst);
}
SYNTAX("sat %0");
-#line 906 "rx-decode.opc"
+#line 907 "rx-decode.opc"
ID(sat); DR (rdst);
}
@@ -7123,7 +7124,7 @@ rx_decode_opcode (unsigned long pc AU,
case 0x40:
{
/** 0111 1110 0100 rdst rorc %0 */
-#line 766 "rx-decode.opc"
+#line 767 "rx-decode.opc"
int rdst AU = op[1] & 0x0f;
if (trace)
{
@@ -7133,7 +7134,7 @@ rx_decode_opcode (unsigned long pc AU,
printf (" rdst = 0x%x\n", rdst);
}
SYNTAX("rorc %0");
-#line 766 "rx-decode.opc"
+#line 767 "rx-decode.opc"
ID(rorc); DR(rdst); F__SZC;
}
@@ -7141,7 +7142,7 @@ rx_decode_opcode (unsigned long pc AU,
case 0x50:
{
/** 0111 1110 0101 rdst rolc %0 */
-#line 763 "rx-decode.opc"
+#line 764 "rx-decode.opc"
int rdst AU = op[1] & 0x0f;
if (trace)
{
@@ -7151,7 +7152,7 @@ rx_decode_opcode (unsigned long pc AU,
printf (" rdst = 0x%x\n", rdst);
}
SYNTAX("rolc %0");
-#line 763 "rx-decode.opc"
+#line 764 "rx-decode.opc"
ID(rolc); DR(rdst); F__SZC;
}
@@ -7161,9 +7162,9 @@ rx_decode_opcode (unsigned long pc AU,
case 0xa0:
{
/** 0111 1110 10sz rsrc push%s %1 */
-#line 399 "rx-decode.opc"
+#line 400 "rx-decode.opc"
int sz AU = (op[1] >> 4) & 0x03;
-#line 399 "rx-decode.opc"
+#line 400 "rx-decode.opc"
int rsrc AU = op[1] & 0x0f;
if (trace)
{
@@ -7174,7 +7175,7 @@ rx_decode_opcode (unsigned long pc AU,
printf (" rsrc = 0x%x\n", rsrc);
}
SYNTAX("push%s %1");
-#line 399 "rx-decode.opc"
+#line 400 "rx-decode.opc"
ID(mov); BWL(sz); OP(0, RX_Operand_Predec, 0, 0); SR(rsrc); F_____;
}
@@ -7182,7 +7183,7 @@ rx_decode_opcode (unsigned long pc AU,
case 0xb0:
{
/** 0111 1110 1011 rdst pop %0 */
-#line 396 "rx-decode.opc"
+#line 397 "rx-decode.opc"
int rdst AU = op[1] & 0x0f;
if (trace)
{
@@ -7192,7 +7193,7 @@ rx_decode_opcode (unsigned long pc AU,
printf (" rdst = 0x%x\n", rdst);
}
SYNTAX("pop %0");
-#line 396 "rx-decode.opc"
+#line 397 "rx-decode.opc"
ID(mov); OP(1, RX_Operand_Postinc, 0, 0); DR(rdst); F_____;
}
@@ -7201,7 +7202,7 @@ rx_decode_opcode (unsigned long pc AU,
case 0xd0:
{
/** 0111 1110 110 crsrc pushc %1 */
-#line 1029 "rx-decode.opc"
+#line 1038 "rx-decode.opc"
int crsrc AU = op[1] & 0x1f;
if (trace)
{
@@ -7211,8 +7212,16 @@ rx_decode_opcode (unsigned long pc AU,
printf (" crsrc = 0x%x\n", crsrc);
}
SYNTAX("pushc %1");
-#line 1029 "rx-decode.opc"
+#line 1038 "rx-decode.opc"
+ if (crsrc > 0xD || (crsrc > 0xC && machine == bfd_mach_rx))
+ {
+ /* fake a non existent control reg in order not to mess up decoding */
+ ID(mov); OP(0, RX_Operand_Predec, 0, 0); SR(40);
+ }
+ else
+ {
ID(mov); OP(0, RX_Operand_Predec, 0, 0); SR(crsrc + 16);
+ }
}
break;
@@ -7220,7 +7229,7 @@ rx_decode_opcode (unsigned long pc AU,
case 0xf0:
{
/** 0111 1110 111 crdst popc %0 */
-#line 1026 "rx-decode.opc"
+#line 1027 "rx-decode.opc"
int crdst AU = op[1] & 0x1f;
if (trace)
{
@@ -7230,8 +7239,16 @@ rx_decode_opcode (unsigned long pc AU,
printf (" crdst = 0x%x\n", crdst);
}
SYNTAX("popc %0");
-#line 1026 "rx-decode.opc"
+#line 1027 "rx-decode.opc"
+ if ((crdst == 1) || (crdst > 0xD || (crdst > 0xC && machine == bfd_mach_rx)))
+ {
+ /* fake a non existent control reg in order not to mess up decoding */
+ ID(mov); OP(1, RX_Operand_Postinc, 0, 0); DR(40);
+ }
+ else
+ {
ID(mov); OP(1, RX_Operand_Postinc, 0, 0); DR(crdst + 16);
+ }
}
break;
@@ -7260,7 +7277,7 @@ rx_decode_opcode (unsigned long pc AU,
case 0x0f:
{
/** 0111 1111 0000 rsrc jmp %0 */
-#line 816 "rx-decode.opc"
+#line 817 "rx-decode.opc"
int rsrc AU = op[1] & 0x0f;
if (trace)
{
@@ -7270,7 +7287,7 @@ rx_decode_opcode (unsigned long pc AU,
printf (" rsrc = 0x%x\n", rsrc);
}
SYNTAX("jmp %0");
-#line 816 "rx-decode.opc"
+#line 817 "rx-decode.opc"
ID(branch); DR(rsrc);
}
@@ -7293,7 +7310,7 @@ rx_decode_opcode (unsigned long pc AU,
case 0x1f:
{
/** 0111 1111 0001 rsrc jsr %0 */
-#line 819 "rx-decode.opc"
+#line 820 "rx-decode.opc"
int rsrc AU = op[1] & 0x0f;
if (trace)
{
@@ -7303,7 +7320,7 @@ rx_decode_opcode (unsigned long pc AU,
printf (" rsrc = 0x%x\n", rsrc);
}
SYNTAX("jsr %0");
-#line 819 "rx-decode.opc"
+#line 820 "rx-decode.opc"
ID(jsr); DR(rsrc);
}
@@ -7326,7 +7343,7 @@ rx_decode_opcode (unsigned long pc AU,
case 0x4f:
{
/** 0111 1111 0100 rsrc bra.l %0 */
-#line 812 "rx-decode.opc"
+#line 813 "rx-decode.opc"
int rsrc AU = op[1] & 0x0f;
if (trace)
{
@@ -7336,7 +7353,7 @@ rx_decode_opcode (unsigned long pc AU,
printf (" rsrc = 0x%x\n", rsrc);
}
SYNTAX("bra.l %0");
-#line 812 "rx-decode.opc"
+#line 813 "rx-decode.opc"
ID(branchrel); DR(rsrc);
@@ -7360,7 +7377,7 @@ rx_decode_opcode (unsigned long pc AU,
case 0x5f:
{
/** 0111 1111 0101 rsrc bsr.l %0 */
-#line 828 "rx-decode.opc"
+#line 829 "rx-decode.opc"
int rsrc AU = op[1] & 0x0f;
if (trace)
{
@@ -7370,7 +7387,7 @@ rx_decode_opcode (unsigned long pc AU,
printf (" rsrc = 0x%x\n", rsrc);
}
SYNTAX("bsr.l %0");
-#line 828 "rx-decode.opc"
+#line 829 "rx-decode.opc"
ID(jsrrel); DR(rsrc);
}
@@ -7380,7 +7397,7 @@ rx_decode_opcode (unsigned long pc AU,
case 0x82:
{
/** 0111 1111 1000 00sz suntil%s */
-#line 852 "rx-decode.opc"
+#line 853 "rx-decode.opc"
int sz AU = op[1] & 0x03;
if (trace)
{
@@ -7390,7 +7407,7 @@ rx_decode_opcode (unsigned long pc AU,
printf (" sz = 0x%x\n", sz);
}
SYNTAX("suntil%s");
-#line 852 "rx-decode.opc"
+#line 853 "rx-decode.opc"
ID(suntil); BWL(sz); F___ZC;
}
@@ -7405,7 +7422,7 @@ rx_decode_opcode (unsigned long pc AU,
op[0], op[1]);
}
SYNTAX("scmpu");
-#line 843 "rx-decode.opc"
+#line 844 "rx-decode.opc"
ID(scmpu); F___ZC;
}
@@ -7415,7 +7432,7 @@ rx_decode_opcode (unsigned long pc AU,
case 0x86:
{
/** 0111 1111 1000 01sz swhile%s */
-#line 855 "rx-decode.opc"
+#line 856 "rx-decode.opc"
int sz AU = op[1] & 0x03;
if (trace)
{
@@ -7425,7 +7442,7 @@ rx_decode_opcode (unsigned long pc AU,
printf (" sz = 0x%x\n", sz);
}
SYNTAX("swhile%s");
-#line 855 "rx-decode.opc"
+#line 856 "rx-decode.opc"
ID(swhile); BWL(sz); F___ZC;
}
@@ -7440,7 +7457,7 @@ rx_decode_opcode (unsigned long pc AU,
op[0], op[1]);
}
SYNTAX("smovu");
-#line 846 "rx-decode.opc"
+#line 847 "rx-decode.opc"
ID(smovu);
}
@@ -7450,7 +7467,7 @@ rx_decode_opcode (unsigned long pc AU,
case 0x8a:
{
/** 0111 1111 1000 10sz sstr%s */
-#line 861 "rx-decode.opc"
+#line 862 "rx-decode.opc"
int sz AU = op[1] & 0x03;
if (trace)
{
@@ -7460,7 +7477,7 @@ rx_decode_opcode (unsigned long pc AU,
printf (" sz = 0x%x\n", sz);
}
SYNTAX("sstr%s");
-#line 861 "rx-decode.opc"
+#line 862 "rx-decode.opc"
ID(sstr); BWL(sz);
/*----------------------------------------------------------------------*/
@@ -7478,7 +7495,7 @@ rx_decode_opcode (unsigned long pc AU,
op[0], op[1]);
}
SYNTAX("smovb");
-#line 849 "rx-decode.opc"
+#line 850 "rx-decode.opc"
ID(smovb);
}
@@ -7488,7 +7505,7 @@ rx_decode_opcode (unsigned long pc AU,
case 0x8e:
{
/** 0111 1111 1000 11sz rmpa%s */
-#line 867 "rx-decode.opc"
+#line 868 "rx-decode.opc"
int sz AU = op[1] & 0x03;
if (trace)
{
@@ -7498,7 +7515,7 @@ rx_decode_opcode (unsigned long pc AU,
printf (" sz = 0x%x\n", sz);
}
SYNTAX("rmpa%s");
-#line 867 "rx-decode.opc"
+#line 868 "rx-decode.opc"
ID(rmpa); BWL(sz); F_OS__;
/*----------------------------------------------------------------------*/
@@ -7516,7 +7533,7 @@ rx_decode_opcode (unsigned long pc AU,
op[0], op[1]);
}
SYNTAX("smovf");
-#line 858 "rx-decode.opc"
+#line 859 "rx-decode.opc"
ID(smovf);
}
@@ -7531,7 +7548,7 @@ rx_decode_opcode (unsigned long pc AU,
op[0], op[1]);
}
SYNTAX("satr");
-#line 909 "rx-decode.opc"
+#line 910 "rx-decode.opc"
ID(satr);
/*----------------------------------------------------------------------*/
@@ -7549,7 +7566,7 @@ rx_decode_opcode (unsigned long pc AU,
op[0], op[1]);
}
SYNTAX("rtfi");
-#line 1044 "rx-decode.opc"
+#line 1084 "rx-decode.opc"
ID(rtfi);
}
@@ -7564,7 +7581,7 @@ rx_decode_opcode (unsigned long pc AU,
op[0], op[1]);
}
SYNTAX("rte");
-#line 1047 "rx-decode.opc"
+#line 1087 "rx-decode.opc"
ID(rte);
}
@@ -7579,7 +7596,7 @@ rx_decode_opcode (unsigned long pc AU,
op[0], op[1]);
}
SYNTAX("wait");
-#line 1059 "rx-decode.opc"
+#line 1099 "rx-decode.opc"
ID(wait);
/*----------------------------------------------------------------------*/
@@ -7605,7 +7622,7 @@ rx_decode_opcode (unsigned long pc AU,
case 0xaf:
{
/** 0111 1111 1010 rdst setpsw %0 */
-#line 1020 "rx-decode.opc"
+#line 1021 "rx-decode.opc"
int rdst AU = op[1] & 0x0f;
if (trace)
{
@@ -7615,7 +7632,7 @@ rx_decode_opcode (unsigned long pc AU,
printf (" rdst = 0x%x\n", rdst);
}
SYNTAX("setpsw %0");
-#line 1020 "rx-decode.opc"
+#line 1021 "rx-decode.opc"
ID(setpsw); DF(rdst);
}
@@ -7638,7 +7655,7 @@ rx_decode_opcode (unsigned long pc AU,
case 0xbf:
{
/** 0111 1111 1011 rdst clrpsw %0 */
-#line 1017 "rx-decode.opc"
+#line 1018 "rx-decode.opc"
int rdst AU = op[1] & 0x0f;
if (trace)
{
@@ -7648,7 +7665,7 @@ rx_decode_opcode (unsigned long pc AU,
printf (" rdst = 0x%x\n", rdst);
}
SYNTAX("clrpsw %0");
-#line 1017 "rx-decode.opc"
+#line 1018 "rx-decode.opc"
ID(clrpsw); DF(rdst);
}
@@ -7664,17 +7681,17 @@ rx_decode_opcode (unsigned long pc AU,
op_semantics_52:
{
/** 10sz 0dsp a dst b src mov%s %1, %0 */
-#line 357 "rx-decode.opc"
+#line 358 "rx-decode.opc"
int sz AU = (op[0] >> 4) & 0x03;
-#line 357 "rx-decode.opc"
+#line 358 "rx-decode.opc"
int dsp AU = op[0] & 0x07;
-#line 357 "rx-decode.opc"
+#line 358 "rx-decode.opc"
int a AU = (op[1] >> 7) & 0x01;
-#line 357 "rx-decode.opc"
+#line 358 "rx-decode.opc"
int dst AU = (op[1] >> 4) & 0x07;
-#line 357 "rx-decode.opc"
+#line 358 "rx-decode.opc"
int b AU = (op[1] >> 3) & 0x01;
-#line 357 "rx-decode.opc"
+#line 358 "rx-decode.opc"
int src AU = op[1] & 0x07;
if (trace)
{
@@ -7689,7 +7706,7 @@ rx_decode_opcode (unsigned long pc AU,
printf (" src = 0x%x\n", src);
}
SYNTAX("mov%s %1, %0");
-#line 357 "rx-decode.opc"
+#line 358 "rx-decode.opc"
ID(mov); sBWL(sz); DIs(dst, dsp*4+a*2+b, sz); SR(src); F_____;
}
@@ -7767,17 +7784,17 @@ rx_decode_opcode (unsigned long pc AU,
op_semantics_53:
{
/** 10sz 1dsp a src b dst mov%s %1, %0 */
-#line 354 "rx-decode.opc"
+#line 355 "rx-decode.opc"
int sz AU = (op[0] >> 4) & 0x03;
-#line 354 "rx-decode.opc"
+#line 355 "rx-decode.opc"
int dsp AU = op[0] & 0x07;
-#line 354 "rx-decode.opc"
+#line 355 "rx-decode.opc"
int a AU = (op[1] >> 7) & 0x01;
-#line 354 "rx-decode.opc"
+#line 355 "rx-decode.opc"
int src AU = (op[1] >> 4) & 0x07;
-#line 354 "rx-decode.opc"
+#line 355 "rx-decode.opc"
int b AU = (op[1] >> 3) & 0x01;
-#line 354 "rx-decode.opc"
+#line 355 "rx-decode.opc"
int dst AU = op[1] & 0x07;
if (trace)
{
@@ -7792,7 +7809,7 @@ rx_decode_opcode (unsigned long pc AU,
printf (" dst = 0x%x\n", dst);
}
SYNTAX("mov%s %1, %0");
-#line 354 "rx-decode.opc"
+#line 355 "rx-decode.opc"
ID(mov); sBWL(sz); DR(dst); SIs(src, dsp*4+a*2+b, sz); F_____;
}
@@ -8158,17 +8175,17 @@ rx_decode_opcode (unsigned long pc AU,
op_semantics_54:
{
/** 1011 w dsp a src b dst movu%s %1, %0 */
-#line 377 "rx-decode.opc"
+#line 378 "rx-decode.opc"
int w AU = (op[0] >> 3) & 0x01;
-#line 377 "rx-decode.opc"
+#line 378 "rx-decode.opc"
int dsp AU = op[0] & 0x07;
-#line 377 "rx-decode.opc"
+#line 378 "rx-decode.opc"
int a AU = (op[1] >> 7) & 0x01;
-#line 377 "rx-decode.opc"
+#line 378 "rx-decode.opc"
int src AU = (op[1] >> 4) & 0x07;
-#line 377 "rx-decode.opc"
+#line 378 "rx-decode.opc"
int b AU = (op[1] >> 3) & 0x01;
-#line 377 "rx-decode.opc"
+#line 378 "rx-decode.opc"
int dst AU = op[1] & 0x07;
if (trace)
{
@@ -8183,7 +8200,7 @@ rx_decode_opcode (unsigned long pc AU,
printf (" dst = 0x%x\n", dst);
}
SYNTAX("movu%s %1, %0");
-#line 377 "rx-decode.opc"
+#line 378 "rx-decode.opc"
ID(mov); uBW(w); DR(dst); SIs(src, dsp*4+a*2+b, w); F_____;
}
@@ -8333,15 +8350,15 @@ rx_decode_opcode (unsigned long pc AU,
op_semantics_55:
{
/** 11sz sd ss rsrc rdst mov%s %1, %0 */
-#line 335 "rx-decode.opc"
+#line 336 "rx-decode.opc"
int sz AU = (op[0] >> 4) & 0x03;
-#line 335 "rx-decode.opc"
+#line 336 "rx-decode.opc"
int sd AU = (op[0] >> 2) & 0x03;
-#line 335 "rx-decode.opc"
+#line 336 "rx-decode.opc"
int ss AU = op[0] & 0x03;
-#line 335 "rx-decode.opc"
+#line 336 "rx-decode.opc"
int rsrc AU = (op[1] >> 4) & 0x0f;
-#line 335 "rx-decode.opc"
+#line 336 "rx-decode.opc"
int rdst AU = op[1] & 0x0f;
if (trace)
{
@@ -8355,7 +8372,7 @@ rx_decode_opcode (unsigned long pc AU,
printf (" rdst = 0x%x\n", rdst);
}
SYNTAX("mov%s %1, %0");
-#line 335 "rx-decode.opc"
+#line 336 "rx-decode.opc"
if (sd == 3 && ss == 3 && sz == 2 && rsrc == 0 && rdst == 0)
{
ID(nop2);
@@ -8809,11 +8826,11 @@ rx_decode_opcode (unsigned long pc AU,
op_semantics_56:
{
/** 1111 00sd rdst 0bit bset #%1, %0%S0 */
-#line 960 "rx-decode.opc"
+#line 961 "rx-decode.opc"
int sd AU = op[0] & 0x03;
-#line 960 "rx-decode.opc"
+#line 961 "rx-decode.opc"
int rdst AU = (op[1] >> 4) & 0x0f;
-#line 960 "rx-decode.opc"
+#line 961 "rx-decode.opc"
int bit AU = op[1] & 0x07;
if (trace)
{
@@ -8825,7 +8842,7 @@ rx_decode_opcode (unsigned long pc AU,
printf (" bit = 0x%x\n", bit);
}
SYNTAX("bset #%1, %0%S0");
-#line 960 "rx-decode.opc"
+#line 961 "rx-decode.opc"
ID(bset); BWL(BSIZE); SC(bit); DD(sd, rdst, BSIZE); F_____;
}
@@ -8834,11 +8851,11 @@ rx_decode_opcode (unsigned long pc AU,
op_semantics_57:
{
/** 1111 00sd rdst 1bit bclr #%1, %0%S0 */
-#line 972 "rx-decode.opc"
+#line 973 "rx-decode.opc"
int sd AU = op[0] & 0x03;
-#line 972 "rx-decode.opc"
+#line 973 "rx-decode.opc"
int rdst AU = (op[1] >> 4) & 0x0f;
-#line 972 "rx-decode.opc"
+#line 973 "rx-decode.opc"
int bit AU = op[1] & 0x07;
if (trace)
{
@@ -8850,7 +8867,7 @@ rx_decode_opcode (unsigned long pc AU,
printf (" bit = 0x%x\n", bit);
}
SYNTAX("bclr #%1, %0%S0");
-#line 972 "rx-decode.opc"
+#line 973 "rx-decode.opc"
ID(bclr); BWL(BSIZE); SC(bit); DD(sd, rdst, BSIZE); F_____;
}
@@ -8902,11 +8919,11 @@ rx_decode_opcode (unsigned long pc AU,
op_semantics_58:
{
/** 1111 01sd rdst 0bit btst #%2, %1%S1 */
-#line 984 "rx-decode.opc"
+#line 985 "rx-decode.opc"
int sd AU = op[0] & 0x03;
-#line 984 "rx-decode.opc"
+#line 985 "rx-decode.opc"
int rdst AU = (op[1] >> 4) & 0x0f;
-#line 984 "rx-decode.opc"
+#line 985 "rx-decode.opc"
int bit AU = op[1] & 0x07;
if (trace)
{
@@ -8918,7 +8935,7 @@ rx_decode_opcode (unsigned long pc AU,
printf (" bit = 0x%x\n", bit);
}
SYNTAX("btst #%2, %1%S1");
-#line 984 "rx-decode.opc"
+#line 985 "rx-decode.opc"
ID(btst); BWL(BSIZE); S2C(bit); SD(sd, rdst, BSIZE); F___ZC;
}
@@ -8927,11 +8944,11 @@ rx_decode_opcode (unsigned long pc AU,
op_semantics_59:
{
/** 1111 01ss rsrc 10sz push%s %1 */
-#line 402 "rx-decode.opc"
+#line 403 "rx-decode.opc"
int ss AU = op[0] & 0x03;
-#line 402 "rx-decode.opc"
+#line 403 "rx-decode.opc"
int rsrc AU = (op[1] >> 4) & 0x0f;
-#line 402 "rx-decode.opc"
+#line 403 "rx-decode.opc"
int sz AU = op[1] & 0x03;
if (trace)
{
@@ -8943,7 +8960,7 @@ rx_decode_opcode (unsigned long pc AU,
printf (" sz = 0x%x\n", sz);
}
SYNTAX("push%s %1");
-#line 402 "rx-decode.opc"
+#line 403 "rx-decode.opc"
ID(mov); BWL(sz); OP(0, RX_Operand_Predec, 0, 0); SD(ss, rsrc, sz); F_____;
/*----------------------------------------------------------------------*/
@@ -9004,13 +9021,13 @@ rx_decode_opcode (unsigned long pc AU,
op_semantics_60:
{
/** 1111 10sd rdst im sz mov%s #%1, %0 */
-#line 313 "rx-decode.opc"
+#line 314 "rx-decode.opc"
int sd AU = op[0] & 0x03;
-#line 313 "rx-decode.opc"
+#line 314 "rx-decode.opc"
int rdst AU = (op[1] >> 4) & 0x0f;
-#line 313 "rx-decode.opc"
+#line 314 "rx-decode.opc"
int im AU = (op[1] >> 2) & 0x03;
-#line 313 "rx-decode.opc"
+#line 314 "rx-decode.opc"
int sz AU = op[1] & 0x03;
if (trace)
{
@@ -9023,7 +9040,7 @@ rx_decode_opcode (unsigned long pc AU,
printf (" sz = 0x%x\n", sz);
}
SYNTAX("mov%s #%1, %0");
-#line 313 "rx-decode.opc"
+#line 314 "rx-decode.opc"
ID(mov); DD(sd, rdst, sz);
if ((im == 1 && sz == 0)
|| (im == 2 && sz == 1)
@@ -9248,7 +9265,7 @@ rx_decode_opcode (unsigned long pc AU,
case 0x00:
{
/** 1111 1001 0000 0011 rdst 0000 dmov.l #%1, %0 */
-#line 1211 "rx-decode.opc"
+#line 1251 "rx-decode.opc"
int rdst AU = (op[2] >> 4) & 0x0f;
if (trace)
{
@@ -9258,7 +9275,7 @@ rx_decode_opcode (unsigned long pc AU,
printf (" rdst = 0x%x\n", rdst);
}
SYNTAX("dmov.l #%1, %0");
-#line 1211 "rx-decode.opc"
+#line 1251 "rx-decode.opc"
ID(dmov); DDRL(rdst); SC(IMMex(0)); F_____;
}
@@ -9267,9 +9284,9 @@ rx_decode_opcode (unsigned long pc AU,
case 0x03:
{
/** 1111 1001 0000 0011 rdst 001s dmov%s #%1, %0 */
-#line 1208 "rx-decode.opc"
+#line 1248 "rx-decode.opc"
int rdst AU = (op[2] >> 4) & 0x0f;
-#line 1208 "rx-decode.opc"
+#line 1248 "rx-decode.opc"
int s AU = op[2] & 0x01;
if (trace)
{
@@ -9280,7 +9297,7 @@ rx_decode_opcode (unsigned long pc AU,
printf (" s = 0x%x\n", s);
}
SYNTAX("dmov%s #%1, %0");
-#line 1208 "rx-decode.opc"
+#line 1248 "rx-decode.opc"
ID(dmov); DDRH(rdst); DL(s); SC(IMMex(0)); F_____;
}
@@ -9320,9 +9337,9 @@ rx_decode_opcode (unsigned long pc AU,
case 0x00:
{
/** 1111 1100 0000 0011 rsrc rdst sbb %1, %0 */
-#line 576 "rx-decode.opc"
+#line 577 "rx-decode.opc"
int rsrc AU = (op[2] >> 4) & 0x0f;
-#line 576 "rx-decode.opc"
+#line 577 "rx-decode.opc"
int rdst AU = op[2] & 0x0f;
if (trace)
{
@@ -9333,7 +9350,7 @@ rx_decode_opcode (unsigned long pc AU,
printf (" rdst = 0x%x\n", rdst);
}
SYNTAX("sbb %1, %0");
-#line 576 "rx-decode.opc"
+#line 577 "rx-decode.opc"
ID(sbb); SR (rsrc); DR(rdst); F_OSZC;
/* FIXME: only supports .L */
@@ -9348,9 +9365,9 @@ rx_decode_opcode (unsigned long pc AU,
case 0x00:
{
/** 1111 1100 0000 0111 rsrc rdst neg %2, %0 */
-#line 507 "rx-decode.opc"
+#line 508 "rx-decode.opc"
int rsrc AU = (op[2] >> 4) & 0x0f;
-#line 507 "rx-decode.opc"
+#line 508 "rx-decode.opc"
int rdst AU = op[2] & 0x0f;
if (trace)
{
@@ -9361,7 +9378,7 @@ rx_decode_opcode (unsigned long pc AU,
printf (" rdst = 0x%x\n", rdst);
}
SYNTAX("neg %2, %0");
-#line 507 "rx-decode.opc"
+#line 508 "rx-decode.opc"
ID(sub); DR(rdst); SC(0); S2R(rsrc); F_OSZC;
/*----------------------------------------------------------------------*/
@@ -9378,9 +9395,9 @@ rx_decode_opcode (unsigned long pc AU,
case 0x00:
{
/** 1111 1100 0000 1011 rsrc rdst adc %1, %0 */
-#line 516 "rx-decode.opc"
+#line 517 "rx-decode.opc"
int rsrc AU = (op[2] >> 4) & 0x0f;
-#line 516 "rx-decode.opc"
+#line 517 "rx-decode.opc"
int rdst AU = op[2] & 0x0f;
if (trace)
{
@@ -9391,7 +9408,7 @@ rx_decode_opcode (unsigned long pc AU,
printf (" rdst = 0x%x\n", rdst);
}
SYNTAX("adc %1, %0");
-#line 516 "rx-decode.opc"
+#line 517 "rx-decode.opc"
ID(adc); SR(rsrc); DR(rdst); F_OSZC;
}
@@ -9405,9 +9422,9 @@ rx_decode_opcode (unsigned long pc AU,
case 0x00:
{
/** 1111 1100 0000 1111 rsrc rdst abs %1, %0 */
-#line 589 "rx-decode.opc"
+#line 590 "rx-decode.opc"
int rsrc AU = (op[2] >> 4) & 0x0f;
-#line 589 "rx-decode.opc"
+#line 590 "rx-decode.opc"
int rdst AU = op[2] & 0x0f;
if (trace)
{
@@ -9418,7 +9435,7 @@ rx_decode_opcode (unsigned long pc AU,
printf (" rdst = 0x%x\n", rdst);
}
SYNTAX("abs %1, %0");
-#line 589 "rx-decode.opc"
+#line 590 "rx-decode.opc"
ID(abs); DR(rdst); SR(rsrc); F_OSZ_;
/*----------------------------------------------------------------------*/
@@ -9436,11 +9453,11 @@ rx_decode_opcode (unsigned long pc AU,
op_semantics_61:
{
/** 1111 1100 0001 00ss rsrc rdst max %1%S1, %0 */
-#line 608 "rx-decode.opc"
+#line 609 "rx-decode.opc"
int ss AU = op[1] & 0x03;
-#line 608 "rx-decode.opc"
+#line 609 "rx-decode.opc"
int rsrc AU = (op[2] >> 4) & 0x0f;
-#line 608 "rx-decode.opc"
+#line 609 "rx-decode.opc"
int rdst AU = op[2] & 0x0f;
if (trace)
{
@@ -9452,7 +9469,7 @@ rx_decode_opcode (unsigned long pc AU,
printf (" rdst = 0x%x\n", rdst);
}
SYNTAX("max %1%S1, %0");
-#line 608 "rx-decode.opc"
+#line 609 "rx-decode.opc"
if (ss == 3 && rsrc == 0 && rdst == 0)
{
ID(nop3);
@@ -9502,11 +9519,11 @@ rx_decode_opcode (unsigned long pc AU,
op_semantics_62:
{
/** 1111 1100 0001 01ss rsrc rdst min %1%S1, %0 */
-#line 628 "rx-decode.opc"
+#line 629 "rx-decode.opc"
int ss AU = op[1] & 0x03;
-#line 628 "rx-decode.opc"
+#line 629 "rx-decode.opc"
int rsrc AU = (op[2] >> 4) & 0x0f;
-#line 628 "rx-decode.opc"
+#line 629 "rx-decode.opc"
int rdst AU = op[2] & 0x0f;
if (trace)
{
@@ -9518,7 +9535,7 @@ rx_decode_opcode (unsigned long pc AU,
printf (" rdst = 0x%x\n", rdst);
}
SYNTAX("min %1%S1, %0");
-#line 628 "rx-decode.opc"
+#line 629 "rx-decode.opc"
ID(min); SP(ss, rsrc); DR(rdst);
}
@@ -9560,11 +9577,11 @@ rx_decode_opcode (unsigned long pc AU,
op_semantics_63:
{
/** 1111 1100 0001 10ss rsrc rdst emul %1%S1, %0 */
-#line 686 "rx-decode.opc"
+#line 687 "rx-decode.opc"
int ss AU = op[1] & 0x03;
-#line 686 "rx-decode.opc"
+#line 687 "rx-decode.opc"
int rsrc AU = (op[2] >> 4) & 0x0f;
-#line 686 "rx-decode.opc"
+#line 687 "rx-decode.opc"
int rdst AU = op[2] & 0x0f;
if (trace)
{
@@ -9576,7 +9593,7 @@ rx_decode_opcode (unsigned long pc AU,
printf (" rdst = 0x%x\n", rdst);
}
SYNTAX("emul %1%S1, %0");
-#line 686 "rx-decode.opc"
+#line 687 "rx-decode.opc"
ID(emul); SP(ss, rsrc); DR(rdst);
}
@@ -9618,11 +9635,11 @@ rx_decode_opcode (unsigned long pc AU,
op_semantics_64:
{
/** 1111 1100 0001 11ss rsrc rdst emulu %1%S1, %0 */
-#line 698 "rx-decode.opc"
+#line 699 "rx-decode.opc"
int ss AU = op[1] & 0x03;
-#line 698 "rx-decode.opc"
+#line 699 "rx-decode.opc"
int rsrc AU = (op[2] >> 4) & 0x0f;
-#line 698 "rx-decode.opc"
+#line 699 "rx-decode.opc"
int rdst AU = op[2] & 0x0f;
if (trace)
{
@@ -9634,7 +9651,7 @@ rx_decode_opcode (unsigned long pc AU,
printf (" rdst = 0x%x\n", rdst);
}
SYNTAX("emulu %1%S1, %0");
-#line 698 "rx-decode.opc"
+#line 699 "rx-decode.opc"
ID(emulu); SP(ss, rsrc); DR(rdst);
}
@@ -9676,11 +9693,11 @@ rx_decode_opcode (unsigned long pc AU,
op_semantics_65:
{
/** 1111 1100 0010 00ss rsrc rdst div %1%S1, %0 */
-#line 710 "rx-decode.opc"
+#line 711 "rx-decode.opc"
int ss AU = op[1] & 0x03;
-#line 710 "rx-decode.opc"
+#line 711 "rx-decode.opc"
int rsrc AU = (op[2] >> 4) & 0x0f;
-#line 710 "rx-decode.opc"
+#line 711 "rx-decode.opc"
int rdst AU = op[2] & 0x0f;
if (trace)
{
@@ -9692,7 +9709,7 @@ rx_decode_opcode (unsigned long pc AU,
printf (" rdst = 0x%x\n", rdst);
}
SYNTAX("div %1%S1, %0");
-#line 710 "rx-decode.opc"
+#line 711 "rx-decode.opc"
ID(div); SP(ss, rsrc); DR(rdst); F_O___;
}
@@ -9734,11 +9751,11 @@ rx_decode_opcode (unsigned long pc AU,
op_semantics_66:
{
/** 1111 1100 0010 01ss rsrc rdst divu %1%S1, %0 */
-#line 722 "rx-decode.opc"
+#line 723 "rx-decode.opc"
int ss AU = op[1] & 0x03;
-#line 722 "rx-decode.opc"
+#line 723 "rx-decode.opc"
int rsrc AU = (op[2] >> 4) & 0x0f;
-#line 722 "rx-decode.opc"
+#line 723 "rx-decode.opc"
int rdst AU = op[2] & 0x0f;
if (trace)
{
@@ -9750,7 +9767,7 @@ rx_decode_opcode (unsigned long pc AU,
printf (" rdst = 0x%x\n", rdst);
}
SYNTAX("divu %1%S1, %0");
-#line 722 "rx-decode.opc"
+#line 723 "rx-decode.opc"
ID(divu); SP(ss, rsrc); DR(rdst); F_O___;
}
@@ -9792,11 +9809,11 @@ rx_decode_opcode (unsigned long pc AU,
op_semantics_67:
{
/** 1111 1100 0011 00ss rsrc rdst tst %1%S1, %2 */
-#line 495 "rx-decode.opc"
+#line 496 "rx-decode.opc"
int ss AU = op[1] & 0x03;
-#line 495 "rx-decode.opc"
+#line 496 "rx-decode.opc"
int rsrc AU = (op[2] >> 4) & 0x0f;
-#line 495 "rx-decode.opc"
+#line 496 "rx-decode.opc"
int rdst AU = op[2] & 0x0f;
if (trace)
{
@@ -9808,7 +9825,7 @@ rx_decode_opcode (unsigned long pc AU,
printf (" rdst = 0x%x\n", rdst);
}
SYNTAX("tst %1%S1, %2");
-#line 495 "rx-decode.opc"
+#line 496 "rx-decode.opc"
ID(and); SP(ss, rsrc); S2R(rdst); F__SZ_;
}
@@ -9850,11 +9867,11 @@ rx_decode_opcode (unsigned long pc AU,
op_semantics_68:
{
/** 1111 1100 0011 01ss rsrc rdst xor %1%S1, %0 */
-#line 474 "rx-decode.opc"
+#line 475 "rx-decode.opc"
int ss AU = op[1] & 0x03;
-#line 474 "rx-decode.opc"
+#line 475 "rx-decode.opc"
int rsrc AU = (op[2] >> 4) & 0x0f;
-#line 474 "rx-decode.opc"
+#line 475 "rx-decode.opc"
int rdst AU = op[2] & 0x0f;
if (trace)
{
@@ -9866,7 +9883,7 @@ rx_decode_opcode (unsigned long pc AU,
printf (" rdst = 0x%x\n", rdst);
}
SYNTAX("xor %1%S1, %0");
-#line 474 "rx-decode.opc"
+#line 475 "rx-decode.opc"
ID(xor); SP(ss, rsrc); DR(rdst); F__SZ_;
}
@@ -9907,9 +9924,9 @@ rx_decode_opcode (unsigned long pc AU,
case 0x00:
{
/** 1111 1100 0011 1011 rsrc rdst not %1, %0 */
-#line 486 "rx-decode.opc"
+#line 487 "rx-decode.opc"
int rsrc AU = (op[2] >> 4) & 0x0f;
-#line 486 "rx-decode.opc"
+#line 487 "rx-decode.opc"
int rdst AU = op[2] & 0x0f;
if (trace)
{
@@ -9920,7 +9937,7 @@ rx_decode_opcode (unsigned long pc AU,
printf (" rdst = 0x%x\n", rdst);
}
SYNTAX("not %1, %0");
-#line 486 "rx-decode.opc"
+#line 487 "rx-decode.opc"
ID(xor); DR(rdst); SR(rsrc); S2C(~0); F__SZ_;
/*----------------------------------------------------------------------*/
@@ -9938,11 +9955,11 @@ rx_decode_opcode (unsigned long pc AU,
op_semantics_69:
{
/** 1111 1100 0100 00ss rsrc rdst xchg %1%S1, %0 */
-#line 408 "rx-decode.opc"
+#line 409 "rx-decode.opc"
int ss AU = op[1] & 0x03;
-#line 408 "rx-decode.opc"
+#line 409 "rx-decode.opc"
int rsrc AU = (op[2] >> 4) & 0x0f;
-#line 408 "rx-decode.opc"
+#line 409 "rx-decode.opc"
int rdst AU = op[2] & 0x0f;
if (trace)
{
@@ -9954,7 +9971,7 @@ rx_decode_opcode (unsigned long pc AU,
printf (" rdst = 0x%x\n", rdst);
}
SYNTAX("xchg %1%S1, %0");
-#line 408 "rx-decode.opc"
+#line 409 "rx-decode.opc"
ID(xchg); DR(rdst); SP(ss, rsrc);
}
@@ -9996,11 +10013,11 @@ rx_decode_opcode (unsigned long pc AU,
op_semantics_70:
{
/** 1111 1100 0100 01sd rsrc rdst itof %1%S1, %0 */
-#line 951 "rx-decode.opc"
+#line 952 "rx-decode.opc"
int sd AU = op[1] & 0x03;
-#line 951 "rx-decode.opc"
+#line 952 "rx-decode.opc"
int rsrc AU = (op[2] >> 4) & 0x0f;
-#line 951 "rx-decode.opc"
+#line 952 "rx-decode.opc"
int rdst AU = op[2] & 0x0f;
if (trace)
{
@@ -10012,7 +10029,7 @@ rx_decode_opcode (unsigned long pc AU,
printf (" rdst = 0x%x\n", rdst);
}
SYNTAX("itof %1%S1, %0");
-#line 951 "rx-decode.opc"
+#line 952 "rx-decode.opc"
ID(itof); DR (rdst); SP(sd, rsrc); F__SZ_;
}
@@ -10053,9 +10070,9 @@ rx_decode_opcode (unsigned long pc AU,
case 0x00:
{
/** 1111 1100 0100 1011 rsrc rdst stz %1, %0 */
-#line 1077 "rx-decode.opc"
+#line 1117 "rx-decode.opc"
int rsrc AU = (op[2] >> 4) & 0x0f;
-#line 1077 "rx-decode.opc"
+#line 1117 "rx-decode.opc"
int rdst AU = op[2] & 0x0f;
if (trace)
{
@@ -10066,7 +10083,7 @@ rx_decode_opcode (unsigned long pc AU,
printf (" rdst = 0x%x\n", rdst);
}
SYNTAX("stz %1, %0");
-#line 1077 "rx-decode.opc"
+#line 1117 "rx-decode.opc"
ID(stcc); SR(rsrc); DR(rdst); S2cc(RXC_z);
}
@@ -10080,9 +10097,9 @@ rx_decode_opcode (unsigned long pc AU,
case 0x00:
{
/** 1111 1100 0100 1111 rsrc rdst stnz %1, %0 */
-#line 1080 "rx-decode.opc"
+#line 1120 "rx-decode.opc"
int rsrc AU = (op[2] >> 4) & 0x0f;
-#line 1080 "rx-decode.opc"
+#line 1120 "rx-decode.opc"
int rdst AU = op[2] & 0x0f;
if (trace)
{
@@ -10093,7 +10110,7 @@ rx_decode_opcode (unsigned long pc AU,
printf (" rdst = 0x%x\n", rdst);
}
SYNTAX("stnz %1, %0");
-#line 1080 "rx-decode.opc"
+#line 1120 "rx-decode.opc"
ID(stcc); SR(rsrc); DR(rdst); S2cc(RXC_nz);
}
@@ -10108,11 +10125,11 @@ rx_decode_opcode (unsigned long pc AU,
op_semantics_71:
{
/** 1111 1100 0101 01sd rsrc rdst utof %1%S1, %0 */
-#line 1137 "rx-decode.opc"
+#line 1177 "rx-decode.opc"
int sd AU = op[1] & 0x03;
-#line 1137 "rx-decode.opc"
+#line 1177 "rx-decode.opc"
int rsrc AU = (op[2] >> 4) & 0x0f;
-#line 1137 "rx-decode.opc"
+#line 1177 "rx-decode.opc"
int rdst AU = op[2] & 0x0f;
if (trace)
{
@@ -10124,7 +10141,7 @@ rx_decode_opcode (unsigned long pc AU,
printf (" rdst = 0x%x\n", rdst);
}
SYNTAX("utof %1%S1, %0");
-#line 1137 "rx-decode.opc"
+#line 1177 "rx-decode.opc"
ID(utof); DR (rdst); SP(sd, rsrc); F__SZ_;
}
@@ -10165,9 +10182,9 @@ rx_decode_opcode (unsigned long pc AU,
case 0x00:
{
/** 1111 1100 0101 1010 rsrc rdst bfmovz %bf */
-#line 1152 "rx-decode.opc"
+#line 1192 "rx-decode.opc"
int rsrc AU = (op[2] >> 4) & 0x0f;
-#line 1152 "rx-decode.opc"
+#line 1192 "rx-decode.opc"
int rdst AU = op[2] & 0x0f;
if (trace)
{
@@ -10178,7 +10195,7 @@ rx_decode_opcode (unsigned long pc AU,
printf (" rdst = 0x%x\n", rdst);
}
SYNTAX("bfmovz %bf");
-#line 1152 "rx-decode.opc"
+#line 1192 "rx-decode.opc"
ID(bfmovz); DR(rdst); SR(rsrc); S2C(IMM(2)); F_____;
}
@@ -10192,9 +10209,9 @@ rx_decode_opcode (unsigned long pc AU,
case 0x00:
{
/** 1111 1100 0101 1110 rsrc rdst bfmov %bf */
-#line 1149 "rx-decode.opc"
+#line 1189 "rx-decode.opc"
int rsrc AU = (op[2] >> 4) & 0x0f;
-#line 1149 "rx-decode.opc"
+#line 1189 "rx-decode.opc"
int rdst AU = op[2] & 0x0f;
if (trace)
{
@@ -10205,7 +10222,7 @@ rx_decode_opcode (unsigned long pc AU,
printf (" rdst = 0x%x\n", rdst);
}
SYNTAX("bfmov %bf");
-#line 1149 "rx-decode.opc"
+#line 1189 "rx-decode.opc"
ID(bfmov); DR(rdst); SR(rsrc); S2C(IMM(2)); F_____;
}
@@ -10220,11 +10237,11 @@ rx_decode_opcode (unsigned long pc AU,
op_semantics_72:
{
/** 1111 1100 0110 00sd rdst rsrc bset %1, %0%S0 */
-#line 963 "rx-decode.opc"
+#line 964 "rx-decode.opc"
int sd AU = op[1] & 0x03;
-#line 963 "rx-decode.opc"
+#line 964 "rx-decode.opc"
int rdst AU = (op[2] >> 4) & 0x0f;
-#line 963 "rx-decode.opc"
+#line 964 "rx-decode.opc"
int rsrc AU = op[2] & 0x0f;
if (trace)
{
@@ -10236,7 +10253,7 @@ rx_decode_opcode (unsigned long pc AU,
printf (" rsrc = 0x%x\n", rsrc);
}
SYNTAX("bset %1, %0%S0");
-#line 963 "rx-decode.opc"
+#line 964 "rx-decode.opc"
ID(bset); BWL(BSIZE); SR(rsrc); DD(sd, rdst, BSIZE); F_____;
if (sd == 3) /* bset reg,reg */
BWL(LSIZE);
@@ -10280,11 +10297,11 @@ rx_decode_opcode (unsigned long pc AU,
op_semantics_73:
{
/** 1111 1100 0110 01sd rdst rsrc bclr %1, %0%S0 */
-#line 975 "rx-decode.opc"
+#line 976 "rx-decode.opc"
int sd AU = op[1] & 0x03;
-#line 975 "rx-decode.opc"
+#line 976 "rx-decode.opc"
int rdst AU = (op[2] >> 4) & 0x0f;
-#line 975 "rx-decode.opc"
+#line 976 "rx-decode.opc"
int rsrc AU = op[2] & 0x0f;
if (trace)
{
@@ -10296,7 +10313,7 @@ rx_decode_opcode (unsigned long pc AU,
printf (" rsrc = 0x%x\n", rsrc);
}
SYNTAX("bclr %1, %0%S0");
-#line 975 "rx-decode.opc"
+#line 976 "rx-decode.opc"
ID(bclr); BWL(BSIZE); SR(rsrc); DD(sd, rdst, BSIZE); F_____;
if (sd == 3) /* bset reg,reg */
BWL(LSIZE);
@@ -10340,11 +10357,11 @@ rx_decode_opcode (unsigned long pc AU,
op_semantics_74:
{
/** 1111 1100 0110 10sd rdst rsrc btst %2, %1%S1 */
-#line 987 "rx-decode.opc"
+#line 988 "rx-decode.opc"
int sd AU = op[1] & 0x03;
-#line 987 "rx-decode.opc"
+#line 988 "rx-decode.opc"
int rdst AU = (op[2] >> 4) & 0x0f;
-#line 987 "rx-decode.opc"
+#line 988 "rx-decode.opc"
int rsrc AU = op[2] & 0x0f;
if (trace)
{
@@ -10356,7 +10373,7 @@ rx_decode_opcode (unsigned long pc AU,
printf (" rsrc = 0x%x\n", rsrc);
}
SYNTAX("btst %2, %1%S1");
-#line 987 "rx-decode.opc"
+#line 988 "rx-decode.opc"
ID(btst); BWL(BSIZE); S2R(rsrc); SD(sd, rdst, BSIZE); F___ZC;
if (sd == 3) /* bset reg,reg */
BWL(LSIZE);
@@ -10400,11 +10417,11 @@ rx_decode_opcode (unsigned long pc AU,
op_semantics_75:
{
/** 1111 1100 0110 11sd rdst rsrc bnot %1, %0%S0 */
-#line 999 "rx-decode.opc"
+#line 1000 "rx-decode.opc"
int sd AU = op[1] & 0x03;
-#line 999 "rx-decode.opc"
+#line 1000 "rx-decode.opc"
int rdst AU = (op[2] >> 4) & 0x0f;
-#line 999 "rx-decode.opc"
+#line 1000 "rx-decode.opc"
int rsrc AU = op[2] & 0x0f;
if (trace)
{
@@ -10416,7 +10433,7 @@ rx_decode_opcode (unsigned long pc AU,
printf (" rsrc = 0x%x\n", rsrc);
}
SYNTAX("bnot %1, %0%S0");
-#line 999 "rx-decode.opc"
+#line 1000 "rx-decode.opc"
ID(bnot); BWL(BSIZE); SR(rsrc); DD(sd, rdst, BSIZE);
if (sd == 3) /* bset reg,reg */
BWL(LSIZE);
@@ -10460,9 +10477,9 @@ rx_decode_opcode (unsigned long pc AU,
op_semantics_76:
{
/** 1111 1100 0111 10sz rdst 1000 dmov.d %1, %0 */
-#line 1185 "rx-decode.opc"
+#line 1225 "rx-decode.opc"
int sz AU = op[1] & 0x03;
-#line 1185 "rx-decode.opc"
+#line 1225 "rx-decode.opc"
int rdst AU = (op[2] >> 4) & 0x0f;
if (trace)
{
@@ -10473,7 +10490,7 @@ rx_decode_opcode (unsigned long pc AU,
printf (" rdst = 0x%x\n", rdst);
}
SYNTAX("dmov.d %1, %0");
-#line 1185 "rx-decode.opc"
+#line 1225 "rx-decode.opc"
int rsrc;
rx_disp(0, sz, rdst, RX_Double, ld);
rsrc = GETBYTE();
@@ -10516,11 +10533,11 @@ rx_decode_opcode (unsigned long pc AU,
op_semantics_77:
{
/** 1111 1100 1000 00sd rsrc rdst fsub %1%S1, %0 */
-#line 930 "rx-decode.opc"
+#line 931 "rx-decode.opc"
int sd AU = op[1] & 0x03;
-#line 930 "rx-decode.opc"
+#line 931 "rx-decode.opc"
int rsrc AU = (op[2] >> 4) & 0x0f;
-#line 930 "rx-decode.opc"
+#line 931 "rx-decode.opc"
int rdst AU = op[2] & 0x0f;
if (trace)
{
@@ -10532,7 +10549,7 @@ rx_decode_opcode (unsigned long pc AU,
printf (" rdst = 0x%x\n", rdst);
}
SYNTAX("fsub %1%S1, %0");
-#line 930 "rx-decode.opc"
+#line 931 "rx-decode.opc"
ID(fsub); DR(rdst); SD(sd, rsrc, LSIZE); F__SZ_;
}
@@ -10574,11 +10591,11 @@ rx_decode_opcode (unsigned long pc AU,
op_semantics_78:
{
/** 1111 1100 1000 01sd rsrc rdst fcmp %1%S1, %0 */
-#line 924 "rx-decode.opc"
+#line 925 "rx-decode.opc"
int sd AU = op[1] & 0x03;
-#line 924 "rx-decode.opc"
+#line 925 "rx-decode.opc"
int rsrc AU = (op[2] >> 4) & 0x0f;
-#line 924 "rx-decode.opc"
+#line 925 "rx-decode.opc"
int rdst AU = op[2] & 0x0f;
if (trace)
{
@@ -10590,7 +10607,7 @@ rx_decode_opcode (unsigned long pc AU,
printf (" rdst = 0x%x\n", rdst);
}
SYNTAX("fcmp %1%S1, %0");
-#line 924 "rx-decode.opc"
+#line 925 "rx-decode.opc"
ID(fcmp); DR(rdst); SD(sd, rsrc, LSIZE); F_OSZ_;
}
@@ -10632,11 +10649,11 @@ rx_decode_opcode (unsigned long pc AU,
op_semantics_79:
{
/** 1111 1100 1000 10sd rsrc rdst fadd %1%S1, %0 */
-#line 918 "rx-decode.opc"
+#line 919 "rx-decode.opc"
int sd AU = op[1] & 0x03;
-#line 918 "rx-decode.opc"
+#line 919 "rx-decode.opc"
int rsrc AU = (op[2] >> 4) & 0x0f;
-#line 918 "rx-decode.opc"
+#line 919 "rx-decode.opc"
int rdst AU = op[2] & 0x0f;
if (trace)
{
@@ -10648,7 +10665,7 @@ rx_decode_opcode (unsigned long pc AU,
printf (" rdst = 0x%x\n", rdst);
}
SYNTAX("fadd %1%S1, %0");
-#line 918 "rx-decode.opc"
+#line 919 "rx-decode.opc"
ID(fadd); DR(rdst); SD(sd, rsrc, LSIZE); F__SZ_;
}
@@ -10690,11 +10707,11 @@ rx_decode_opcode (unsigned long pc AU,
op_semantics_80:
{
/** 1111 1100 1000 11sd rsrc rdst fmul %1%S1, %0 */
-#line 939 "rx-decode.opc"
+#line 940 "rx-decode.opc"
int sd AU = op[1] & 0x03;
-#line 939 "rx-decode.opc"
+#line 940 "rx-decode.opc"
int rsrc AU = (op[2] >> 4) & 0x0f;
-#line 939 "rx-decode.opc"
+#line 940 "rx-decode.opc"
int rdst AU = op[2] & 0x0f;
if (trace)
{
@@ -10706,7 +10723,7 @@ rx_decode_opcode (unsigned long pc AU,
printf (" rdst = 0x%x\n", rdst);
}
SYNTAX("fmul %1%S1, %0");
-#line 939 "rx-decode.opc"
+#line 940 "rx-decode.opc"
ID(fmul); DR(rdst); SD(sd, rsrc, LSIZE); F__SZ_;
}
@@ -10748,11 +10765,11 @@ rx_decode_opcode (unsigned long pc AU,
op_semantics_81:
{
/** 1111 1100 1001 00sd rsrc rdst fdiv %1%S1, %0 */
-#line 945 "rx-decode.opc"
+#line 946 "rx-decode.opc"
int sd AU = op[1] & 0x03;
-#line 945 "rx-decode.opc"
+#line 946 "rx-decode.opc"
int rsrc AU = (op[2] >> 4) & 0x0f;
-#line 945 "rx-decode.opc"
+#line 946 "rx-decode.opc"
int rdst AU = op[2] & 0x0f;
if (trace)
{
@@ -10764,7 +10781,7 @@ rx_decode_opcode (unsigned long pc AU,
printf (" rdst = 0x%x\n", rdst);
}
SYNTAX("fdiv %1%S1, %0");
-#line 945 "rx-decode.opc"
+#line 946 "rx-decode.opc"
ID(fdiv); DR(rdst); SD(sd, rsrc, LSIZE); F__SZ_;
}
@@ -10806,11 +10823,11 @@ rx_decode_opcode (unsigned long pc AU,
op_semantics_82:
{
/** 1111 1100 1001 01sd rsrc rdst ftoi %1%S1, %0 */
-#line 933 "rx-decode.opc"
+#line 934 "rx-decode.opc"
int sd AU = op[1] & 0x03;
-#line 933 "rx-decode.opc"
+#line 934 "rx-decode.opc"
int rsrc AU = (op[2] >> 4) & 0x0f;
-#line 933 "rx-decode.opc"
+#line 934 "rx-decode.opc"
int rdst AU = op[2] & 0x0f;
if (trace)
{
@@ -10822,7 +10839,7 @@ rx_decode_opcode (unsigned long pc AU,
printf (" rdst = 0x%x\n", rdst);
}
SYNTAX("ftoi %1%S1, %0");
-#line 933 "rx-decode.opc"
+#line 934 "rx-decode.opc"
ID(ftoi); DR(rdst); SD(sd, rsrc, LSIZE); F__SZ_;
}
@@ -10864,11 +10881,11 @@ rx_decode_opcode (unsigned long pc AU,
op_semantics_83:
{
/** 1111 1100 1001 10sd rsrc rdst round %1%S1, %0 */
-#line 948 "rx-decode.opc"
+#line 949 "rx-decode.opc"
int sd AU = op[1] & 0x03;
-#line 948 "rx-decode.opc"
+#line 949 "rx-decode.opc"
int rsrc AU = (op[2] >> 4) & 0x0f;
-#line 948 "rx-decode.opc"
+#line 949 "rx-decode.opc"
int rdst AU = op[2] & 0x0f;
if (trace)
{
@@ -10880,7 +10897,7 @@ rx_decode_opcode (unsigned long pc AU,
printf (" rdst = 0x%x\n", rdst);
}
SYNTAX("round %1%S1, %0");
-#line 948 "rx-decode.opc"
+#line 949 "rx-decode.opc"
ID(round); DR(rdst); SD(sd, rsrc, LSIZE); F__SZ_;
}
@@ -10922,11 +10939,11 @@ rx_decode_opcode (unsigned long pc AU,
op_semantics_84:
{
/** 1111 1100 1010 00sd rsrc rdst fsqrt %1%S1, %0 */
-#line 1131 "rx-decode.opc"
+#line 1171 "rx-decode.opc"
int sd AU = op[1] & 0x03;
-#line 1131 "rx-decode.opc"
+#line 1171 "rx-decode.opc"
int rsrc AU = (op[2] >> 4) & 0x0f;
-#line 1131 "rx-decode.opc"
+#line 1171 "rx-decode.opc"
int rdst AU = op[2] & 0x0f;
if (trace)
{
@@ -10938,7 +10955,7 @@ rx_decode_opcode (unsigned long pc AU,
printf (" rdst = 0x%x\n", rdst);
}
SYNTAX("fsqrt %1%S1, %0");
-#line 1131 "rx-decode.opc"
+#line 1171 "rx-decode.opc"
ID(fsqrt); DR(rdst); SD(sd, rsrc, LSIZE); F__SZ_;
}
@@ -10980,11 +10997,11 @@ rx_decode_opcode (unsigned long pc AU,
op_semantics_85:
{
/** 1111 1100 1010 01sd rsrc rdst ftou %1%S1, %0 */
-#line 1134 "rx-decode.opc"
+#line 1174 "rx-decode.opc"
int sd AU = op[1] & 0x03;
-#line 1134 "rx-decode.opc"
+#line 1174 "rx-decode.opc"
int rsrc AU = (op[2] >> 4) & 0x0f;
-#line 1134 "rx-decode.opc"
+#line 1174 "rx-decode.opc"
int rdst AU = op[2] & 0x0f;
if (trace)
{
@@ -10996,7 +11013,7 @@ rx_decode_opcode (unsigned long pc AU,
printf (" rdst = 0x%x\n", rdst);
}
SYNTAX("ftou %1%S1, %0");
-#line 1134 "rx-decode.opc"
+#line 1174 "rx-decode.opc"
ID(ftou); DR(rdst); SD(sd, rsrc, LSIZE); F__SZ_;
}
@@ -11038,9 +11055,9 @@ rx_decode_opcode (unsigned long pc AU,
op_semantics_86:
{
/** 1111 1100 1100 10sz rsrc 1000 dmov.d %1, %0 */
-#line 1198 "rx-decode.opc"
+#line 1238 "rx-decode.opc"
int sz AU = op[1] & 0x03;
-#line 1198 "rx-decode.opc"
+#line 1238 "rx-decode.opc"
int rsrc AU = (op[2] >> 4) & 0x0f;
if (trace)
{
@@ -11051,7 +11068,7 @@ rx_decode_opcode (unsigned long pc AU,
printf (" rsrc = 0x%x\n", rsrc);
}
SYNTAX("dmov.d %1, %0");
-#line 1198 "rx-decode.opc"
+#line 1238 "rx-decode.opc"
int rdst;
rx_disp(1, sz, rsrc, RX_Double, ld);
rdst = GETBYTE();
@@ -11094,13 +11111,13 @@ rx_decode_opcode (unsigned long pc AU,
op_semantics_87:
{
/** 1111 1100 1101 sz sd rdst cond sc%1%s %0 */
-#line 1065 "rx-decode.opc"
+#line 1105 "rx-decode.opc"
int sz AU = (op[1] >> 2) & 0x03;
-#line 1065 "rx-decode.opc"
+#line 1105 "rx-decode.opc"
int sd AU = op[1] & 0x03;
-#line 1065 "rx-decode.opc"
+#line 1105 "rx-decode.opc"
int rdst AU = (op[2] >> 4) & 0x0f;
-#line 1065 "rx-decode.opc"
+#line 1105 "rx-decode.opc"
int cond AU = op[2] & 0x0f;
if (trace)
{
@@ -11113,7 +11130,7 @@ rx_decode_opcode (unsigned long pc AU,
printf (" cond = 0x%x\n", cond);
}
SYNTAX("sc%1%s %0");
-#line 1065 "rx-decode.opc"
+#line 1105 "rx-decode.opc"
ID(sccnd); BWL(sz); DD (sd, rdst, sz); Scc(cond);
/*----------------------------------------------------------------------*/
@@ -11244,13 +11261,13 @@ rx_decode_opcode (unsigned long pc AU,
op_semantics_88:
{
/** 1111 1100 111bit sd rdst cond bm%2 #%1, %0%S0 */
-#line 1008 "rx-decode.opc"
+#line 1009 "rx-decode.opc"
int bit AU = (op[1] >> 2) & 0x07;
-#line 1008 "rx-decode.opc"
+#line 1009 "rx-decode.opc"
int sd AU = op[1] & 0x03;
-#line 1008 "rx-decode.opc"
+#line 1009 "rx-decode.opc"
int rdst AU = (op[2] >> 4) & 0x0f;
-#line 1008 "rx-decode.opc"
+#line 1009 "rx-decode.opc"
int cond AU = op[2] & 0x0f;
if (trace)
{
@@ -11263,7 +11280,7 @@ rx_decode_opcode (unsigned long pc AU,
printf (" cond = 0x%x\n", cond);
}
SYNTAX("bm%2 #%1, %0%S0");
-#line 1008 "rx-decode.opc"
+#line 1009 "rx-decode.opc"
ID(bmcc); BWL(BSIZE); S2cc(cond); SC(bit); DD(sd, rdst, BSIZE);
}
@@ -11272,11 +11289,11 @@ rx_decode_opcode (unsigned long pc AU,
op_semantics_89:
{
/** 1111 1100 111bit sd rdst 1111 bnot #%1, %0%S0 */
-#line 996 "rx-decode.opc"
+#line 997 "rx-decode.opc"
int bit AU = (op[1] >> 2) & 0x07;
-#line 996 "rx-decode.opc"
+#line 997 "rx-decode.opc"
int sd AU = op[1] & 0x03;
-#line 996 "rx-decode.opc"
+#line 997 "rx-decode.opc"
int rdst AU = (op[2] >> 4) & 0x0f;
if (trace)
{
@@ -11288,7 +11305,7 @@ rx_decode_opcode (unsigned long pc AU,
printf (" rdst = 0x%x\n", rdst);
}
SYNTAX("bnot #%1, %0%S0");
-#line 996 "rx-decode.opc"
+#line 997 "rx-decode.opc"
ID(bnot); BWL(BSIZE); SC(bit); DD(sd, rdst, BSIZE);
}
@@ -12116,11 +12133,11 @@ rx_decode_opcode (unsigned long pc AU,
op_semantics_90:
{
/** 1111 1101 0000 a000 srca srcb mulhi %1, %2, %0 */
-#line 873 "rx-decode.opc"
+#line 874 "rx-decode.opc"
int a AU = (op[1] >> 3) & 0x01;
-#line 873 "rx-decode.opc"
+#line 874 "rx-decode.opc"
int srca AU = (op[2] >> 4) & 0x0f;
-#line 873 "rx-decode.opc"
+#line 874 "rx-decode.opc"
int srcb AU = op[2] & 0x0f;
if (trace)
{
@@ -12132,7 +12149,7 @@ rx_decode_opcode (unsigned long pc AU,
printf (" srcb = 0x%x\n", srcb);
}
SYNTAX("mulhi %1, %2, %0");
-#line 873 "rx-decode.opc"
+#line 874 "rx-decode.opc"
ID(mulhi); DR(a+32); SR(srca); S2R(srcb); F_____;
}
@@ -12147,11 +12164,11 @@ rx_decode_opcode (unsigned long pc AU,
op_semantics_91:
{
/** 1111 1101 0000 a001 srca srcb mullo %1, %2, %0 */
-#line 876 "rx-decode.opc"
+#line 877 "rx-decode.opc"
int a AU = (op[1] >> 3) & 0x01;
-#line 876 "rx-decode.opc"
+#line 877 "rx-decode.opc"
int srca AU = (op[2] >> 4) & 0x0f;
-#line 876 "rx-decode.opc"
+#line 877 "rx-decode.opc"
int srcb AU = op[2] & 0x0f;
if (trace)
{
@@ -12163,7 +12180,7 @@ rx_decode_opcode (unsigned long pc AU,
printf (" srcb = 0x%x\n", srcb);
}
SYNTAX("mullo %1, %2, %0");
-#line 876 "rx-decode.opc"
+#line 877 "rx-decode.opc"
ID(mullo); DR(a+32); SR(srca); S2R(srcb); F_____;
}
@@ -12178,11 +12195,11 @@ rx_decode_opcode (unsigned long pc AU,
op_semantics_92:
{
/** 1111 1101 0000 a010 srca srcb mullh %1, %2, %0 */
-#line 1104 "rx-decode.opc"
+#line 1144 "rx-decode.opc"
int a AU = (op[1] >> 3) & 0x01;
-#line 1104 "rx-decode.opc"
+#line 1144 "rx-decode.opc"
int srca AU = (op[2] >> 4) & 0x0f;
-#line 1104 "rx-decode.opc"
+#line 1144 "rx-decode.opc"
int srcb AU = op[2] & 0x0f;
if (trace)
{
@@ -12194,7 +12211,7 @@ rx_decode_opcode (unsigned long pc AU,
printf (" srcb = 0x%x\n", srcb);
}
SYNTAX("mullh %1, %2, %0");
-#line 1104 "rx-decode.opc"
+#line 1144 "rx-decode.opc"
ID(mullh); DR(a+32); SR(srca); S2R(srcb); F_____;
}
@@ -12209,11 +12226,11 @@ rx_decode_opcode (unsigned long pc AU,
op_semantics_93:
{
/** 1111 1101 0000 a011 srca srcb emula %1, %2, %0 */
-#line 1089 "rx-decode.opc"
+#line 1129 "rx-decode.opc"
int a AU = (op[1] >> 3) & 0x01;
-#line 1089 "rx-decode.opc"
+#line 1129 "rx-decode.opc"
int srca AU = (op[2] >> 4) & 0x0f;
-#line 1089 "rx-decode.opc"
+#line 1129 "rx-decode.opc"
int srcb AU = op[2] & 0x0f;
if (trace)
{
@@ -12225,7 +12242,7 @@ rx_decode_opcode (unsigned long pc AU,
printf (" srcb = 0x%x\n", srcb);
}
SYNTAX("emula %1, %2, %0");
-#line 1089 "rx-decode.opc"
+#line 1129 "rx-decode.opc"
ID(emula); DR(a+32); SR(srca); S2R(srcb); F_____;
}
@@ -12240,11 +12257,11 @@ rx_decode_opcode (unsigned long pc AU,
op_semantics_94:
{
/** 1111 1101 0000 a100 srca srcb machi %1, %2, %0 */
-#line 879 "rx-decode.opc"
+#line 880 "rx-decode.opc"
int a AU = (op[1] >> 3) & 0x01;
-#line 879 "rx-decode.opc"
+#line 880 "rx-decode.opc"
int srca AU = (op[2] >> 4) & 0x0f;
-#line 879 "rx-decode.opc"
+#line 880 "rx-decode.opc"
int srcb AU = op[2] & 0x0f;
if (trace)
{
@@ -12256,7 +12273,7 @@ rx_decode_opcode (unsigned long pc AU,
printf (" srcb = 0x%x\n", srcb);
}
SYNTAX("machi %1, %2, %0");
-#line 879 "rx-decode.opc"
+#line 880 "rx-decode.opc"
ID(machi); DR(a+32); SR(srca); S2R(srcb); F_____;
}
@@ -12271,11 +12288,11 @@ rx_decode_opcode (unsigned long pc AU,
op_semantics_95:
{
/** 1111 1101 0000 a101 srca srcb maclo %1, %2, %0 */
-#line 882 "rx-decode.opc"
+#line 883 "rx-decode.opc"
int a AU = (op[1] >> 3) & 0x01;
-#line 882 "rx-decode.opc"
+#line 883 "rx-decode.opc"
int srca AU = (op[2] >> 4) & 0x0f;
-#line 882 "rx-decode.opc"
+#line 883 "rx-decode.opc"
int srcb AU = op[2] & 0x0f;
if (trace)
{
@@ -12287,7 +12304,7 @@ rx_decode_opcode (unsigned long pc AU,
printf (" srcb = 0x%x\n", srcb);
}
SYNTAX("maclo %1, %2, %0");
-#line 882 "rx-decode.opc"
+#line 883 "rx-decode.opc"
ID(maclo); DR(a+32); SR(srca); S2R(srcb); F_____;
}
@@ -12302,11 +12319,11 @@ rx_decode_opcode (unsigned long pc AU,
op_semantics_96:
{
/** 1111 1101 0000 a110 srca srcb maclh %1, %2, %0 */
-#line 1092 "rx-decode.opc"
+#line 1132 "rx-decode.opc"
int a AU = (op[1] >> 3) & 0x01;
-#line 1092 "rx-decode.opc"
+#line 1132 "rx-decode.opc"
int srca AU = (op[2] >> 4) & 0x0f;
-#line 1092 "rx-decode.opc"
+#line 1132 "rx-decode.opc"
int srcb AU = op[2] & 0x0f;
if (trace)
{
@@ -12318,7 +12335,7 @@ rx_decode_opcode (unsigned long pc AU,
printf (" srcb = 0x%x\n", srcb);
}
SYNTAX("maclh %1, %2, %0");
-#line 1092 "rx-decode.opc"
+#line 1132 "rx-decode.opc"
ID(maclh); DR(a+32); SR(srca); S2R(srcb); F_____;
}
@@ -12333,11 +12350,11 @@ rx_decode_opcode (unsigned long pc AU,
op_semantics_97:
{
/** 1111 1101 0000 a111 srca srcb emaca %1, %2, %0 */
-#line 1083 "rx-decode.opc"
+#line 1123 "rx-decode.opc"
int a AU = (op[1] >> 3) & 0x01;
-#line 1083 "rx-decode.opc"
+#line 1123 "rx-decode.opc"
int srca AU = (op[2] >> 4) & 0x0f;
-#line 1083 "rx-decode.opc"
+#line 1123 "rx-decode.opc"
int srcb AU = op[2] & 0x0f;
if (trace)
{
@@ -12349,7 +12366,7 @@ rx_decode_opcode (unsigned long pc AU,
printf (" srcb = 0x%x\n", srcb);
}
SYNTAX("emaca %1, %2, %0");
-#line 1083 "rx-decode.opc"
+#line 1123 "rx-decode.opc"
ID(emaca); DR(a+32); SR(srca); S2R(srcb); F_____;
}
@@ -12435,9 +12452,9 @@ rx_decode_opcode (unsigned long pc AU,
case 0x00:
{
/** 1111 1101 0001 0111 a000 rsrc mvtachi %1, %0 */
-#line 885 "rx-decode.opc"
+#line 886 "rx-decode.opc"
int a AU = (op[2] >> 7) & 0x01;
-#line 885 "rx-decode.opc"
+#line 886 "rx-decode.opc"
int rsrc AU = op[2] & 0x0f;
if (trace)
{
@@ -12448,7 +12465,7 @@ rx_decode_opcode (unsigned long pc AU,
printf (" rsrc = 0x%x\n", rsrc);
}
SYNTAX("mvtachi %1, %0");
-#line 885 "rx-decode.opc"
+#line 886 "rx-decode.opc"
ID(mvtachi); DR(a+32); SR(rsrc); F_____;
}
@@ -12456,9 +12473,9 @@ rx_decode_opcode (unsigned long pc AU,
case 0x10:
{
/** 1111 1101 0001 0111 a001 rsrc mvtaclo %1, %0 */
-#line 888 "rx-decode.opc"
+#line 889 "rx-decode.opc"
int a AU = (op[2] >> 7) & 0x01;
-#line 888 "rx-decode.opc"
+#line 889 "rx-decode.opc"
int rsrc AU = op[2] & 0x0f;
if (trace)
{
@@ -12469,7 +12486,7 @@ rx_decode_opcode (unsigned long pc AU,
printf (" rsrc = 0x%x\n", rsrc);
}
SYNTAX("mvtaclo %1, %0");
-#line 888 "rx-decode.opc"
+#line 889 "rx-decode.opc"
ID(mvtaclo); DR(a+32); SR(rsrc); F_____;
}
@@ -12477,9 +12494,9 @@ rx_decode_opcode (unsigned long pc AU,
case 0x30:
{
/** 1111 1101 0001 0111 a011 rsrc mvtacgu %1, %0 */
-#line 1110 "rx-decode.opc"
+#line 1150 "rx-decode.opc"
int a AU = (op[2] >> 7) & 0x01;
-#line 1110 "rx-decode.opc"
+#line 1150 "rx-decode.opc"
int rsrc AU = op[2] & 0x0f;
if (trace)
{
@@ -12490,7 +12507,7 @@ rx_decode_opcode (unsigned long pc AU,
printf (" rsrc = 0x%x\n", rsrc);
}
SYNTAX("mvtacgu %1, %0");
-#line 1110 "rx-decode.opc"
+#line 1150 "rx-decode.opc"
ID(mvtacgu); SR(rsrc); DR(a+32); F_____;
}
@@ -12505,9 +12522,9 @@ rx_decode_opcode (unsigned long pc AU,
case 0x00:
{
/** 1111 1101 0001 1000 a00i 0000 racw #%1, %0 */
-#line 900 "rx-decode.opc"
+#line 901 "rx-decode.opc"
int a AU = (op[2] >> 7) & 0x01;
-#line 900 "rx-decode.opc"
+#line 901 "rx-decode.opc"
int i AU = (op[2] >> 4) & 0x01;
if (trace)
{
@@ -12518,7 +12535,7 @@ rx_decode_opcode (unsigned long pc AU,
printf (" i = 0x%x\n", i);
}
SYNTAX("racw #%1, %0");
-#line 900 "rx-decode.opc"
+#line 901 "rx-decode.opc"
ID(racw); SC(i+1); DR(a+32); F_____;
/*----------------------------------------------------------------------*/
@@ -12529,9 +12546,9 @@ rx_decode_opcode (unsigned long pc AU,
case 0x40:
{
/** 1111 1101 0001 1000 a10i 0000 rdacw #%1, %0 */
-#line 1119 "rx-decode.opc"
+#line 1159 "rx-decode.opc"
int a AU = (op[2] >> 7) & 0x01;
-#line 1119 "rx-decode.opc"
+#line 1159 "rx-decode.opc"
int i AU = (op[2] >> 4) & 0x01;
if (trace)
{
@@ -12542,7 +12559,7 @@ rx_decode_opcode (unsigned long pc AU,
printf (" i = 0x%x\n", i);
}
SYNTAX("rdacw #%1, %0");
-#line 1119 "rx-decode.opc"
+#line 1159 "rx-decode.opc"
ID(rdacw); SC(i+1); DR(a+32); F_____;
}
@@ -12557,9 +12574,9 @@ rx_decode_opcode (unsigned long pc AU,
case 0x00:
{
/** 1111 1101 0001 1001 a00i 0000 racl #%1, %0 */
-#line 1113 "rx-decode.opc"
+#line 1153 "rx-decode.opc"
int a AU = (op[2] >> 7) & 0x01;
-#line 1113 "rx-decode.opc"
+#line 1153 "rx-decode.opc"
int i AU = (op[2] >> 4) & 0x01;
if (trace)
{
@@ -12570,7 +12587,7 @@ rx_decode_opcode (unsigned long pc AU,
printf (" i = 0x%x\n", i);
}
SYNTAX("racl #%1, %0");
-#line 1113 "rx-decode.opc"
+#line 1153 "rx-decode.opc"
ID(racl); SC(i+1); DR(a+32); F_____;
}
@@ -12578,9 +12595,9 @@ rx_decode_opcode (unsigned long pc AU,
case 0x40:
{
/** 1111 1101 0001 1001 a10i 0000 rdacl #%1, %0 */
-#line 1116 "rx-decode.opc"
+#line 1156 "rx-decode.opc"
int a AU = (op[2] >> 7) & 0x01;
-#line 1116 "rx-decode.opc"
+#line 1156 "rx-decode.opc"
int i AU = (op[2] >> 4) & 0x01;
if (trace)
{
@@ -12591,7 +12608,7 @@ rx_decode_opcode (unsigned long pc AU,
printf (" i = 0x%x\n", i);
}
SYNTAX("rdacl #%1, %0");
-#line 1116 "rx-decode.opc"
+#line 1156 "rx-decode.opc"
ID(rdacl); SC(i+1); DR(a+32); F_____;
}
@@ -12607,13 +12624,13 @@ rx_decode_opcode (unsigned long pc AU,
op_semantics_98:
{
/** 1111 1101 0001 111i a m00 rdst mvfachi #%2, %1, %0 */
-#line 891 "rx-decode.opc"
+#line 892 "rx-decode.opc"
int i AU = op[1] & 0x01;
-#line 891 "rx-decode.opc"
+#line 892 "rx-decode.opc"
int a AU = (op[2] >> 7) & 0x01;
-#line 891 "rx-decode.opc"
+#line 892 "rx-decode.opc"
int m AU = (op[2] >> 6) & 0x01;
-#line 891 "rx-decode.opc"
+#line 892 "rx-decode.opc"
int rdst AU = op[2] & 0x0f;
if (trace)
{
@@ -12626,7 +12643,7 @@ rx_decode_opcode (unsigned long pc AU,
printf (" rdst = 0x%x\n", rdst);
}
SYNTAX("mvfachi #%2, %1, %0");
-#line 891 "rx-decode.opc"
+#line 892 "rx-decode.opc"
ID(mvfachi); S2C(((i^1)<<1)|m); SR(a+32); DR(rdst); F_____;
}
@@ -12635,13 +12652,13 @@ rx_decode_opcode (unsigned long pc AU,
op_semantics_99:
{
/** 1111 1101 0001 111i a m01 rdst mvfaclo #%2, %1, %0 */
-#line 897 "rx-decode.opc"
+#line 898 "rx-decode.opc"
int i AU = op[1] & 0x01;
-#line 897 "rx-decode.opc"
+#line 898 "rx-decode.opc"
int a AU = (op[2] >> 7) & 0x01;
-#line 897 "rx-decode.opc"
+#line 898 "rx-decode.opc"
int m AU = (op[2] >> 6) & 0x01;
-#line 897 "rx-decode.opc"
+#line 898 "rx-decode.opc"
int rdst AU = op[2] & 0x0f;
if (trace)
{
@@ -12654,7 +12671,7 @@ rx_decode_opcode (unsigned long pc AU,
printf (" rdst = 0x%x\n", rdst);
}
SYNTAX("mvfaclo #%2, %1, %0");
-#line 897 "rx-decode.opc"
+#line 898 "rx-decode.opc"
ID(mvfaclo); S2C(((i^1)<<1)|m); SR(a+32); DR(rdst); F_____;
}
@@ -12663,13 +12680,13 @@ rx_decode_opcode (unsigned long pc AU,
op_semantics_100:
{
/** 1111 1101 0001 111i a m10 rdst mvfacmi #%2, %1, %0 */
-#line 894 "rx-decode.opc"
+#line 895 "rx-decode.opc"
int i AU = op[1] & 0x01;
-#line 894 "rx-decode.opc"
+#line 895 "rx-decode.opc"
int a AU = (op[2] >> 7) & 0x01;
-#line 894 "rx-decode.opc"
+#line 895 "rx-decode.opc"
int m AU = (op[2] >> 6) & 0x01;
-#line 894 "rx-decode.opc"
+#line 895 "rx-decode.opc"
int rdst AU = op[2] & 0x0f;
if (trace)
{
@@ -12682,7 +12699,7 @@ rx_decode_opcode (unsigned long pc AU,
printf (" rdst = 0x%x\n", rdst);
}
SYNTAX("mvfacmi #%2, %1, %0");
-#line 894 "rx-decode.opc"
+#line 895 "rx-decode.opc"
ID(mvfacmi); S2C(((i^1)<<1)|m); SR(a+32); DR(rdst); F_____;
}
@@ -12691,13 +12708,13 @@ rx_decode_opcode (unsigned long pc AU,
op_semantics_101:
{
/** 1111 1101 0001 111i a m11 rdst mvfacgu #%2, %1, %0 */
-#line 1107 "rx-decode.opc"
+#line 1147 "rx-decode.opc"
int i AU = op[1] & 0x01;
-#line 1107 "rx-decode.opc"
+#line 1147 "rx-decode.opc"
int a AU = (op[2] >> 7) & 0x01;
-#line 1107 "rx-decode.opc"
+#line 1147 "rx-decode.opc"
int m AU = (op[2] >> 6) & 0x01;
-#line 1107 "rx-decode.opc"
+#line 1147 "rx-decode.opc"
int rdst AU = op[2] & 0x0f;
if (trace)
{
@@ -12710,7 +12727,7 @@ rx_decode_opcode (unsigned long pc AU,
printf (" rdst = 0x%x\n", rdst);
}
SYNTAX("mvfacgu #%2, %1, %0");
-#line 1107 "rx-decode.opc"
+#line 1147 "rx-decode.opc"
ID(mvfacgu); S2C(((i^1)<<1)|m); SR(a+32); DR(rdst); F_____;
}
@@ -12743,13 +12760,13 @@ rx_decode_opcode (unsigned long pc AU,
op_semantics_102:
{
/** 1111 1101 0010 0p sz rdst rsrc mov%s %1, %0 */
-#line 369 "rx-decode.opc"
+#line 370 "rx-decode.opc"
int p AU = (op[1] >> 2) & 0x01;
-#line 369 "rx-decode.opc"
+#line 370 "rx-decode.opc"
int sz AU = op[1] & 0x03;
-#line 369 "rx-decode.opc"
+#line 370 "rx-decode.opc"
int rdst AU = (op[2] >> 4) & 0x0f;
-#line 369 "rx-decode.opc"
+#line 370 "rx-decode.opc"
int rsrc AU = op[2] & 0x0f;
if (trace)
{
@@ -12762,7 +12779,7 @@ rx_decode_opcode (unsigned long pc AU,
printf (" rsrc = 0x%x\n", rsrc);
}
SYNTAX("mov%s %1, %0");
-#line 369 "rx-decode.opc"
+#line 370 "rx-decode.opc"
ID(mov); sBWL (sz); SR(rsrc); F_____;
OP(0, p ? RX_Operand_Predec : RX_Operand_Postinc, rdst, 0);
@@ -12822,9 +12839,9 @@ rx_decode_opcode (unsigned long pc AU,
case 0x00:
{
/** 1111 1101 0010 0111 rdst rsrc movco %1, [%0] */
-#line 1071 "rx-decode.opc"
+#line 1111 "rx-decode.opc"
int rdst AU = (op[2] >> 4) & 0x0f;
-#line 1071 "rx-decode.opc"
+#line 1111 "rx-decode.opc"
int rsrc AU = op[2] & 0x0f;
if (trace)
{
@@ -12835,7 +12852,7 @@ rx_decode_opcode (unsigned long pc AU,
printf (" rsrc = 0x%x\n", rsrc);
}
SYNTAX("movco %1, [%0]");
-#line 1071 "rx-decode.opc"
+#line 1111 "rx-decode.opc"
ID(movco); SR(rsrc); DR(rdst); F_____;
}
@@ -12850,13 +12867,13 @@ rx_decode_opcode (unsigned long pc AU,
op_semantics_103:
{
/** 1111 1101 0010 1p sz rsrc rdst mov%s %1, %0 */
-#line 373 "rx-decode.opc"
+#line 374 "rx-decode.opc"
int p AU = (op[1] >> 2) & 0x01;
-#line 373 "rx-decode.opc"
+#line 374 "rx-decode.opc"
int sz AU = op[1] & 0x03;
-#line 373 "rx-decode.opc"
+#line 374 "rx-decode.opc"
int rsrc AU = (op[2] >> 4) & 0x0f;
-#line 373 "rx-decode.opc"
+#line 374 "rx-decode.opc"
int rdst AU = op[2] & 0x0f;
if (trace)
{
@@ -12869,7 +12886,7 @@ rx_decode_opcode (unsigned long pc AU,
printf (" rdst = 0x%x\n", rdst);
}
SYNTAX("mov%s %1, %0");
-#line 373 "rx-decode.opc"
+#line 374 "rx-decode.opc"
ID(mov); sBWL (sz); DR(rdst); F_____;
OP(1, p ? RX_Operand_Predec : RX_Operand_Postinc, rsrc, 0);
@@ -12929,9 +12946,9 @@ rx_decode_opcode (unsigned long pc AU,
case 0x00:
{
/** 1111 1101 0010 1111 rsrc rdst movli [%1], %0 */
-#line 1074 "rx-decode.opc"
+#line 1114 "rx-decode.opc"
int rsrc AU = (op[2] >> 4) & 0x0f;
-#line 1074 "rx-decode.opc"
+#line 1114 "rx-decode.opc"
int rdst AU = op[2] & 0x0f;
if (trace)
{
@@ -12942,7 +12959,7 @@ rx_decode_opcode (unsigned long pc AU,
printf (" rdst = 0x%x\n", rdst);
}
SYNTAX("movli [%1], %0");
-#line 1074 "rx-decode.opc"
+#line 1114 "rx-decode.opc"
ID(movli); SR(rsrc); DR(rdst); F_____;
}
@@ -12957,13 +12974,13 @@ rx_decode_opcode (unsigned long pc AU,
op_semantics_104:
{
/** 1111 1101 0011 1p sz rsrc rdst movu%s %1, %0 */
-#line 383 "rx-decode.opc"
+#line 384 "rx-decode.opc"
int p AU = (op[1] >> 2) & 0x01;
-#line 383 "rx-decode.opc"
+#line 384 "rx-decode.opc"
int sz AU = op[1] & 0x03;
-#line 383 "rx-decode.opc"
+#line 384 "rx-decode.opc"
int rsrc AU = (op[2] >> 4) & 0x0f;
-#line 383 "rx-decode.opc"
+#line 384 "rx-decode.opc"
int rdst AU = op[2] & 0x0f;
if (trace)
{
@@ -12976,7 +12993,7 @@ rx_decode_opcode (unsigned long pc AU,
printf (" rdst = 0x%x\n", rdst);
}
SYNTAX("movu%s %1, %0");
-#line 383 "rx-decode.opc"
+#line 384 "rx-decode.opc"
ID(mov); uBW (sz); DR(rdst); F_____;
OP(1, p ? RX_Operand_Predec : RX_Operand_Postinc, rsrc, 0);
@@ -13040,11 +13057,11 @@ rx_decode_opcode (unsigned long pc AU,
op_semantics_105:
{
/** 1111 1101 0100 a100 srca srcb msbhi %1, %2, %0 */
-#line 1095 "rx-decode.opc"
+#line 1135 "rx-decode.opc"
int a AU = (op[1] >> 3) & 0x01;
-#line 1095 "rx-decode.opc"
+#line 1135 "rx-decode.opc"
int srca AU = (op[2] >> 4) & 0x0f;
-#line 1095 "rx-decode.opc"
+#line 1135 "rx-decode.opc"
int srcb AU = op[2] & 0x0f;
if (trace)
{
@@ -13056,7 +13073,7 @@ rx_decode_opcode (unsigned long pc AU,
printf (" srcb = 0x%x\n", srcb);
}
SYNTAX("msbhi %1, %2, %0");
-#line 1095 "rx-decode.opc"
+#line 1135 "rx-decode.opc"
ID(msbhi); DR(a+32); SR(srca); S2R(srcb); F_____;
}
@@ -13071,11 +13088,11 @@ rx_decode_opcode (unsigned long pc AU,
op_semantics_106:
{
/** 1111 1101 0100 a101 srca srcb msblo %1, %2, %0 */
-#line 1101 "rx-decode.opc"
+#line 1141 "rx-decode.opc"
int a AU = (op[1] >> 3) & 0x01;
-#line 1101 "rx-decode.opc"
+#line 1141 "rx-decode.opc"
int srca AU = (op[2] >> 4) & 0x0f;
-#line 1101 "rx-decode.opc"
+#line 1141 "rx-decode.opc"
int srcb AU = op[2] & 0x0f;
if (trace)
{
@@ -13087,7 +13104,7 @@ rx_decode_opcode (unsigned long pc AU,
printf (" srcb = 0x%x\n", srcb);
}
SYNTAX("msblo %1, %2, %0");
-#line 1101 "rx-decode.opc"
+#line 1141 "rx-decode.opc"
ID(msblo); DR(a+32); SR(srca); S2R(srcb); F_____;
}
@@ -13102,11 +13119,11 @@ rx_decode_opcode (unsigned long pc AU,
op_semantics_107:
{
/** 1111 1101 0100 a110 srca srcb msblh %1, %2, %0 */
-#line 1098 "rx-decode.opc"
+#line 1138 "rx-decode.opc"
int a AU = (op[1] >> 3) & 0x01;
-#line 1098 "rx-decode.opc"
+#line 1138 "rx-decode.opc"
int srca AU = (op[2] >> 4) & 0x0f;
-#line 1098 "rx-decode.opc"
+#line 1138 "rx-decode.opc"
int srcb AU = op[2] & 0x0f;
if (trace)
{
@@ -13118,7 +13135,7 @@ rx_decode_opcode (unsigned long pc AU,
printf (" srcb = 0x%x\n", srcb);
}
SYNTAX("msblh %1, %2, %0");
-#line 1098 "rx-decode.opc"
+#line 1138 "rx-decode.opc"
ID(msblh); DR(a+32); SR(srca); S2R(srcb); F_____;
}
@@ -13133,11 +13150,11 @@ rx_decode_opcode (unsigned long pc AU,
op_semantics_108:
{
/** 1111 1101 0100 a111 srca srcb emsba %1, %2, %0 */
-#line 1086 "rx-decode.opc"
+#line 1126 "rx-decode.opc"
int a AU = (op[1] >> 3) & 0x01;
-#line 1086 "rx-decode.opc"
+#line 1126 "rx-decode.opc"
int srca AU = (op[2] >> 4) & 0x0f;
-#line 1086 "rx-decode.opc"
+#line 1126 "rx-decode.opc"
int srcb AU = op[2] & 0x0f;
if (trace)
{
@@ -13149,7 +13166,7 @@ rx_decode_opcode (unsigned long pc AU,
printf (" srcb = 0x%x\n", srcb);
}
SYNTAX("emsba %1, %2, %0");
-#line 1086 "rx-decode.opc"
+#line 1126 "rx-decode.opc"
ID(emsba); DR(a+32); SR(srca); S2R(srcb); F_____;
}
@@ -13199,9 +13216,9 @@ rx_decode_opcode (unsigned long pc AU,
case 0x00:
{
/** 1111 1101 0110 0000 rsrc rdst shlr %2, %0 */
-#line 754 "rx-decode.opc"
+#line 755 "rx-decode.opc"
int rsrc AU = (op[2] >> 4) & 0x0f;
-#line 754 "rx-decode.opc"
+#line 755 "rx-decode.opc"
int rdst AU = op[2] & 0x0f;
if (trace)
{
@@ -13212,7 +13229,7 @@ rx_decode_opcode (unsigned long pc AU,
printf (" rdst = 0x%x\n", rdst);
}
SYNTAX("shlr %2, %0");
-#line 754 "rx-decode.opc"
+#line 755 "rx-decode.opc"
ID(shlr); S2R(rsrc); SR(rdst); DR(rdst); F__SZC;
}
@@ -13226,9 +13243,9 @@ rx_decode_opcode (unsigned long pc AU,
case 0x00:
{
/** 1111 1101 0110 0001 rsrc rdst shar %2, %0 */
-#line 744 "rx-decode.opc"
+#line 745 "rx-decode.opc"
int rsrc AU = (op[2] >> 4) & 0x0f;
-#line 744 "rx-decode.opc"
+#line 745 "rx-decode.opc"
int rdst AU = op[2] & 0x0f;
if (trace)
{
@@ -13239,7 +13256,7 @@ rx_decode_opcode (unsigned long pc AU,
printf (" rdst = 0x%x\n", rdst);
}
SYNTAX("shar %2, %0");
-#line 744 "rx-decode.opc"
+#line 745 "rx-decode.opc"
ID(shar); S2R(rsrc); SR(rdst); DR(rdst); F_0SZC;
}
@@ -13253,9 +13270,9 @@ rx_decode_opcode (unsigned long pc AU,
case 0x00:
{
/** 1111 1101 0110 0010 rsrc rdst shll %2, %0 */
-#line 734 "rx-decode.opc"
+#line 735 "rx-decode.opc"
int rsrc AU = (op[2] >> 4) & 0x0f;
-#line 734 "rx-decode.opc"
+#line 735 "rx-decode.opc"
int rdst AU = op[2] & 0x0f;
if (trace)
{
@@ -13266,7 +13283,7 @@ rx_decode_opcode (unsigned long pc AU,
printf (" rdst = 0x%x\n", rdst);
}
SYNTAX("shll %2, %0");
-#line 734 "rx-decode.opc"
+#line 735 "rx-decode.opc"
ID(shll); S2R(rsrc); SR(rdst); DR(rdst); F_OSZC;
}
@@ -13280,9 +13297,9 @@ rx_decode_opcode (unsigned long pc AU,
case 0x00:
{
/** 1111 1101 0110 0100 rsrc rdst rotr %1, %0 */
-#line 778 "rx-decode.opc"
+#line 779 "rx-decode.opc"
int rsrc AU = (op[2] >> 4) & 0x0f;
-#line 778 "rx-decode.opc"
+#line 779 "rx-decode.opc"
int rdst AU = op[2] & 0x0f;
if (trace)
{
@@ -13293,7 +13310,7 @@ rx_decode_opcode (unsigned long pc AU,
printf (" rdst = 0x%x\n", rdst);
}
SYNTAX("rotr %1, %0");
-#line 778 "rx-decode.opc"
+#line 779 "rx-decode.opc"
ID(rotr); SR(rsrc); DR(rdst); F__SZC;
}
@@ -13307,9 +13324,9 @@ rx_decode_opcode (unsigned long pc AU,
case 0x00:
{
/** 1111 1101 0110 0101 rsrc rdst revw %1, %0 */
-#line 781 "rx-decode.opc"
+#line 782 "rx-decode.opc"
int rsrc AU = (op[2] >> 4) & 0x0f;
-#line 781 "rx-decode.opc"
+#line 782 "rx-decode.opc"
int rdst AU = op[2] & 0x0f;
if (trace)
{
@@ -13320,7 +13337,7 @@ rx_decode_opcode (unsigned long pc AU,
printf (" rdst = 0x%x\n", rdst);
}
SYNTAX("revw %1, %0");
-#line 781 "rx-decode.opc"
+#line 782 "rx-decode.opc"
ID(revw); SR(rsrc); DR(rdst);
}
@@ -13334,9 +13351,9 @@ rx_decode_opcode (unsigned long pc AU,
case 0x00:
{
/** 1111 1101 0110 0110 rsrc rdst rotl %1, %0 */
-#line 772 "rx-decode.opc"
+#line 773 "rx-decode.opc"
int rsrc AU = (op[2] >> 4) & 0x0f;
-#line 772 "rx-decode.opc"
+#line 773 "rx-decode.opc"
int rdst AU = op[2] & 0x0f;
if (trace)
{
@@ -13347,7 +13364,7 @@ rx_decode_opcode (unsigned long pc AU,
printf (" rdst = 0x%x\n", rdst);
}
SYNTAX("rotl %1, %0");
-#line 772 "rx-decode.opc"
+#line 773 "rx-decode.opc"
ID(rotl); SR(rsrc); DR(rdst); F__SZC;
}
@@ -13361,9 +13378,9 @@ rx_decode_opcode (unsigned long pc AU,
case 0x00:
{
/** 1111 1101 0110 0111 rsrc rdst revl %1, %0 */
-#line 784 "rx-decode.opc"
+#line 785 "rx-decode.opc"
int rsrc AU = (op[2] >> 4) & 0x0f;
-#line 784 "rx-decode.opc"
+#line 785 "rx-decode.opc"
int rdst AU = op[2] & 0x0f;
if (trace)
{
@@ -13374,7 +13391,7 @@ rx_decode_opcode (unsigned long pc AU,
printf (" rdst = 0x%x\n", rdst);
}
SYNTAX("revl %1, %0");
-#line 784 "rx-decode.opc"
+#line 785 "rx-decode.opc"
ID(revl); SR(rsrc); DR(rdst);
/*----------------------------------------------------------------------*/
@@ -13392,11 +13409,11 @@ rx_decode_opcode (unsigned long pc AU,
op_semantics_109:
{
/** 1111 1101 0110 100c rsrc rdst mvtc %1, %0 */
-#line 1035 "rx-decode.opc"
+#line 1060 "rx-decode.opc"
int c AU = op[1] & 0x01;
-#line 1035 "rx-decode.opc"
+#line 1060 "rx-decode.opc"
int rsrc AU = (op[2] >> 4) & 0x0f;
-#line 1035 "rx-decode.opc"
+#line 1060 "rx-decode.opc"
int rdst AU = op[2] & 0x0f;
if (trace)
{
@@ -13408,8 +13425,16 @@ rx_decode_opcode (unsigned long pc AU,
printf (" rdst = 0x%x\n", rdst);
}
SYNTAX("mvtc %1, %0");
-#line 1035 "rx-decode.opc"
+#line 1060 "rx-decode.opc"
+ if (((c*16+rdst) == 1) || ((c*16+rdst) > 0xD || ((c*16+rdst) > 0xC && machine == bfd_mach_rx)))
+ {
+ /* fake a non existent control reg in order not to mess up decoding */
+ ID(mov); SR(rsrc); DR(40);
+ }
+ else
+ {
ID(mov); SR(rsrc); DR(c*16+rdst + 16);
+ }
}
break;
@@ -13432,11 +13457,11 @@ rx_decode_opcode (unsigned long pc AU,
op_semantics_110:
{
/** 1111 1101 0110 101s rsrc rdst mvfc %1, %0 */
-#line 1038 "rx-decode.opc"
+#line 1071 "rx-decode.opc"
int s AU = op[1] & 0x01;
-#line 1038 "rx-decode.opc"
+#line 1071 "rx-decode.opc"
int rsrc AU = (op[2] >> 4) & 0x0f;
-#line 1038 "rx-decode.opc"
+#line 1071 "rx-decode.opc"
int rdst AU = op[2] & 0x0f;
if (trace)
{
@@ -13448,9 +13473,16 @@ rx_decode_opcode (unsigned long pc AU,
printf (" rdst = 0x%x\n", rdst);
}
SYNTAX("mvfc %1, %0");
-#line 1038 "rx-decode.opc"
+#line 1071 "rx-decode.opc"
+ if ((s*16+rsrc) > 0xD || ((s*16+rsrc) > 0xC && machine == bfd_mach_rx))
+ {
+ /* fake a non existent control reg in order not to mess up decoding */
+ ID(mov); SR(40); DR(rdst);
+ }
+ else
+ {
ID(mov); SR((s*16+rsrc) + 16); DR(rdst);
-
+ }
/*----------------------------------------------------------------------*/
/* INTERRUPTS */
@@ -13475,11 +13507,11 @@ rx_decode_opcode (unsigned long pc AU,
op_semantics_111:
{
/** 1111 1101 0110 110i mmmm rdst rotr #%1, %0 */
-#line 775 "rx-decode.opc"
+#line 776 "rx-decode.opc"
int i AU = op[1] & 0x01;
-#line 775 "rx-decode.opc"
+#line 776 "rx-decode.opc"
int mmmm AU = (op[2] >> 4) & 0x0f;
-#line 775 "rx-decode.opc"
+#line 776 "rx-decode.opc"
int rdst AU = op[2] & 0x0f;
if (trace)
{
@@ -13491,7 +13523,7 @@ rx_decode_opcode (unsigned long pc AU,
printf (" rdst = 0x%x\n", rdst);
}
SYNTAX("rotr #%1, %0");
-#line 775 "rx-decode.opc"
+#line 776 "rx-decode.opc"
ID(rotr); SC(i*16+mmmm); DR(rdst); F__SZC;
}
@@ -13515,11 +13547,11 @@ rx_decode_opcode (unsigned long pc AU,
op_semantics_112:
{
/** 1111 1101 0110 111i mmmm rdst rotl #%1, %0 */
-#line 769 "rx-decode.opc"
+#line 770 "rx-decode.opc"
int i AU = op[1] & 0x01;
-#line 769 "rx-decode.opc"
+#line 770 "rx-decode.opc"
int mmmm AU = (op[2] >> 4) & 0x0f;
-#line 769 "rx-decode.opc"
+#line 770 "rx-decode.opc"
int rdst AU = op[2] & 0x0f;
if (trace)
{
@@ -13531,7 +13563,7 @@ rx_decode_opcode (unsigned long pc AU,
printf (" rdst = 0x%x\n", rdst);
}
SYNTAX("rotl #%1, %0");
-#line 769 "rx-decode.opc"
+#line 770 "rx-decode.opc"
ID(rotl); SC(i*16+mmmm); DR(rdst); F__SZC;
}
@@ -13555,9 +13587,9 @@ rx_decode_opcode (unsigned long pc AU,
op_semantics_113:
{
/** 1111 1101 0111 im00 0010rdst adc #%1, %0 */
-#line 513 "rx-decode.opc"
+#line 514 "rx-decode.opc"
int im AU = (op[1] >> 2) & 0x03;
-#line 513 "rx-decode.opc"
+#line 514 "rx-decode.opc"
int rdst AU = op[2] & 0x0f;
if (trace)
{
@@ -13568,7 +13600,7 @@ rx_decode_opcode (unsigned long pc AU,
printf (" rdst = 0x%x\n", rdst);
}
SYNTAX("adc #%1, %0");
-#line 513 "rx-decode.opc"
+#line 514 "rx-decode.opc"
ID(adc); SC(IMMex(im)); DR(rdst); F_OSZC;
}
@@ -13577,9 +13609,9 @@ rx_decode_opcode (unsigned long pc AU,
op_semantics_114:
{
/** 1111 1101 0111 im00 0100rdst max #%1, %0 */
-#line 595 "rx-decode.opc"
+#line 596 "rx-decode.opc"
int im AU = (op[1] >> 2) & 0x03;
-#line 595 "rx-decode.opc"
+#line 596 "rx-decode.opc"
int rdst AU = op[2] & 0x0f;
if (trace)
{
@@ -13590,7 +13622,7 @@ rx_decode_opcode (unsigned long pc AU,
printf (" rdst = 0x%x\n", rdst);
}
SYNTAX("max #%1, %0");
-#line 595 "rx-decode.opc"
+#line 596 "rx-decode.opc"
int val = IMMex (im);
if (im == 0 && (unsigned) val == 0x80000000 && rdst == 0)
{
@@ -13609,9 +13641,9 @@ rx_decode_opcode (unsigned long pc AU,
op_semantics_115:
{
/** 1111 1101 0111 im00 0101rdst min #%1, %0 */
-#line 625 "rx-decode.opc"
+#line 626 "rx-decode.opc"
int im AU = (op[1] >> 2) & 0x03;
-#line 625 "rx-decode.opc"
+#line 626 "rx-decode.opc"
int rdst AU = op[2] & 0x0f;
if (trace)
{
@@ -13622,7 +13654,7 @@ rx_decode_opcode (unsigned long pc AU,
printf (" rdst = 0x%x\n", rdst);
}
SYNTAX("min #%1, %0");
-#line 625 "rx-decode.opc"
+#line 626 "rx-decode.opc"
ID(min); DR(rdst); SC(IMMex(im));
}
@@ -13631,9 +13663,9 @@ rx_decode_opcode (unsigned long pc AU,
op_semantics_116:
{
/** 1111 1101 0111 im00 0110rdst emul #%1, %0 */
-#line 683 "rx-decode.opc"
+#line 684 "rx-decode.opc"
int im AU = (op[1] >> 2) & 0x03;
-#line 683 "rx-decode.opc"
+#line 684 "rx-decode.opc"
int rdst AU = op[2] & 0x0f;
if (trace)
{
@@ -13644,7 +13676,7 @@ rx_decode_opcode (unsigned long pc AU,
printf (" rdst = 0x%x\n", rdst);
}
SYNTAX("emul #%1, %0");
-#line 683 "rx-decode.opc"
+#line 684 "rx-decode.opc"
ID(emul); DR(rdst); SC(IMMex(im));
}
@@ -13653,9 +13685,9 @@ rx_decode_opcode (unsigned long pc AU,
op_semantics_117:
{
/** 1111 1101 0111 im00 0111rdst emulu #%1, %0 */
-#line 695 "rx-decode.opc"
+#line 696 "rx-decode.opc"
int im AU = (op[1] >> 2) & 0x03;
-#line 695 "rx-decode.opc"
+#line 696 "rx-decode.opc"
int rdst AU = op[2] & 0x0f;
if (trace)
{
@@ -13666,7 +13698,7 @@ rx_decode_opcode (unsigned long pc AU,
printf (" rdst = 0x%x\n", rdst);
}
SYNTAX("emulu #%1, %0");
-#line 695 "rx-decode.opc"
+#line 696 "rx-decode.opc"
ID(emulu); DR(rdst); SC(IMMex(im));
}
@@ -13675,9 +13707,9 @@ rx_decode_opcode (unsigned long pc AU,
op_semantics_118:
{
/** 1111 1101 0111 im00 1000rdst div #%1, %0 */
-#line 707 "rx-decode.opc"
+#line 708 "rx-decode.opc"
int im AU = (op[1] >> 2) & 0x03;
-#line 707 "rx-decode.opc"
+#line 708 "rx-decode.opc"
int rdst AU = op[2] & 0x0f;
if (trace)
{
@@ -13688,7 +13720,7 @@ rx_decode_opcode (unsigned long pc AU,
printf (" rdst = 0x%x\n", rdst);
}
SYNTAX("div #%1, %0");
-#line 707 "rx-decode.opc"
+#line 708 "rx-decode.opc"
ID(div); DR(rdst); SC(IMMex(im)); F_O___;
}
@@ -13697,9 +13729,9 @@ rx_decode_opcode (unsigned long pc AU,
op_semantics_119:
{
/** 1111 1101 0111 im00 1001rdst divu #%1, %0 */
-#line 719 "rx-decode.opc"
+#line 720 "rx-decode.opc"
int im AU = (op[1] >> 2) & 0x03;
-#line 719 "rx-decode.opc"
+#line 720 "rx-decode.opc"
int rdst AU = op[2] & 0x0f;
if (trace)
{
@@ -13710,7 +13742,7 @@ rx_decode_opcode (unsigned long pc AU,
printf (" rdst = 0x%x\n", rdst);
}
SYNTAX("divu #%1, %0");
-#line 719 "rx-decode.opc"
+#line 720 "rx-decode.opc"
ID(divu); DR(rdst); SC(IMMex(im)); F_O___;
}
@@ -13719,9 +13751,9 @@ rx_decode_opcode (unsigned long pc AU,
op_semantics_120:
{
/** 1111 1101 0111 im00 1100rdst tst #%1, %2 */
-#line 492 "rx-decode.opc"
+#line 493 "rx-decode.opc"
int im AU = (op[1] >> 2) & 0x03;
-#line 492 "rx-decode.opc"
+#line 493 "rx-decode.opc"
int rdst AU = op[2] & 0x0f;
if (trace)
{
@@ -13732,7 +13764,7 @@ rx_decode_opcode (unsigned long pc AU,
printf (" rdst = 0x%x\n", rdst);
}
SYNTAX("tst #%1, %2");
-#line 492 "rx-decode.opc"
+#line 493 "rx-decode.opc"
ID(and); SC(IMMex(im)); S2R(rdst); F__SZ_;
}
@@ -13741,9 +13773,9 @@ rx_decode_opcode (unsigned long pc AU,
op_semantics_121:
{
/** 1111 1101 0111 im00 1101rdst xor #%1, %0 */
-#line 471 "rx-decode.opc"
+#line 472 "rx-decode.opc"
int im AU = (op[1] >> 2) & 0x03;
-#line 471 "rx-decode.opc"
+#line 472 "rx-decode.opc"
int rdst AU = op[2] & 0x0f;
if (trace)
{
@@ -13754,7 +13786,7 @@ rx_decode_opcode (unsigned long pc AU,
printf (" rdst = 0x%x\n", rdst);
}
SYNTAX("xor #%1, %0");
-#line 471 "rx-decode.opc"
+#line 472 "rx-decode.opc"
ID(xor); SC(IMMex(im)); DR(rdst); F__SZ_;
}
@@ -13763,9 +13795,9 @@ rx_decode_opcode (unsigned long pc AU,
op_semantics_122:
{
/** 1111 1101 0111 im00 1110rdst stz #%1, %0 */
-#line 417 "rx-decode.opc"
+#line 418 "rx-decode.opc"
int im AU = (op[1] >> 2) & 0x03;
-#line 417 "rx-decode.opc"
+#line 418 "rx-decode.opc"
int rdst AU = op[2] & 0x0f;
if (trace)
{
@@ -13776,7 +13808,7 @@ rx_decode_opcode (unsigned long pc AU,
printf (" rdst = 0x%x\n", rdst);
}
SYNTAX("stz #%1, %0");
-#line 417 "rx-decode.opc"
+#line 418 "rx-decode.opc"
ID(stcc); SC(IMMex(im)); DR(rdst); S2cc(RXC_z);
}
@@ -13785,9 +13817,9 @@ rx_decode_opcode (unsigned long pc AU,
op_semantics_123:
{
/** 1111 1101 0111 im00 1111rdst stnz #%1, %0 */
-#line 420 "rx-decode.opc"
+#line 421 "rx-decode.opc"
int im AU = (op[1] >> 2) & 0x03;
-#line 420 "rx-decode.opc"
+#line 421 "rx-decode.opc"
int rdst AU = op[2] & 0x0f;
if (trace)
{
@@ -13798,7 +13830,7 @@ rx_decode_opcode (unsigned long pc AU,
printf (" rdst = 0x%x\n", rdst);
}
SYNTAX("stnz #%1, %0");
-#line 420 "rx-decode.opc"
+#line 421 "rx-decode.opc"
ID(stcc); SC(IMMex(im)); DR(rdst); S2cc(RXC_nz);
/*----------------------------------------------------------------------*/
@@ -13816,7 +13848,7 @@ rx_decode_opcode (unsigned long pc AU,
case 0x00:
{
/** 1111 1101 0111 0010 0000 rdst fsub #%1, %0 */
-#line 927 "rx-decode.opc"
+#line 928 "rx-decode.opc"
int rdst AU = op[2] & 0x0f;
if (trace)
{
@@ -13826,7 +13858,7 @@ rx_decode_opcode (unsigned long pc AU,
printf (" rdst = 0x%x\n", rdst);
}
SYNTAX("fsub #%1, %0");
-#line 927 "rx-decode.opc"
+#line 928 "rx-decode.opc"
ID(fsub); DR(rdst); SC(IMM(0)); F__SZ_;
}
@@ -13834,7 +13866,7 @@ rx_decode_opcode (unsigned long pc AU,
case 0x10:
{
/** 1111 1101 0111 0010 0001 rdst fcmp #%1, %0 */
-#line 921 "rx-decode.opc"
+#line 922 "rx-decode.opc"
int rdst AU = op[2] & 0x0f;
if (trace)
{
@@ -13844,7 +13876,7 @@ rx_decode_opcode (unsigned long pc AU,
printf (" rdst = 0x%x\n", rdst);
}
SYNTAX("fcmp #%1, %0");
-#line 921 "rx-decode.opc"
+#line 922 "rx-decode.opc"
ID(fcmp); DR(rdst); SC(IMM(0)); F_OSZ_;
}
@@ -13852,7 +13884,7 @@ rx_decode_opcode (unsigned long pc AU,
case 0x20:
{
/** 1111 1101 0111 0010 0010 rdst fadd #%1, %0 */
-#line 915 "rx-decode.opc"
+#line 916 "rx-decode.opc"
int rdst AU = op[2] & 0x0f;
if (trace)
{
@@ -13862,7 +13894,7 @@ rx_decode_opcode (unsigned long pc AU,
printf (" rdst = 0x%x\n", rdst);
}
SYNTAX("fadd #%1, %0");
-#line 915 "rx-decode.opc"
+#line 916 "rx-decode.opc"
ID(fadd); DR(rdst); SC(IMM(0)); F__SZ_;
}
@@ -13870,7 +13902,7 @@ rx_decode_opcode (unsigned long pc AU,
case 0x30:
{
/** 1111 1101 0111 0010 0011 rdst fmul #%1, %0 */
-#line 936 "rx-decode.opc"
+#line 937 "rx-decode.opc"
int rdst AU = op[2] & 0x0f;
if (trace)
{
@@ -13880,7 +13912,7 @@ rx_decode_opcode (unsigned long pc AU,
printf (" rdst = 0x%x\n", rdst);
}
SYNTAX("fmul #%1, %0");
-#line 936 "rx-decode.opc"
+#line 937 "rx-decode.opc"
ID(fmul); DR(rdst); SC(IMM(0)); F__SZ_;
}
@@ -13888,7 +13920,7 @@ rx_decode_opcode (unsigned long pc AU,
case 0x40:
{
/** 1111 1101 0111 0010 0100 rdst fdiv #%1, %0 */
-#line 942 "rx-decode.opc"
+#line 943 "rx-decode.opc"
int rdst AU = op[2] & 0x0f;
if (trace)
{
@@ -13898,7 +13930,7 @@ rx_decode_opcode (unsigned long pc AU,
printf (" rdst = 0x%x\n", rdst);
}
SYNTAX("fdiv #%1, %0");
-#line 942 "rx-decode.opc"
+#line 943 "rx-decode.opc"
ID(fdiv); DR(rdst); SC(IMM(0)); F__SZ_;
}
@@ -13913,22 +13945,33 @@ rx_decode_opcode (unsigned long pc AU,
case 0x00:
op_semantics_124:
{
- /** 1111 1101 0111 im11 000crdst mvtc #%1, %0 */
-#line 1032 "rx-decode.opc"
+ /** 1111 1101 0111 im11 000c rdst mvtc #%1, %0 */
+#line 1049 "rx-decode.opc"
int im AU = (op[1] >> 2) & 0x03;
-#line 1032 "rx-decode.opc"
- int crdst AU = op[2] & 0x1f;
+#line 1049 "rx-decode.opc"
+ int c AU = (op[2] >> 4) & 0x01;
+#line 1049 "rx-decode.opc"
+ int rdst AU = op[2] & 0x0f;
if (trace)
{
printf ("\033[33m%s\033[0m %02x %02x %02x\n",
- "/** 1111 1101 0111 im11 000crdst mvtc #%1, %0 */",
+ "/** 1111 1101 0111 im11 000c rdst mvtc #%1, %0 */",
op[0], op[1], op[2]);
printf (" im = 0x%x,", im);
- printf (" crdst = 0x%x\n", crdst);
+ printf (" c = 0x%x,", c);
+ printf (" rdst = 0x%x\n", rdst);
}
SYNTAX("mvtc #%1, %0");
-#line 1032 "rx-decode.opc"
- ID(mov); SC(IMMex(im)); DR(crdst + 16);
+#line 1049 "rx-decode.opc"
+ if (((c*16+rdst) == 1) || ((c*16+rdst) > 0xD || ((c*16+rdst) > 0xC && machine == bfd_mach_rx)))
+ {
+ /* fake a non existent control reg in order not to mess up decoding */
+ ID(mov); SC(IMMex(im)); DR(40);
+ }
+ else
+ {
+ ID(mov); SC(IMMex(im)); DR(c*16+rdst + 16);
+ }
}
break;
@@ -13987,9 +14030,9 @@ rx_decode_opcode (unsigned long pc AU,
op_semantics_125:
{
/** 1111 1101 0111 0101 1000 rdst rsrc 0000 dmov.l %1, %0 */
-#line 1176 "rx-decode.opc"
+#line 1216 "rx-decode.opc"
int rdst AU = op[2] & 0x0f;
-#line 1176 "rx-decode.opc"
+#line 1216 "rx-decode.opc"
int rsrc AU = (op[3] >> 4) & 0x0f;
if (trace)
{
@@ -14000,7 +14043,7 @@ rx_decode_opcode (unsigned long pc AU,
printf (" rsrc = 0x%x\n", rsrc);
}
SYNTAX("dmov.l %1, %0");
-#line 1176 "rx-decode.opc"
+#line 1216 "rx-decode.opc"
ID(dmov); DR(rdst); SDRL(rsrc); F_____;
}
@@ -14009,9 +14052,9 @@ rx_decode_opcode (unsigned long pc AU,
op_semantics_126:
{
/** 1111 1101 0111 0101 1000 rdst rsrc 0010 dmov.l %1, %0 */
-#line 1173 "rx-decode.opc"
+#line 1213 "rx-decode.opc"
int rdst AU = op[2] & 0x0f;
-#line 1173 "rx-decode.opc"
+#line 1213 "rx-decode.opc"
int rsrc AU = (op[3] >> 4) & 0x0f;
if (trace)
{
@@ -14022,7 +14065,7 @@ rx_decode_opcode (unsigned long pc AU,
printf (" rsrc = 0x%x\n", rsrc);
}
SYNTAX("dmov.l %1, %0");
-#line 1173 "rx-decode.opc"
+#line 1213 "rx-decode.opc"
ID(dmov); DR(rdst); SDRH(rsrc); F_____;
}
@@ -14031,9 +14074,9 @@ rx_decode_opcode (unsigned long pc AU,
op_semantics_127:
{
/** 1111 1101 0111 0101 1000 rdst rsrc 0100 mvfdc %1, %0 */
-#line 1226 "rx-decode.opc"
+#line 1266 "rx-decode.opc"
int rdst AU = op[2] & 0x0f;
-#line 1226 "rx-decode.opc"
+#line 1266 "rx-decode.opc"
int rsrc AU = (op[3] >> 4) & 0x0f;
if (trace)
{
@@ -14044,7 +14087,7 @@ rx_decode_opcode (unsigned long pc AU,
printf (" rsrc = 0x%x\n", rsrc);
}
SYNTAX("mvfdc %1, %0");
-#line 1226 "rx-decode.opc"
+#line 1266 "rx-decode.opc"
ID(mvfdc); DR(rdst); SCR(rsrc); F_____;
}
@@ -14307,7 +14350,7 @@ rx_decode_opcode (unsigned long pc AU,
op_semantics_128:
{
/** 1111 1101 0111 0110 1100 rsrc 0000 0000 save %1 */
-#line 1161 "rx-decode.opc"
+#line 1201 "rx-decode.opc"
int rsrc AU = op[2] & 0x0f;
if (trace)
{
@@ -14317,7 +14360,7 @@ rx_decode_opcode (unsigned long pc AU,
printf (" rsrc = 0x%x\n", rsrc);
}
SYNTAX("save %1");
-#line 1161 "rx-decode.opc"
+#line 1201 "rx-decode.opc"
ID(save); SR(rsrc); F_____;
}
@@ -14483,7 +14526,7 @@ rx_decode_opcode (unsigned long pc AU,
op_semantics_129:
{
/** 1111 1101 0111 0110 1101 rsrc 0000 0000 rstr %1 */
-#line 1155 "rx-decode.opc"
+#line 1195 "rx-decode.opc"
int rsrc AU = op[2] & 0x0f;
if (trace)
{
@@ -14493,7 +14536,7 @@ rx_decode_opcode (unsigned long pc AU,
printf (" rsrc = 0x%x\n", rsrc);
}
SYNTAX("rstr %1");
-#line 1155 "rx-decode.opc"
+#line 1195 "rx-decode.opc"
ID(rstr); SR(rsrc); F_____;
}
@@ -14661,7 +14704,7 @@ rx_decode_opcode (unsigned long pc AU,
op[0], op[1], op[2]);
}
SYNTAX("save #%1");
-#line 1164 "rx-decode.opc"
+#line 1204 "rx-decode.opc"
ID(save); SC(IMM(1)); F_____;
}
@@ -14676,7 +14719,7 @@ rx_decode_opcode (unsigned long pc AU,
op[0], op[1], op[2]);
}
SYNTAX("rstr #%1");
-#line 1158 "rx-decode.opc"
+#line 1198 "rx-decode.opc"
ID(rstr); SC(IMM(1)); F_____;
}
@@ -14730,9 +14773,9 @@ rx_decode_opcode (unsigned long pc AU,
op_semantics_130:
{
/** 1111 1101 0111 0111 1000 rsrc rdst 0000 dmov.l %1, %0 */
-#line 1170 "rx-decode.opc"
+#line 1210 "rx-decode.opc"
int rsrc AU = op[2] & 0x0f;
-#line 1170 "rx-decode.opc"
+#line 1210 "rx-decode.opc"
int rdst AU = (op[3] >> 4) & 0x0f;
if (trace)
{
@@ -14743,7 +14786,7 @@ rx_decode_opcode (unsigned long pc AU,
printf (" rdst = 0x%x\n", rdst);
}
SYNTAX("dmov.l %1, %0");
-#line 1170 "rx-decode.opc"
+#line 1210 "rx-decode.opc"
ID(dmov); DDRL(rdst); SR(rsrc); F_____;
}
@@ -14753,11 +14796,11 @@ rx_decode_opcode (unsigned long pc AU,
op_semantics_131:
{
/** 1111 1101 0111 0111 1000 rsrc rdst 001s dmov%s %1, %0 */
-#line 1167 "rx-decode.opc"
+#line 1207 "rx-decode.opc"
int rsrc AU = op[2] & 0x0f;
-#line 1167 "rx-decode.opc"
+#line 1207 "rx-decode.opc"
int rdst AU = (op[3] >> 4) & 0x0f;
-#line 1167 "rx-decode.opc"
+#line 1207 "rx-decode.opc"
int s AU = op[3] & 0x01;
if (trace)
{
@@ -14769,7 +14812,7 @@ rx_decode_opcode (unsigned long pc AU,
printf (" s = 0x%x\n", s);
}
SYNTAX("dmov%s %1, %0");
-#line 1167 "rx-decode.opc"
+#line 1207 "rx-decode.opc"
ID(dmov); DDRH(rdst); SR(rsrc); DL(s); F_____;
}
@@ -14777,22 +14820,22 @@ rx_decode_opcode (unsigned long pc AU,
case 0x04:
op_semantics_132:
{
- /** 1111 1101 0111 0111 1000 rdst rsrc 0100 mvtdc %1, %0 */
-#line 1232 "rx-decode.opc"
- int rdst AU = op[2] & 0x0f;
-#line 1232 "rx-decode.opc"
- int rsrc AU = (op[3] >> 4) & 0x0f;
+ /** 1111 1101 0111 0111 1000 rsrc rdst 0100 mvtdc %1, %0 */
+#line 1272 "rx-decode.opc"
+ int rsrc AU = op[2] & 0x0f;
+#line 1272 "rx-decode.opc"
+ int rdst AU = (op[3] >> 4) & 0x0f;
if (trace)
{
printf ("\033[33m%s\033[0m %02x %02x %02x %02x\n",
- "/** 1111 1101 0111 0111 1000 rdst rsrc 0100 mvtdc %1, %0 */",
+ "/** 1111 1101 0111 0111 1000 rsrc rdst 0100 mvtdc %1, %0 */",
op[0], op[1], op[2], op[3]);
- printf (" rdst = 0x%x,", rdst);
- printf (" rsrc = 0x%x\n", rsrc);
+ printf (" rsrc = 0x%x,", rsrc);
+ printf (" rdst = 0x%x\n", rdst);
}
SYNTAX("mvtdc %1, %0");
-#line 1232 "rx-decode.opc"
- ID(mvtdc); DCR(rdst); SR(rsrc); F_____;
+#line 1272 "rx-decode.opc"
+ ID(mvtdc); SR(rsrc); DCR(rdst); F_____;
}
break;
@@ -14800,9 +14843,9 @@ rx_decode_opcode (unsigned long pc AU,
op_semantics_133:
{
/** 1111 1101 0111 0111 1000 rsrc rdst 1001 itod %1, %0 */
-#line 1274 "rx-decode.opc"
+#line 1314 "rx-decode.opc"
int rsrc AU = op[2] & 0x0f;
-#line 1274 "rx-decode.opc"
+#line 1314 "rx-decode.opc"
int rdst AU = (op[3] >> 4) & 0x0f;
if (trace)
{
@@ -14813,7 +14856,7 @@ rx_decode_opcode (unsigned long pc AU,
printf (" rdst = 0x%x\n", rdst);
}
SYNTAX("itod %1, %0");
-#line 1274 "rx-decode.opc"
+#line 1314 "rx-decode.opc"
ID(itod); DDR(rdst); SR(rsrc); F_____;
}
@@ -14822,9 +14865,9 @@ rx_decode_opcode (unsigned long pc AU,
op_semantics_134:
{
/** 1111 1101 0111 0111 1000 rsrc rdst 1010 ftod %1, %0 */
-#line 1271 "rx-decode.opc"
+#line 1311 "rx-decode.opc"
int rsrc AU = op[2] & 0x0f;
-#line 1271 "rx-decode.opc"
+#line 1311 "rx-decode.opc"
int rdst AU = (op[3] >> 4) & 0x0f;
if (trace)
{
@@ -14835,7 +14878,7 @@ rx_decode_opcode (unsigned long pc AU,
printf (" rdst = 0x%x\n", rdst);
}
SYNTAX("ftod %1, %0");
-#line 1271 "rx-decode.opc"
+#line 1311 "rx-decode.opc"
ID(ftod); DDR(rdst); SR(rsrc); F_____;
}
@@ -14844,9 +14887,9 @@ rx_decode_opcode (unsigned long pc AU,
op_semantics_135:
{
/** 1111 1101 0111 0111 1000 rsrc rdst 1101 utod %1, %0 */
-#line 1277 "rx-decode.opc"
+#line 1317 "rx-decode.opc"
int rsrc AU = op[2] & 0x0f;
-#line 1277 "rx-decode.opc"
+#line 1317 "rx-decode.opc"
int rdst AU = (op[3] >> 4) & 0x0f;
if (trace)
{
@@ -14857,7 +14900,7 @@ rx_decode_opcode (unsigned long pc AU,
printf (" rdst = 0x%x\n", rdst);
}
SYNTAX("utod %1, %0");
-#line 1277 "rx-decode.opc"
+#line 1317 "rx-decode.opc"
ID(dsqrt); DDR(rdst); SR(rsrc); F_____;
}
@@ -15366,11 +15409,11 @@ rx_decode_opcode (unsigned long pc AU,
op_semantics_136:
{
/** 1111 1101 100immmm rsrc rdst shlr #%2, %1, %0 */
-#line 757 "rx-decode.opc"
+#line 758 "rx-decode.opc"
int immmm AU = op[1] & 0x1f;
-#line 757 "rx-decode.opc"
+#line 758 "rx-decode.opc"
int rsrc AU = (op[2] >> 4) & 0x0f;
-#line 757 "rx-decode.opc"
+#line 758 "rx-decode.opc"
int rdst AU = op[2] & 0x0f;
if (trace)
{
@@ -15382,7 +15425,7 @@ rx_decode_opcode (unsigned long pc AU,
printf (" rdst = 0x%x\n", rdst);
}
SYNTAX("shlr #%2, %1, %0");
-#line 757 "rx-decode.opc"
+#line 758 "rx-decode.opc"
ID(shlr); S2C(immmm); SR(rsrc); DR(rdst); F__SZC;
/*----------------------------------------------------------------------*/
@@ -15679,11 +15722,11 @@ rx_decode_opcode (unsigned long pc AU,
op_semantics_137:
{
/** 1111 1101 101immmm rsrc rdst shar #%2, %1, %0 */
-#line 747 "rx-decode.opc"
+#line 748 "rx-decode.opc"
int immmm AU = op[1] & 0x1f;
-#line 747 "rx-decode.opc"
+#line 748 "rx-decode.opc"
int rsrc AU = (op[2] >> 4) & 0x0f;
-#line 747 "rx-decode.opc"
+#line 748 "rx-decode.opc"
int rdst AU = op[2] & 0x0f;
if (trace)
{
@@ -15695,7 +15738,7 @@ rx_decode_opcode (unsigned long pc AU,
printf (" rdst = 0x%x\n", rdst);
}
SYNTAX("shar #%2, %1, %0");
-#line 747 "rx-decode.opc"
+#line 748 "rx-decode.opc"
ID(shar); S2C(immmm); SR(rsrc); DR(rdst); F_0SZC;
@@ -15990,11 +16033,11 @@ rx_decode_opcode (unsigned long pc AU,
op_semantics_138:
{
/** 1111 1101 110immmm rsrc rdst shll #%2, %1, %0 */
-#line 737 "rx-decode.opc"
+#line 738 "rx-decode.opc"
int immmm AU = op[1] & 0x1f;
-#line 737 "rx-decode.opc"
+#line 738 "rx-decode.opc"
int rsrc AU = (op[2] >> 4) & 0x0f;
-#line 737 "rx-decode.opc"
+#line 738 "rx-decode.opc"
int rdst AU = op[2] & 0x0f;
if (trace)
{
@@ -16006,7 +16049,7 @@ rx_decode_opcode (unsigned long pc AU,
printf (" rdst = 0x%x\n", rdst);
}
SYNTAX("shll #%2, %1, %0");
-#line 737 "rx-decode.opc"
+#line 738 "rx-decode.opc"
ID(shll); S2C(immmm); SR(rsrc); DR(rdst); F_OSZC;
@@ -16315,11 +16358,11 @@ rx_decode_opcode (unsigned long pc AU,
op_semantics_139:
{
/** 1111 1101 111 bittt cond rdst bm%2 #%1, %0%S0 */
-#line 1011 "rx-decode.opc"
+#line 1012 "rx-decode.opc"
int bittt AU = op[1] & 0x1f;
-#line 1011 "rx-decode.opc"
+#line 1012 "rx-decode.opc"
int cond AU = (op[2] >> 4) & 0x0f;
-#line 1011 "rx-decode.opc"
+#line 1012 "rx-decode.opc"
int rdst AU = op[2] & 0x0f;
if (trace)
{
@@ -16331,7 +16374,7 @@ rx_decode_opcode (unsigned long pc AU,
printf (" rdst = 0x%x\n", rdst);
}
SYNTAX("bm%2 #%1, %0%S0");
-#line 1011 "rx-decode.opc"
+#line 1012 "rx-decode.opc"
ID(bmcc); BWL(LSIZE); S2cc(cond); SC(bittt); DR(rdst);
/*----------------------------------------------------------------------*/
@@ -16343,9 +16386,9 @@ rx_decode_opcode (unsigned long pc AU,
op_semantics_140:
{
/** 1111 1101 111bittt 1111 rdst bnot #%1, %0 */
-#line 1004 "rx-decode.opc"
+#line 1005 "rx-decode.opc"
int bittt AU = op[1] & 0x1f;
-#line 1004 "rx-decode.opc"
+#line 1005 "rx-decode.opc"
int rdst AU = op[2] & 0x0f;
if (trace)
{
@@ -16356,7 +16399,7 @@ rx_decode_opcode (unsigned long pc AU,
printf (" rdst = 0x%x\n", rdst);
}
SYNTAX("bnot #%1, %0");
-#line 1004 "rx-decode.opc"
+#line 1005 "rx-decode.opc"
ID(bnot); BWL(LSIZE); SC(bittt); DR(rdst);
@@ -17185,13 +17228,13 @@ rx_decode_opcode (unsigned long pc AU,
op_semantics_141:
{
/** 1111 1110 00sz isrc bsrc rdst mov%s %0, [%1, %2] */
-#line 363 "rx-decode.opc"
+#line 364 "rx-decode.opc"
int sz AU = (op[1] >> 4) & 0x03;
-#line 363 "rx-decode.opc"
+#line 364 "rx-decode.opc"
int isrc AU = op[1] & 0x0f;
-#line 363 "rx-decode.opc"
+#line 364 "rx-decode.opc"
int bsrc AU = (op[2] >> 4) & 0x0f;
-#line 363 "rx-decode.opc"
+#line 364 "rx-decode.opc"
int rdst AU = op[2] & 0x0f;
if (trace)
{
@@ -17204,7 +17247,7 @@ rx_decode_opcode (unsigned long pc AU,
printf (" rdst = 0x%x\n", rdst);
}
SYNTAX("mov%s %0, [%1, %2]");
-#line 363 "rx-decode.opc"
+#line 364 "rx-decode.opc"
ID(movbir); sBWL(sz); DR(rdst); SRR(isrc); S2R(bsrc); F_____;
}
@@ -17642,13 +17685,13 @@ rx_decode_opcode (unsigned long pc AU,
op_semantics_142:
{
/** 1111 1110 01sz isrc bsrc rdst mov%s [%1, %2], %0 */
-#line 360 "rx-decode.opc"
+#line 361 "rx-decode.opc"
int sz AU = (op[1] >> 4) & 0x03;
-#line 360 "rx-decode.opc"
+#line 361 "rx-decode.opc"
int isrc AU = op[1] & 0x0f;
-#line 360 "rx-decode.opc"
+#line 361 "rx-decode.opc"
int bsrc AU = (op[2] >> 4) & 0x0f;
-#line 360 "rx-decode.opc"
+#line 361 "rx-decode.opc"
int rdst AU = op[2] & 0x0f;
if (trace)
{
@@ -17661,7 +17704,7 @@ rx_decode_opcode (unsigned long pc AU,
printf (" rdst = 0x%x\n", rdst);
}
SYNTAX("mov%s [%1, %2], %0");
-#line 360 "rx-decode.opc"
+#line 361 "rx-decode.opc"
ID(movbi); sBWL(sz); DR(rdst); SRR(isrc); S2R(bsrc); F_____;
}
@@ -18099,13 +18142,13 @@ rx_decode_opcode (unsigned long pc AU,
op_semantics_143:
{
/** 1111 1110 11sz isrc bsrc rdst movu%s [%1, %2], %0 */
-#line 366 "rx-decode.opc"
+#line 367 "rx-decode.opc"
int sz AU = (op[1] >> 4) & 0x03;
-#line 366 "rx-decode.opc"
+#line 367 "rx-decode.opc"
int isrc AU = op[1] & 0x0f;
-#line 366 "rx-decode.opc"
+#line 367 "rx-decode.opc"
int bsrc AU = (op[2] >> 4) & 0x0f;
-#line 366 "rx-decode.opc"
+#line 367 "rx-decode.opc"
int rdst AU = op[2] & 0x0f;
if (trace)
{
@@ -18118,7 +18161,7 @@ rx_decode_opcode (unsigned long pc AU,
printf (" rdst = 0x%x\n", rdst);
}
SYNTAX("movu%s [%1, %2], %0");
-#line 366 "rx-decode.opc"
+#line 367 "rx-decode.opc"
ID(movbi); uBW(sz); DR(rdst); SRR(isrc); S2R(bsrc); F_____;
}
@@ -18563,11 +18606,11 @@ rx_decode_opcode (unsigned long pc AU,
op_semantics_144:
{
/** 1111 1111 0000 rdst srca srcb sub %2, %1, %0 */
-#line 570 "rx-decode.opc"
+#line 571 "rx-decode.opc"
int rdst AU = op[1] & 0x0f;
-#line 570 "rx-decode.opc"
+#line 571 "rx-decode.opc"
int srca AU = (op[2] >> 4) & 0x0f;
-#line 570 "rx-decode.opc"
+#line 571 "rx-decode.opc"
int srcb AU = op[2] & 0x0f;
if (trace)
{
@@ -18579,7 +18622,7 @@ rx_decode_opcode (unsigned long pc AU,
printf (" srcb = 0x%x\n", srcb);
}
SYNTAX("sub %2, %1, %0");
-#line 570 "rx-decode.opc"
+#line 571 "rx-decode.opc"
ID(sub); DR(rdst); SR(srcb); S2R(srca); F_OSZC;
/*----------------------------------------------------------------------*/
@@ -18732,11 +18775,11 @@ rx_decode_opcode (unsigned long pc AU,
op_semantics_145:
{
/** 1111 1111 0010 rdst srca srcb add %2, %1, %0 */
-#line 537 "rx-decode.opc"
+#line 538 "rx-decode.opc"
int rdst AU = op[1] & 0x0f;
-#line 537 "rx-decode.opc"
+#line 538 "rx-decode.opc"
int srca AU = (op[2] >> 4) & 0x0f;
-#line 537 "rx-decode.opc"
+#line 538 "rx-decode.opc"
int srcb AU = op[2] & 0x0f;
if (trace)
{
@@ -18748,7 +18791,7 @@ rx_decode_opcode (unsigned long pc AU,
printf (" srcb = 0x%x\n", srcb);
}
SYNTAX("add %2, %1, %0");
-#line 537 "rx-decode.opc"
+#line 538 "rx-decode.opc"
ID(add); DR(rdst); SR(srcb); S2R(srca); F_OSZC;
/*----------------------------------------------------------------------*/
@@ -18901,11 +18944,11 @@ rx_decode_opcode (unsigned long pc AU,
op_semantics_146:
{
/** 1111 1111 0011 rdst srca srcb mul %2, %1, %0 */
-#line 677 "rx-decode.opc"
+#line 678 "rx-decode.opc"
int rdst AU = op[1] & 0x0f;
-#line 677 "rx-decode.opc"
+#line 678 "rx-decode.opc"
int srca AU = (op[2] >> 4) & 0x0f;
-#line 677 "rx-decode.opc"
+#line 678 "rx-decode.opc"
int srcb AU = op[2] & 0x0f;
if (trace)
{
@@ -18917,7 +18960,7 @@ rx_decode_opcode (unsigned long pc AU,
printf (" srcb = 0x%x\n", srcb);
}
SYNTAX("mul %2, %1, %0");
-#line 677 "rx-decode.opc"
+#line 678 "rx-decode.opc"
ID(mul); DR(rdst); SR(srcb); S2R(srca); F_____;
/*----------------------------------------------------------------------*/
@@ -19070,11 +19113,11 @@ rx_decode_opcode (unsigned long pc AU,
op_semantics_147:
{
/** 1111 1111 0100 rdst srca srcb and %2, %1, %0 */
-#line 447 "rx-decode.opc"
+#line 448 "rx-decode.opc"
int rdst AU = op[1] & 0x0f;
-#line 447 "rx-decode.opc"
+#line 448 "rx-decode.opc"
int srca AU = (op[2] >> 4) & 0x0f;
-#line 447 "rx-decode.opc"
+#line 448 "rx-decode.opc"
int srcb AU = op[2] & 0x0f;
if (trace)
{
@@ -19086,7 +19129,7 @@ rx_decode_opcode (unsigned long pc AU,
printf (" srcb = 0x%x\n", srcb);
}
SYNTAX("and %2, %1, %0");
-#line 447 "rx-decode.opc"
+#line 448 "rx-decode.opc"
ID(and); DR(rdst); SR(srcb); S2R(srca); F__SZ_;
/*----------------------------------------------------------------------*/
@@ -19239,11 +19282,11 @@ rx_decode_opcode (unsigned long pc AU,
op_semantics_148:
{
/** 1111 1111 0101 rdst srca srcb or %2, %1, %0 */
-#line 465 "rx-decode.opc"
+#line 466 "rx-decode.opc"
int rdst AU = op[1] & 0x0f;
-#line 465 "rx-decode.opc"
+#line 466 "rx-decode.opc"
int srca AU = (op[2] >> 4) & 0x0f;
-#line 465 "rx-decode.opc"
+#line 466 "rx-decode.opc"
int srcb AU = op[2] & 0x0f;
if (trace)
{
@@ -19255,7 +19298,7 @@ rx_decode_opcode (unsigned long pc AU,
printf (" srcb = 0x%x\n", srcb);
}
SYNTAX("or %2, %1, %0");
-#line 465 "rx-decode.opc"
+#line 466 "rx-decode.opc"
ID(or); DR(rdst); SR(srcb); S2R(srca); F__SZ_;
/*----------------------------------------------------------------------*/
@@ -19408,11 +19451,11 @@ rx_decode_opcode (unsigned long pc AU,
op_semantics_149:
{
/** 1111 1111 0110 rdst srca srcb xor %2, %1, %0 */
-#line 1146 "rx-decode.opc"
+#line 1186 "rx-decode.opc"
int rdst AU = op[1] & 0x0f;
-#line 1146 "rx-decode.opc"
+#line 1186 "rx-decode.opc"
int srca AU = (op[2] >> 4) & 0x0f;
-#line 1146 "rx-decode.opc"
+#line 1186 "rx-decode.opc"
int srcb AU = op[2] & 0x0f;
if (trace)
{
@@ -19424,7 +19467,7 @@ rx_decode_opcode (unsigned long pc AU,
printf (" srcb = 0x%x\n", srcb);
}
SYNTAX("xor %2, %1, %0");
-#line 1146 "rx-decode.opc"
+#line 1186 "rx-decode.opc"
ID(xor); DR(rdst); SR(srcb); S2R(srca); F__SZ_;
}
@@ -19574,11 +19617,11 @@ rx_decode_opcode (unsigned long pc AU,
op_semantics_150:
{
/** 1111 1111 1000 rdst srca srcb fsub %2, %1, %0 */
-#line 1125 "rx-decode.opc"
+#line 1165 "rx-decode.opc"
int rdst AU = op[1] & 0x0f;
-#line 1125 "rx-decode.opc"
+#line 1165 "rx-decode.opc"
int srca AU = (op[2] >> 4) & 0x0f;
-#line 1125 "rx-decode.opc"
+#line 1165 "rx-decode.opc"
int srcb AU = op[2] & 0x0f;
if (trace)
{
@@ -19590,7 +19633,7 @@ rx_decode_opcode (unsigned long pc AU,
printf (" srcb = 0x%x\n", srcb);
}
SYNTAX("fsub %2, %1, %0");
-#line 1125 "rx-decode.opc"
+#line 1165 "rx-decode.opc"
ID(fsub); DR(rdst); SR(srcb); S2R(srca); F__SZ_;
}
@@ -19740,11 +19783,11 @@ rx_decode_opcode (unsigned long pc AU,
op_semantics_151:
{
/** 1111 1111 1010 rdst srca srcb fadd %2, %1, %0 */
-#line 1122 "rx-decode.opc"
+#line 1162 "rx-decode.opc"
int rdst AU = op[1] & 0x0f;
-#line 1122 "rx-decode.opc"
+#line 1162 "rx-decode.opc"
int srca AU = (op[2] >> 4) & 0x0f;
-#line 1122 "rx-decode.opc"
+#line 1162 "rx-decode.opc"
int srcb AU = op[2] & 0x0f;
if (trace)
{
@@ -19756,7 +19799,7 @@ rx_decode_opcode (unsigned long pc AU,
printf (" srcb = 0x%x\n", srcb);
}
SYNTAX("fadd %2, %1, %0");
-#line 1122 "rx-decode.opc"
+#line 1162 "rx-decode.opc"
ID(fadd); DR(rdst); SR(srcb); S2R(srca); F__SZ_;
}
@@ -19906,11 +19949,11 @@ rx_decode_opcode (unsigned long pc AU,
op_semantics_152:
{
/** 1111 1111 1011 rdst srca srcb fmul %2, %1, %0 */
-#line 1128 "rx-decode.opc"
+#line 1168 "rx-decode.opc"
int rdst AU = op[1] & 0x0f;
-#line 1128 "rx-decode.opc"
+#line 1168 "rx-decode.opc"
int srca AU = (op[2] >> 4) & 0x0f;
-#line 1128 "rx-decode.opc"
+#line 1168 "rx-decode.opc"
int srcb AU = op[2] & 0x0f;
if (trace)
{
@@ -19922,7 +19965,7 @@ rx_decode_opcode (unsigned long pc AU,
printf (" srcb = 0x%x\n", srcb);
}
SYNTAX("fmul %2, %1, %0");
-#line 1128 "rx-decode.opc"
+#line 1168 "rx-decode.opc"
ID(fmul); DR(rdst); SR(srcb); S2R(srca); F__SZ_;
}
@@ -20069,7 +20112,7 @@ rx_decode_opcode (unsigned long pc AU,
break;
default: UNSUPPORTED(); break;
}
-#line 1280 "rx-decode.opc"
+#line 1320 "rx-decode.opc"
return rx->n_bytes;
}
diff --git a/opcodes/rx-decode.opc b/opcodes/rx-decode.opc
index 084a13f4b0e0..b5561beafd31 100644
--- a/opcodes/rx-decode.opc
+++ b/opcodes/rx-decode.opc
@@ -33,8 +33,8 @@
typedef struct
{
RX_Opcode_Decoded * rx;
- int (* getbyte)(void *);
- void * ptr;
+ int (* getbyte)(RX_Data *);
+ RX_Data * ptr;
unsigned char * op;
} LocalData;
@@ -92,9 +92,9 @@ static int _ld[2] =
rx->op[n].size = s )
/* This is for the BWL and BW bitfields. */
-static int SCALE[] = { 1, 2, 4, 0 };
+static int SCALE[4] = { 1, 2, 4, 0 };
/* This is for the prefix size enum. */
-static int PSCALE[] = { 4, 1, 1, 1, 2, 2, 2, 3, 4, 8 };
+static int PSCALE[RX_MAX_SIZE] = { 4, 1, 1, 1, 2, 2, 2, 3, 4, 4, 0 };
#define GET_SCALE(_indx) ((unsigned)(_indx) < ARRAY_SIZE (SCALE) ? SCALE[(_indx)] : 0)
#define GET_PSCALE(_indx) ((unsigned)(_indx) < ARRAY_SIZE (PSCALE) ? PSCALE[(_indx)] : 0)
@@ -287,8 +287,9 @@ rx_disp (int n, int type, int reg, unsigned int size, LocalData * ld)
int
rx_decode_opcode (unsigned long pc AU,
RX_Opcode_Decoded * rx,
- int (* getbyte)(void *),
- void * ptr)
+ int (* getbyte)(RX_Data *),
+ RX_Data * ptr,
+ unsigned long machine)
{
LocalData lds, * ld = &lds;
unsigned char op[20] = {0};
@@ -1023,20 +1024,59 @@ rx_decode_opcode (unsigned long pc AU,
ID(mvtipl); SC(immm);
/** 0111 1110 111 crdst popc %0 */
+if ((crdst == 1) || (crdst > 0xD || (crdst > 0xC && machine == bfd_mach_rx)))
+{
+ /* fake a non existent control reg in order not to mess up decoding */
+ ID(mov); OP(1, RX_Operand_Postinc, 0, 0); DR(40);
+}
+else
+{
ID(mov); OP(1, RX_Operand_Postinc, 0, 0); DR(crdst + 16);
+}
/** 0111 1110 110 crsrc pushc %1 */
+ if (crsrc > 0xD || (crsrc > 0xC && machine == bfd_mach_rx))
+ {
+ /* fake a non existent control reg in order not to mess up decoding */
+ ID(mov); OP(0, RX_Operand_Predec, 0, 0); SR(40);
+ }
+ else
+ {
ID(mov); OP(0, RX_Operand_Predec, 0, 0); SR(crsrc + 16);
+ }
-/** 1111 1101 0111 im11 000crdst mvtc #%1, %0 */
- ID(mov); SC(IMMex(im)); DR(crdst + 16);
+/** 1111 1101 0111 im11 000c rdst mvtc #%1, %0 */
+if (((c*16+rdst) == 1) || ((c*16+rdst) > 0xD || ((c*16+rdst) > 0xC && machine == bfd_mach_rx)))
+{
+ /* fake a non existent control reg in order not to mess up decoding */
+ ID(mov); SC(IMMex(im)); DR(40);
+}
+else
+{
+ ID(mov); SC(IMMex(im)); DR(c*16+rdst + 16);
+}
/** 1111 1101 0110 100c rsrc rdst mvtc %1, %0 */
+if (((c*16+rdst) == 1) || ((c*16+rdst) > 0xD || ((c*16+rdst) > 0xC && machine == bfd_mach_rx)))
+{
+ /* fake a non existent control reg in order not to mess up decoding */
+ ID(mov); SR(rsrc); DR(40);
+}
+else
+{
ID(mov); SR(rsrc); DR(c*16+rdst + 16);
+}
/** 1111 1101 0110 101s rsrc rdst mvfc %1, %0 */
+if ((s*16+rsrc) > 0xD || ((s*16+rsrc) > 0xC && machine == bfd_mach_rx))
+{
+ /* fake a non existent control reg in order not to mess up decoding */
+ ID(mov); SR(40); DR(rdst);
+}
+else
+{
ID(mov); SR((s*16+rsrc) + 16); DR(rdst);
-
+}
/*----------------------------------------------------------------------*/
/* INTERRUPTS */
@@ -1228,8 +1268,8 @@ rx_decode_opcode (unsigned long pc AU,
/** 0111 0101 1001 0000 0001 1011 mvfdr */
ID(mvfdr); F_____;
-/** 1111 1101 0111 0111 1000 rdst rsrc 0100 mvtdc %1, %0 */
- ID(mvtdc); DCR(rdst); SR(rsrc); F_____;
+/** 1111 1101 0111 0111 1000 rsrc rdst 0100 mvtdc %1, %0 */
+ ID(mvtdc); SR(rsrc); DCR(rdst); F_____;
/** 0111 0110 1001 0000 rsrc 1100 rdst 0001 dabs %1, %0 */
ID(dabs); DDR(rdst); SDR(rsrc); F_____;
diff --git a/opcodes/rx-dis.c b/opcodes/rx-dis.c
index f9d6e77f72a8..9ae18f5da29c 100644
--- a/opcodes/rx-dis.c
+++ b/opcodes/rx-dis.c
@@ -31,12 +31,6 @@
#include
-typedef struct
-{
- bfd_vma pc;
- disassemble_info * dis;
-} RX_Data;
-
struct private
{
OPCODES_SIGJMP_BUF bailout;
@@ -49,7 +43,7 @@ rx_get_byte (void * vdata)
RX_Data *rx_data = (RX_Data *) vdata;
int status;
- status = rx_data->dis->read_memory_func (rx_data->pc,
+ status = rx_data->dis->read_memory_func (rx_data->addr,
buf,
1,
rx_data->dis);
@@ -57,12 +51,12 @@ rx_get_byte (void * vdata)
{
struct private *priv = (struct private *) rx_data->dis->private_data;
- rx_data->dis->memory_error_func (status, rx_data->pc,
+ rx_data->dis->memory_error_func (status, rx_data->addr,
rx_data->dis);
OPCODES_SIGLONGJMP (priv->bailout, 1);
}
- rx_data->pc ++;
+ rx_data->addr ++;
return buf[0];
}
@@ -212,8 +206,8 @@ get_size_name (unsigned int size)
}
-int
-print_insn_rx (bfd_vma addr, disassemble_info * dis)
+static int
+print_insn_rx_internal (bfd_vma addr, disassemble_info * dis, unsigned long machine)
{
int rv;
RX_Data rx_data;
@@ -222,7 +216,7 @@ print_insn_rx (bfd_vma addr, disassemble_info * dis)
struct private priv;
dis->private_data = &priv;
- rx_data.pc = addr;
+ rx_data.addr = addr;
rx_data.dis = dis;
if (OPCODES_SIGSETJMP (priv.bailout) != 0)
@@ -231,7 +225,7 @@ print_insn_rx (bfd_vma addr, disassemble_info * dis)
return -1;
}
- rv = rx_decode_opcode (addr, &opcode, rx_get_byte, &rx_data);
+ rv = rx_decode_opcode (addr, &opcode, rx_get_byte, &rx_data, machine);
dis->bytes_per_line = 10;
@@ -249,13 +243,13 @@ print_insn_rx (bfd_vma addr, disassemble_info * dis)
int i;
PR (PS, ".byte ");
- rx_data.dis->read_memory_func (rx_data.pc - rv, buf, rv, rx_data.dis);
-
+ rx_data.dis->read_memory_func (rx_data.addr - rv, buf, rv, rx_data.dis);
+
for (i = 0 ; i < rv; i++)
PR (PS, "0x%02x ", buf[i]);
return rv;
}
-
+
for (s = opcode.syntax; *s; s++)
{
if (*s != '%')
@@ -306,10 +300,10 @@ print_insn_rx (bfd_vma addr, disassemble_info * dis)
dlsb = (imm >> 5) & 0x1f;
slsb = (imm & 0x1f);
- slsb = (slsb >= 0x10?(slsb ^ 0x1f) + 1:slsb);
slsb = dlsb - slsb;
- slsb = (slsb < 0?-slsb:slsb);
+ slsb = (slsb < 0?32+slsb:slsb);
width = ((imm >> 10) & 0x1f) - dlsb;
+ width = (width < 0?32+width:width);
PR (PS, "#%d, #%d, #%d, %s, %s",
slsb, dlsb, width,
get_register_name (opcode.op[1].reg),
@@ -385,3 +379,29 @@ print_insn_rx (bfd_vma addr, disassemble_info * dis)
return rv;
}
+
+/* this info is available also in info.bfd_arch_info->mach,
+unfortunately we can't modify that when we overwrite the machine using -rx-force-isa=... */
+int
+print_insn_rx (bfd_vma addr, disassemble_info * dis)
+{
+ return print_insn_rx_internal(addr, dis, bfd_mach_rx);
+}
+
+int
+print_insn_rxv2 (bfd_vma addr, disassemble_info * dis)
+{
+ return print_insn_rx_internal(addr, dis, bfd_mach_rx_v2);
+}
+
+int
+print_insn_rxv3 (bfd_vma addr, disassemble_info * dis)
+{
+ return print_insn_rx_internal(addr, dis, bfd_mach_rx_v3);
+}
+
+int
+print_insn_rxv3_dfpu (bfd_vma addr, disassemble_info * dis)
+{
+ return print_insn_rx_internal(addr, dis, bfd_mach_rx_v3_dfpu);
+}
diff --git a/sim/rx/cpu.h b/sim/rx/cpu.h
index 4b0e7fd1596e..4fbf09964aff 100644
--- a/sim/rx/cpu.h
+++ b/sim/rx/cpu.h
@@ -36,6 +36,7 @@ extern int rx_big_endian;
typedef struct
{
SI r[16];
+ DI dr[16];
SI r_psw;
SI r_pc;
@@ -51,7 +52,7 @@ typedef struct
SI r_isp;
SI r_fintv;
SI r_intb;
- SI r__reserved_cr_13;
+ SI r_extb;
SI r__reserved_cr_14;
SI r__reserved_cr_15;
@@ -75,7 +76,16 @@ typedef struct
SI r_temp;
- DI r_acc;
+ /*DI r_acc;*/
+ DI r_acc0[2];
+ DI r_acc1[2];
+
+ SI r_dpsw;
+ SI r_dcmr;
+ SI r_decnt;
+ SI r_depc;
+
+ SI bit_li : 1;
#ifdef CYCLE_ACCURATE
/* If set, RTS/RTSD take 2 fewer cycles. */
@@ -95,22 +105,35 @@ typedef struct
#define M2M_BOTH 0x03
#define sp 0
-#define psw 16
-#define pc 17
-#define usp 18
-#define fpsw 19
-
-#define bpsw 24
-#define bpc 25
-#define isp 26
-#define fintv 27
-#define intb 28
-
-#define r_temp_idx 48
-#define acc64 49
-#define acchi 50
-#define accmi 51
-#define acclo 52
+#define dr0 16
+#define psw 32
+#define pc 33
+#define usp 34
+#define fpsw 35
+
+#define bpsw 40
+#define bpc 41
+#define isp 42
+#define fintv 43
+#define intb 44
+#define extb 45
+
+#define r_temp_idx 64
+#define acc0 65
+#define acc1 66
+#define acc0hi 67
+#define acc0mi 68
+#define acc0lo 69
+#define acc1hi 70
+#define acc1mi 71
+#define acc1lo 72
+
+#define dpsw 73
+#define dcmr 74
+#define decnt 75
+#define depc 76
+
+#define libit 78
extern regs_type regs;
@@ -147,7 +170,7 @@ extern regs_type regs;
#define FPSWBITS_FU 0x20000000
#define FPSWBITS_FX 0x40000000
#define FPSWBITS_FSUM 0x80000000
-#define FPSWBITS_FMASK 0x7c000000
+#define FPSWBITS_FMASK 0x3c000000
#define FPSWBITS_CLEAR 0xffffff03 /* masked at start of any FP opcode */
#define FPRM_NEAREST 0
@@ -155,6 +178,54 @@ extern regs_type regs;
#define FPRM_PINF 2
#define FPRM_NINF 3
+/*
+ * Double-Precision Floating-Point Status Word (DPSW)
+ */
+#define DPSWBITS_DRM 0x00000003 /* Double-precision floating-point rounding-mode setting bits */
+#define DPSWBITS_DCV 0x00000004 /* Invalid operation cause flag */
+#define DPSWBITS_DCO 0x00000008 /* Overlow cause flag */
+#define DPSWBITS_DCZ 0x00000010 /* Division-by-zero cause flag */
+#define DPSWBITS_DCU 0x00000020 /* Underflow cause flag */
+#define DPSWBITS_DCX 0x00000040 /* Inexact cause flag */
+#define DPSWBITS_DCE 0x00000080 /* Unimplemented processing flag */
+#define DPSWBITS_CMASK 0x000000fc /* all the above */
+#define DPSWBITS_DDN 0x00000100 /* 0 flush bit of denormalized number */
+#define DPSWBITS_B9 0x00000200 /* Reserved */
+#define DPSWBITS_DEV 0x00000400 /* Invalid operation exception enable bit */
+#define DPSWBITS_DEO 0x00000800 /* Overflow exception enable bit */
+#define DPSWBITS_DEZ 0x00001000 /* Division-by-zero exception enable bit */
+#define DPSWBITS_DEU 0x00002000 /* Underflow exception enable bit */
+#define DPSWBITS_DEX 0x00004000 /* Inexact exception enable bit */
+#define DPSWBITS_B15 0x00008000 /* Reserved */
+#define DPSWBITS_B16 0x00010000 /* Reserved */
+#define DPSWBITS_B17 0x00020000 /* Reserved */
+#define DPSWBITS_B18 0x00040000 /* Reserved */
+#define DPSWBITS_B19 0x00080000 /* Reserved */
+#define DPSWBITS_B20 0x00100000 /* Reserved */
+#define DPSWBITS_B21 0x00200000 /* Reserved */
+#define DPSWBITS_B22 0x00400000 /* Reserved */
+#define DPSWBITS_B23 0x00800000 /* Reserved */
+#define DPSWBITS_B24 0x01000000 /* Reserved */
+#define DPSWBITS_B25 0x02000000 /* Reserved */
+#define DPSWBITS_DFV 0x04000000 /* Invalid operation flag */
+#define DPSWBITS_DFO 0x08000000 /* Overflow flag */
+#define DPSWBITS_DFZ 0x10000000 /* Division-by-zero flag */
+#define DPSWBITS_DFU 0x20000000 /* Underflow flag */
+#define DPSWBITS_DFX 0x40000000 /* Inexact flag */
+#define DPSWBITS_DFS 0x80000000 /* Double-precision floating point error summary flag */
+
+#define DPSWBITS_FMASK 0x3c000000 /*DFU, DFZ, DFO, DFV*/
+#define DPSWBITS_CLEAR 0xffffff03
+
+#define DPSW_CESH 8
+#define DPSW_EFSH 16
+#define DPSW_CFSH 24
+
+#define DPRM_NEAREST 0
+#define DPRM_ZERO 1
+#define DPRM_PINF 2
+#define DPRM_NINF 3
+
extern char *reg_names[];
extern int rx_flagmask;
@@ -170,9 +241,11 @@ void init_regs (void);
void stack_heap_stats (void);
void set_pointer_width (int bytes);
unsigned int get_reg (int id);
-unsigned long long get_reg64 (int id);
+unsigned long long get_reg_double (int id);
+unsigned long long * get_reg72 (int id);
void put_reg (int id, unsigned int value);
-void put_reg64 (int id, unsigned long long value);
+void put_reg72 (int id, unsigned long long * value);
+void put_reg_double (int id, unsigned long long value);
void set_flags (int mask, int newbits);
void set_oszc (long long value, int bytes, int c);
@@ -235,11 +308,11 @@ extern unsigned int heaptop;
extern unsigned int heapbottom;
extern int decode_opcode (void);
-extern void reset_decoder (void);
+extern void reset_decoder (SI tpc);
extern void reset_pipeline_stats (void);
extern void halt_pipeline_stats (void);
extern void pipeline_stats (void);
-extern void trace_register_changes (void);
+extern void trace_register_changes ();
extern void generate_access_exception (void);
extern jmp_buf decode_jmp_buf;
diff --git a/sim/rx/dpu.c b/sim/rx/dpu.c
new file mode 100644
index 000000000000..6456ec73edd1
--- /dev/null
+++ b/sim/rx/dpu.c
@@ -0,0 +1,1141 @@
+/* dpu.c --- DPU emulator for stand-alone RX simulator.
+
+Copyright (C) 2018- Free Software Foundation, Inc.
+Contributed by CyberThor Studios Ltd.
+
+This file is part of the GNU simulators.
+
+This program is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 3 of the License, or
+(at your option) any later version.
+
+This program is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this program. If not, see . */
+
+#include "config.h"
+#include
+
+#include "cpu.h"
+#include "dpu.h"
+
+/* DPU encodings are as follows:
+
+ S EXPONENT MANTISSA
+ 1 12345678901 1234567890123456789012345678901234567890123456789012
+
+ 0 00000000000 0000000000000000000000000000000000000000000000000000 +0
+ 1 00000000000 0000000000000000000000000000000000000000000000000000 -0
+
+ X 00000000000 0000000000000000000000000000000000000000000000000001 Denormals
+ X 00000000000 1111111111111111111111111111111111111111111111111111
+
+ X 00000000001 XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX Normals
+ X 11111111110 XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX
+
+ 0 11111111111 0000000000000000000000000000000000000000000000000000 +Inf
+ 1 11111111111 0000000000000000000000000000000000000000000000000000 -Inf
+
+ X 11111111111 0XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX SNaN (X != 0)
+ X 11111111111 1XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX QNaN (X != 0)
+
+*/
+
+//#define trace 1
+#define tprintf if (trace) printf
+
+/* Some magic numbers. */
+#define PLUS_MAX 0x7FEFFFFFFFFFFFFFULL
+#define MINUS_MAX 0xFFEFFFFFFFFFFFFFULL
+#define PLUS_INF 0x7FF0000000000000ULL
+#define MINUS_INF 0xFFF0000000000000ULL
+#define PLUS_ZERO 0x0000000000000000ULL
+#define MINUS_ZERO 0x8000000000000000ULL
+
+#define DP_RAISE(e) dp_raise(DPSWBITS_DC##e)
+static void
+dp_raise (int mask)
+{
+ regs.r_dpsw |= mask;
+ if (mask != DPSWBITS_DCE)
+ {
+ if (regs.r_dpsw & (mask << DPSW_CESH))
+ regs.r_dpsw |= (mask << DPSW_CFSH);
+ if (regs.r_dpsw & DPSWBITS_FMASK)
+ regs.r_dpsw |= DPSWBITS_DFS;
+ else
+ regs.r_dpsw &= ~DPSWBITS_DFS;
+ }
+}
+
+/* We classify all numbers as one of these. They correspond to the
+ rows/colums in the exception tables. */
+typedef enum {
+ DP_NORMAL,
+ DP_PZERO,
+ DP_NZERO,
+ DP_PINFINITY,
+ DP_NINFINITY,
+ DP_DENORMAL,
+ DP_QNAN,
+ DP_SNAN
+} DP_Type;
+
+#if defined DEBUG0
+static const char *fpt_names[] = {
+ "Normal", "+0", "-0", "+Inf", "-Inf", "Denormal", "QNaN", "SNaN"
+};
+#endif
+
+#define EXP_BIAS 1023
+#define EXP_ZERO -1023
+#define EXP_INF 1024
+
+#define MANT_BIAS 0x0010000000000000ULL
+
+typedef enum {
+ FP_NORMAL,
+ FP_PZERO,
+ FP_NZERO,
+ FP_PINFINITY,
+ FP_NINFINITY,
+ FP_DENORMAL,
+ FP_QNAN,
+ FP_SNAN
+} FP_Type;
+
+typedef struct {
+ int exp;
+ unsigned int mant; /* 24 bits */
+ char type;
+ char sign;
+ fp_t orig_value;
+} FP_Parts;
+
+static void
+fp_explode (fp_t f, FP_Parts *p)
+{
+ int exp, mant, sign;
+
+ exp = ((f & 0x7f800000UL) >> 23);
+ mant = f & 0x007fffffUL;
+ sign = f & 0x80000000UL;
+ /*printf("explode: %08x %x %2x %6x\n", f, sign, exp, mant);*/
+
+ p->sign = sign ? -1 : 1;
+ p->exp = exp - EXP_BIAS;
+ p->orig_value = f;
+ p->mant = mant | 0x00800000UL;
+
+ if (p->exp == EXP_ZERO)
+ {
+ if (regs.r_fpsw & FPSWBITS_DN)
+ mant = 0;
+ if (mant)
+ p->type = FP_DENORMAL;
+ else
+ {
+ p->mant = 0;
+ p->type = sign ? FP_NZERO : FP_PZERO;
+ }
+ }
+ else if (p->exp == EXP_INF)
+ {
+ if (mant == 0)
+ p->type = sign ? FP_NINFINITY : FP_PINFINITY;
+ else if (mant & 0x00400000UL)
+ p->type = FP_QNAN;
+ else
+ p->type = FP_SNAN;
+ }
+ else
+ p->type = FP_NORMAL;
+}
+
+typedef struct {
+ int exp;
+ unsigned long long mant; /* 53 bits */
+ char type;
+ char sign;
+ dp_t orig_value;
+} DP_Parts;
+
+static void
+dp_explode (dp_t f, DP_Parts *p)
+{
+ unsigned long long mant;
+ unsigned int exp, sign;
+ //printf ("Erix\n");
+ exp = ((f & 0x7FF0000000000000ULL) >> 52);
+ mant = f & 0x000FFFFFFFFFFFFFULL;
+ sign = (f >> 63) & 0x1;
+
+ tprintf("explode: %016llx %d %x %016llx\n", f, sign, exp, mant);
+ //printf("explode: %e %d %x %016llx\n", f, sign, exp, mant);
+
+
+ p->sign = sign ? -1 : 1;
+ p->exp = exp - EXP_BIAS;
+ p->orig_value = f;
+ p->mant = mant | MANT_BIAS;
+
+ if (p->exp == EXP_ZERO)
+ {
+ //if (regs.r_dpsw & FPSWBITS_DN)
+ // mant = 0;
+ if (mant && !(regs.r_dpsw & DPSWBITS_DDN))
+ {
+ p->type = DP_DENORMAL;
+ }
+ else
+ {
+ p->mant = 0;
+ p->type = sign ? DP_NZERO : DP_PZERO;
+ }
+ }
+ else if (p->exp == EXP_INF)
+ {
+ if (mant == 0)
+ p->type = sign ? DP_NINFINITY : DP_PINFINITY;
+ else if (mant & 0x0008000000000000ULL)
+ p->type = DP_QNAN;
+ else
+ p->type = DP_SNAN;
+ }
+ else
+ p->type = DP_NORMAL;
+}
+
+static dp_t
+dp_implode (DP_Parts *p)
+{
+ unsigned long long mant;
+ unsigned int exp;
+
+ exp = p->exp + EXP_BIAS;
+ mant = p->mant;
+
+ if (p->type == DP_NORMAL)
+ {
+ while (mant && exp > 0
+ && mant < 0x0010000000000000ULL)
+ {
+ mant <<= 1;
+ exp --;
+ }
+ while (mant > 0x001FFFFFFFFFFFFFULL)
+ {
+ mant >>= 1;
+ exp ++;
+ }
+ if (exp < 0)
+ {
+ /* underflow */
+ exp = 0;
+ mant = 0;
+ dp_raise(DPSWBITS_DFU);
+ }
+ if (exp >= 2047)
+ {
+ /* overflow */
+ exp = 2047;
+ mant = 0;
+ DP_RAISE (O);
+ }
+ }
+
+ mant &= 0x000FFFFFFFFFFFFFULL;
+ exp &= 0x7ff;
+ mant |= (unsigned long long)exp << 52;
+ if (p->sign < 0)
+ mant |= 0x8000000000000000ULL;
+
+ tprintf("implode: exp 0x%x mant 0x%016llx\n", exp, mant);
+ return mant;
+}
+
+typedef union {
+ unsigned long long ll;
+ double d;
+} U_d_ll;
+
+typedef enum {
+ eNR, /* Use the normal result. */
+ ePZ, eNZ, /* +- zero */
+ eSZ, /* signed zero - XOR signs of ops together. */
+ eRZ, /* +- zero depending on rounding mode. */
+ ePI, eNI, /* +- Infinity */
+ eSI, /* signed infinity - XOR signs of ops together. */
+ eQN, eSN, /* Quiet/Signalling NANs */
+ eIn, /* Invalid. */
+ eUn, /* Unimplemented. */
+ eDZ, /* Divide-by-zero. */
+ eLT, /* less than */
+ eGT, /* greater than */
+ eEQ, /* equal to */
+} DP_ExceptionCases;
+#if defined DEBUG0
+static const char *fpt_names[] = {
+ "Normal", "+0", "-0", "+Inf", "-Inf", "Denormal", "QNaN", "SNaN"
+};
+static const char *ex_names[] = {
+ "NR", "PZ", "NZ", "SZ", "RZ", "PI", "NI", "SI", "QN", "SN", "IN", "Un", "DZ", "LT", "GT", "EQ"
+};
+#endif
+
+/* Similar to check_exceptions in fpu.c, but for doubles,
+ this checks for all exceptional cases (not all DP exceptions) and
+ returns TRUE if it is providing the result in *c. If it returns
+ FALSE, the caller should do the "normal" operation. */
+int
+check_dp_exceptions (DP_Parts *a, DP_Parts *b, dp_t *c,
+ DP_ExceptionCases ex_tab[5][5],
+ DP_ExceptionCases *case_ret)
+{
+ DP_ExceptionCases dpec;
+ if (a->type == DP_SNAN
+ || b->type == DP_SNAN)
+ dpec = eIn;
+ else if (a->type == DP_QNAN
+ || b->type == DP_QNAN)
+ dpec = eQN;
+ else if (a->type == DP_DENORMAL
+ || b->type == DP_DENORMAL)
+ dpec = eUn;
+ else
+ dpec = ex_tab[(int)(b->type)][(int)(a->type)];
+
+ /*printf("%s %s -> %s\n", fpt_names[(int)(a->type)], fpt_names[(int)(b->type)], ex_names[(int)(dpec)]);*/
+
+ if (case_ret)
+ *case_ret = dpec;
+
+ switch (dpec)
+ {
+ case eNR: /* Use the normal result. */
+ return 0;
+
+ case ePZ: /* + zero */
+ *c = 0x00000000;
+ return 1;
+
+ case eNZ: /* - zero */
+ *c = 0x8000000000000000;
+ return 1;
+
+ case eSZ: /* signed zero */
+ *c = (a->sign == b->sign) ? PLUS_ZERO : MINUS_ZERO;
+ return 1;
+
+ case eRZ: /* +- zero depending on rounding mode. */
+ if ((regs.r_dpsw & DPSWBITS_DRM) == DPRM_NINF)
+ *c = 0x8000000000000000;
+ else
+ *c = 0x00000000;
+ return 1;
+
+ case ePI: /* + Infinity */
+ *c = 0x7ff0000000000000;
+ return 1;
+
+ case eNI: /* - Infinity */
+ *c = 0xfff0000000000000;
+ return 1;
+
+ case eSI: /* sign Infinity */
+ *c = (a->sign == b->sign) ? PLUS_INF : MINUS_INF;
+ return 1;
+
+ case eQN: /* Quiet NANs */
+ if(a->type == DP_QNAN && b->type == DP_QNAN)
+ *c = b->orig_value;
+ else if (a->type == DP_QNAN)
+ *c = a->orig_value;
+ else
+ *c = b->orig_value;
+ return 1;
+
+ case eSN: /* Signalling NANs */
+ if (a->type == DP_SNAN)
+ *c = a->orig_value;
+ else
+ *c = b->orig_value;
+ DP_RAISE (V);
+ return 1;
+
+ case eIn: /* Invalid. */
+ DP_RAISE (V);
+ if(a->type == DP_SNAN && b->type == DP_SNAN)
+ *c = b->orig_value | 0x00008000000000000;
+ else if (a->type == DP_SNAN)
+ *c = a->orig_value | 0x00008000000000000;
+ else if (b->type == DP_SNAN)
+ *c = b->orig_value | 0x00008000000000000;
+ else
+ *c = 0x7FFFFFFFFFFFFFFF; /*Neither source operand is an NaN and an invalid operation is generated)*/
+ return 1;
+
+ case eUn: /* Unimplemented. */
+ DP_RAISE (E);
+ return 1;
+
+ case eDZ: /* Division-by-zero. */
+ *c = (a->sign == b->sign) ? PLUS_INF : MINUS_INF;
+ DP_RAISE (Z);
+ return 1;
+
+ default:
+ return 0;
+ }
+}
+
+#define CHECK_DP_EXCEPTIONS(DPPa, DPPb, dpc, ex_tab) \
+ if (check_dp_exceptions (&DPPa, &DPPb, &dpc, ex_tab, 0)) \
+ return dpc;
+
+static DP_ExceptionCases ex_add_tab[5][5] = {
+ /* N +0 -0 +In -In */
+ { eNR, eNR, eNR, ePI, eNI }, /* Normal */
+ { eNR, ePZ, eRZ, ePI, eNI }, /* +0 */
+ { eNR, eRZ, eNZ, ePI, eNI }, /* -0 */
+ { ePI, ePI, ePI, ePI, eIn }, /* +Inf */
+ { eNI, eNI, eNI, eIn, eNI }, /* -Inf */
+};
+
+dp_t
+rxdp_add (dp_t fa, dp_t fb)
+{
+ DP_Parts a, b, c;
+ dp_t rv;
+ U_d_ll da, db;
+ double res;
+
+ da.ll = fa;
+ db.ll = fb;
+
+ dp_explode (fa, &a);
+ dp_explode (fb, &b);
+
+ if(check_dp_exceptions(&a, &b, &rv, ex_add_tab, NULL)) {
+ //tprintf("DADD src or src2 edge case\n");
+ tprintf("%lf + %lf = %lf\n", da.d, db.d, rv);
+ return rv;
+ } else {
+ res = da.d + db.d;
+ tprintf("%lf + %lf = %lf\n", da.d, db.d, res);
+ da.d = res;
+ rv = da.ll;
+ }
+
+ dp_explode(rv, &c);
+ if(c.type == DP_DENORMAL) {
+ regs.r_dpsw |= DPSWBITS_DFU;
+ }
+
+ //rv = dp_implode (&c);
+ return rv;
+}
+
+static DP_ExceptionCases ex_sub_tab[5][5] = {
+ /* N +0 -0 +In -In */
+ { eNR, eNR, eNR, eNI, ePI }, /* Normal */
+ { eNR, eRZ, ePZ, eNI, ePI }, /* +0 */
+ { eNR, eNZ, eRZ, eNI, ePI }, /* -0 */
+ { ePI, ePI, ePI, eIn, ePI }, /* +Inf */
+ { eNI, eNI, eNI, eNI, eIn }, /* -Inf */
+};
+
+dp_t
+rxdp_sub (dp_t fa, dp_t fb)
+{
+ dp_t rv;
+ U_d_ll da, db;
+ DP_Parts a, b, c;
+ double res;
+
+ da.ll = fa;
+ db.ll = fb;
+
+ dp_explode(fa, &a);
+ dp_explode(fb, &b);
+
+ if(check_dp_exceptions(&a, &b, &rv, ex_sub_tab, NULL)) {
+ //tprintf("DSUB src edge case\n");
+ return rv;
+ } else {
+ res = db.d - da.d;
+ tprintf("%f - %f = %f\n", db.d, da.d, res);
+ da.d = res;
+ rv = da.ll;
+ }
+
+ dp_explode(rv, &c);
+ if(c.type == DP_DENORMAL) {
+ regs.r_dpsw |= DPSWBITS_DFU;
+ }
+
+ return rv;
+}
+
+static DP_ExceptionCases ex_cmp_tab[5][5] = {
+ /* N +0 -0 +In -In */
+ { eNR, eNR, eNR, eLT, eGT }, /* Normal */
+ { eNR, eEQ, eEQ, eLT, eGT }, /* +0 */
+ { eNR, eEQ, eEQ, eLT, eGT }, /* -0 */
+ { eGT, eGT, eGT, eEQ, eGT }, /* +Inf */
+ { eLT, eLT, eLT, eLT, eEQ }, /* -Inf */
+};
+
+static int isNaN(unsigned long long value)
+{
+ if(((value >= 0x7FF0000000000001) && (value < 0x7FF7FFFFFFFFFFFF)) ||
+ ((value >= 0xFFF0000000000001) && (value < 0xFFF7FFFFFFFFFFFF)) ||
+ ((value >= 0x7FF8000000000000) && (value < 0x7FFFFFFFFFFFFFFF)) ||
+ ((value >= 0xFFF8000000000000) && (value < 0xFFFFFFFFFFFFFFFF)))
+ {
+ return 1;
+ }
+ return 0;
+}
+
+void abort();
+
+unsigned int
+rxdp_cmp (dp_t fa, dp_t fb, unsigned int cond)
+{
+ U_d_ll da, db;
+ const char *condition_name;
+ unsigned int res;
+
+ da.ll = fa;
+ db.ll = fb;
+
+ switch(cond)
+ {
+ case 1:
+ res = isNaN(db.ll) || isNaN(da.ll);
+ condition_name = "<>";
+ break;
+ case 2:
+ res = (db.d == da.d);
+ condition_name = "==";
+ break;
+ case 4:
+ res = (db.d < da.d);
+ condition_name = "<";
+ break;
+ case 6:
+ res = (db.d <= da.d);
+ condition_name = "<=";
+ break;
+ default:
+ abort();
+ }
+
+ tprintf("%lf %s %lf => RES=%d\n", db.d, condition_name, da.d, res);
+
+ return res & 0x1;
+}
+
+static DP_ExceptionCases ex_div_tab[5][5] = {
+ /* N +0 -0 +In -In */
+ { eNR, eDZ, eDZ, eSZ, eSZ }, /* Normal */
+ { eSZ, eIn, eIn, ePZ, eNZ }, /* +0 */
+ { eSZ, eIn, eIn, eNZ, ePZ }, /* -0 */
+ { eSI, ePI, eNI, eIn, eIn }, /* +Inf */
+ { eSI, eNI, ePI, eIn, eIn }, /* -Inf */
+};
+
+dp_t
+rxdp_div (dp_t fa, dp_t fb)
+{
+ DP_Parts a, b, c;
+ dp_t rv;
+ U_d_ll da, db;
+ U_d_ll res;
+
+ da.ll = fa;
+ db.ll = fb;
+
+ dp_explode (fa, &a);
+ dp_explode (fb, &b);
+
+ if(check_dp_exceptions (&a, &b, &rv, ex_div_tab, NULL)) {
+ //tprintf("DDIV src or src2 edge case\n");
+ return rv;
+ }
+
+ res.d = db.d / da.d;
+ rv = res.ll;
+
+ dp_explode(rv, &c);
+ if(c.type == DP_DENORMAL) {
+ regs.r_dpsw |= DPSWBITS_DFU;
+ }
+
+ tprintf("%e / %e = %llx\n", db.d, da.d, rv);
+
+ return rv;
+}
+
+static DP_ExceptionCases ex_mul_tab[5][5] = {
+ /* N +0 -0 +In -In */
+ { eNR, eNR, eNR, eSI, eSI }, /* Normal */
+ { eNR, ePZ, eNZ, eIn, eIn }, /* +0 */
+ { eNR, eNZ, ePZ, eIn, eIn }, /* -0 */
+ { eSI, eIn, eIn, ePI, eNI }, /* +Inf */
+ { eSI, eIn, eIn, eNI, ePI }, /* -Inf */
+};
+
+dp_t
+rxdp_mul (dp_t fa, dp_t fb)
+{
+ dp_t rv;
+ U_d_ll da, db, res;
+ DP_Parts a, b, c;
+
+ da.ll = fa;
+ db.ll = fb;
+
+ dp_explode(fa, &a);
+ dp_explode(fb, &b);
+
+ if(check_dp_exceptions(&a, &b, &rv, ex_mul_tab, NULL)) {
+ //tprintf("DMUL src edge case\n");
+ return rv;
+ } else {
+ res.d = da.d * db.d;
+ rv = res.ll;
+ }
+
+ dp_explode(rv, &c);
+ if(c.type == DP_DENORMAL) {
+ regs.r_dpsw |= DPSWBITS_DFU;
+ }
+
+ tprintf("%f x %f = %f\n", da.d, db.d, res);
+
+ return rv;
+}
+
+dp_t
+rxdp_abs (dp_t fa)
+{
+ DP_Parts a, b;
+ dp_t rv;
+ U_d_ll orig, u;
+
+ orig.ll = fa;
+
+ dp_explode (fa, &a);
+ a.sign = 0;
+ rv = dp_implode (&a);
+
+ u.ll = rv;
+ tprintf("|%lf| = ", orig.d);
+ tprintf("%lf\n", u.d);
+ return rv;
+}
+
+dp_t
+rxdp_neg (dp_t fa)
+{
+ DP_Parts a, b;
+ dp_t rv;
+ U_d_ll orig, u;
+
+ orig.ll = fa;
+
+ dp_explode (fa, &a);
+ a.sign = -a.sign;
+ rv = dp_implode (&a);
+
+ u.ll = rv;
+ tprintf("%lf => ", orig.d);
+ tprintf("%lf\n", u.d);
+ return rv;
+}
+
+/* we don't include math because of FP_DENORMAL and others */
+double sqrt(double x);
+
+dp_t
+rxdp_dsqrt (dp_t fa)
+{
+ DP_Parts a;
+ dp_t rv;
+ U_d_ll da, db;
+ double res;
+
+ da.ll = fa;
+
+ int sign, exp, mant, qnan;
+ dp_explode (fa, &a);
+
+ //tprintf("exp, mantisa, sign, type: %d 0x%016llx %d %d\n",a.exp, a.mant, a.sign, a.type);
+ switch (a.type)
+ {
+ case DP_NORMAL:
+ break;
+ case DP_PZERO:
+ return 0;
+ case DP_NZERO:
+ return 0x8000000000000000;
+ case DP_DENORMAL:
+ DP_RAISE (E);
+ return 0;
+ case DP_QNAN:
+ return fa;
+ case DP_SNAN:
+ DP_RAISE (V);
+ return fa | 0x00008000000000000;
+ }
+
+ if (a.sign < 0)
+ {
+ DP_RAISE (V);
+ return 0x7FFFFFFFFFFFFFFF;
+ }
+
+ db.d = res = sqrt (da.d);
+ tprintf("sqrt(%lf) = %016llx %016llx\n", da.d, res, db.ll);
+
+ rv = db.ll;
+
+ return rv;
+}
+
+fp_t
+rxdp_dtof (dp_t fa, int round_mode)
+{
+
+ DP_Parts a;
+ dp_t rv;
+
+ int sign, exp, mant, qnan;
+ dp_explode (fa, &a);
+
+ //tprintf("exp, mantisa, sign, type: %d 0x%016llx %d %d\n",a.exp, a.mant, a.sign, a.type);
+ //tprintf("explode: %016llx %d %x %016llx\n", f, sign, exp, mant);
+ switch (a.type)
+ {
+ case DP_NORMAL:
+ break;
+ case DP_PZERO:
+ return 0;
+ case DP_NZERO:
+ return 0x80000000UL;
+ case DP_DENORMAL:
+ DP_RAISE (E);
+ return 0;
+ case DP_QNAN:
+ qnan = 0x7F800000 | ((a.mant >> 29) & 0xFFFFFF);
+ return a.sign < 0? (qnan|0x00800000UL) : qnan;
+ case DP_SNAN:
+ DP_RAISE (V);
+ qnan = 0x7FC00000 | ((a.mant >> 29) & 0xFFFFFF);
+ return a.sign < 0? (qnan|0x00800000UL) : qnan;
+ }
+
+ if (a.exp >= 128)
+ {
+ if(a.type == DP_PINFINITY)
+ return 0x7f800000;
+ else
+ if (a.type == DP_NINFINITY)
+ return 0xff800000;
+ else
+ {
+ DP_RAISE (V);
+ return sign = a.sign < 0? 0xff800000 : 0x7f800000;
+ }
+ }
+ if (a.exp <= -127)
+ {
+ DP_RAISE (E);
+ DP_RAISE (U);
+ return 0;
+ }
+
+ a.exp -= 1024;
+ sign = a.sign < 0? -1 : 1;
+ exp = a.exp;
+ mant = (fa >> (52-23)) & 0x007fffffUL;
+ mant |= 0x00800000UL;
+//TO DO
+ //inexact exception occurs whn result is rounded
+ //overflow exception occurs when exponent after rounding is 128
+ if (fa & 0x1ffffffffULL)
+ {
+ switch (round_mode & 3)
+ {
+ case DPRM_NEAREST:
+ if (fa & 0x10000000ULL)
+ mant ++;
+ break;
+ case DPRM_ZERO:
+ break;
+ case DPRM_PINF:
+ if (!sign)
+ mant ++;
+ break;
+ case DPRM_NINF:
+ if (sign)
+ mant ++;
+ break;
+ }
+ }
+
+ exp += 127;
+ while (mant
+ && exp > 0
+ && mant < 0x00800000UL)
+ {
+ mant <<= 1;
+ exp --;
+ }
+
+ while (mant > 0x00ffffffUL)
+ {
+ mant >>= 1;
+ exp ++;
+ }
+
+ mant &= 0x007fffffUL;
+ exp &= 0xff;
+ mant |= exp << 23;
+
+ if (sign < 0)
+ mant |= 0x80000000UL;
+
+ return mant;
+}
+
+int
+rxdp_dtoi (dp_t fa, int round_mode)
+{
+
+ DP_Parts a;
+ dp_t rv;
+
+ int sign;
+ int whole_bits, frac_bits;
+
+
+ dp_explode (fa, &a);
+
+ switch (a.type)
+ {
+ case DP_NORMAL:
+ break;
+ case DP_PZERO:
+ case DP_NZERO:
+ return 0;
+ case DP_PINFINITY:
+ DP_RAISE (V);
+ return 0x7fffffffL;
+ case DP_NINFINITY:
+ DP_RAISE (V);
+ return 0x80000000L;
+ case DP_DENORMAL:
+ DP_RAISE (E);
+ return 0;
+ case DP_QNAN:
+ case DP_SNAN:
+ DP_RAISE (V);
+ return a.sign < 0? 0x80000000U : 0x7fffffff;
+ }
+
+
+ if (a.exp >= 31)
+ {
+ DP_RAISE (V);
+ return a.sign < 0? 0x80000000U : 0x7fffffff;
+ }
+
+
+ a.exp -= 52;
+
+
+ if (a.exp <= -54)
+ {
+ /* Less than 0.49999 */
+ frac_bits = a.mant;
+ whole_bits = 0;
+ }
+ else
+ if (a.exp < 0)
+ {
+ frac_bits = a.mant << (64 + a.exp);
+ whole_bits = a.mant >> (-a.exp);
+ }
+ else
+ {
+ frac_bits = 0;
+ whole_bits = a.mant << a.exp;
+ }
+
+ if (frac_bits)
+ {
+ switch (round_mode & 3)
+ {
+ case DPRM_NEAREST:
+ if (frac_bits & 0x10000000ULL)
+ whole_bits ++;
+ break;
+ case DPRM_ZERO:
+ break;
+ case DPRM_PINF:
+ if (!sign)
+ whole_bits ++;
+ break;
+ case DPRM_NINF:
+ if (sign)
+ whole_bits ++;
+ break;
+ }
+ }
+
+ rv = a.sign < 0? -whole_bits : whole_bits;
+
+ return rv;
+ }
+
+unsigned int
+rxdp_dtou (dp_t fa, int round_mode)
+{
+ DP_Parts a;
+ dp_t rv;
+
+ int sign;
+ int whole_bits, frac_bits;
+
+
+ dp_explode (fa, &a);
+
+ switch (a.type)
+ {
+ case DP_NORMAL:
+ break;
+ case DP_PZERO:
+ case DP_NZERO:
+ return 0;
+ case DP_PINFINITY:
+ DP_RAISE (V);
+ return 0xffffffffL;
+ case DP_NINFINITY:
+ DP_RAISE (V);
+ return 0;
+ case DP_DENORMAL:
+ DP_RAISE (E);
+ return 0;
+ case DP_QNAN:
+ case DP_SNAN:
+ DP_RAISE (V);
+ return a.sign < 0? 0x00000000U : 0xffffffff;
+ }
+
+
+ if (a.exp >= 31)
+ {
+ DP_RAISE (V);
+ return a.sign < 0? 0x00000000U : 0xffffffff;
+ }
+
+ a.exp -= 52;
+
+ if (a.exp <= -54)
+ {
+ /* Less than 0.49999 */
+ frac_bits = a.mant;
+ whole_bits = 0;
+ }
+ else
+ if (a.exp < 0)
+ {
+ frac_bits = a.mant << (64 + a.exp);
+ whole_bits = a.mant >> (-a.exp);
+ }
+ else
+ {
+ frac_bits = 0;
+ whole_bits = a.mant << a.exp;
+ }
+
+ if (frac_bits)
+ {
+ switch (round_mode & 3)
+ {
+ case DPRM_NEAREST:
+ if (frac_bits & 0x10000000ULL)
+ whole_bits ++;
+ break;
+ case DPRM_ZERO:
+ break;
+ case DPRM_PINF:
+ if (!sign)
+ whole_bits ++;
+ break;
+ case DPRM_NINF:
+ if (sign)
+ whole_bits ++;
+ break;
+ }
+ }
+
+ rv = a.sign < 0? 0x00000000U : whole_bits;
+
+ return rv;
+ }
+
+dp_t
+rxdp_ftod (fp_t fa)
+{
+ U_d_ll da;
+ double res;
+ unsigned long long qnan;
+
+ FP_Parts a;
+ fp_explode (fa, &a);
+
+ switch (a.type)
+ {
+ case FP_NORMAL:
+ break;
+ case FP_PZERO:
+ return 0;
+ case FP_NZERO:
+ return 0x8000000000000000;
+ case FP_DENORMAL:
+ DP_RAISE (E);
+ return 0;
+ case FP_NINFINITY:
+ return 0xFFF0000000000000;
+ case FP_PINFINITY:
+ return 0x7FF0000000000000;
+ case FP_QNAN:
+ qnan = a.mant << 29;
+ return a.sign<0? qnan & 0xFFFFFFFFFFFFFFFF : 0x7FFFFFFFFFFFFFFF;
+ case FP_SNAN:
+ DP_RAISE (V);
+ qnan = a.mant << 29;
+ return a.sign<0? qnan & 0xFFFFFFFFFFFFFFFF : 0x7FFFFFFFFFFFFFFF;
+ }
+
+ res = (double)(*(float *)&fa);
+
+ tprintf("(double) %f = %lf\n", (*(float *)&fa), res);
+
+ da.d = res;
+
+ return da.ll;
+}
+
+dp_t
+rxdp_itod (int fa)
+{
+ //DP_Parts a, b, c;
+ dp_t rv;
+ U_d_ll da;
+ double res;
+
+ res = (double)fa;
+
+ tprintf("(double) %d = %lf\n", fa, res);
+
+ da.d = res;
+
+ return da.ll;
+}
+
+dp_t
+rxdp_utod (unsigned int fa)
+{
+ //DP_Parts a, b, c;
+ dp_t rv;
+ U_d_ll da;
+ double res;
+
+ da.ll = fa;
+
+ res = (double)fa;
+
+ tprintf("(double) %u = %lf\n", fa, res);
+
+ da.d = res;
+
+ return da.ll;
+}
+
+double round(double x);
+double trunc(double x);
+double ceil(double x);
+double floor(double x);
+
+dp_t
+rxdp_round (dp_t fa, int round_mode)
+{
+ dp_t rv;
+ U_d_ll da, db;
+ DP_Parts a;
+ double res;
+
+ da.ll = fa;
+
+ dp_explode (fa, &a);
+
+ switch (a.type)
+ {
+ case DP_NORMAL:
+ break;
+ case DP_PZERO:
+ case DP_NZERO:
+ return 0;
+ case DP_PINFINITY:
+ DP_RAISE (V);
+ return 0x7fffffff;
+ case DP_NINFINITY:
+ DP_RAISE (V);
+ return 0x80000000;
+ case DP_DENORMAL:
+ DP_RAISE (E);
+ return 0;
+ case DP_QNAN:
+ case DP_SNAN:
+ DP_RAISE (V);
+ return a.sign < 0? 0x80000000U : 0x7fffffff;
+ }
+
+
+ if (a.exp >= 31)
+ {
+ DP_RAISE (V);
+ return a.sign < 0? 0x80000000U : 0x7FFFFFFF;
+ }
+
+ switch (round_mode & 3)
+ {
+ case DPRM_NEAREST:
+ db.d = res = round (da.d);
+ break;
+ case DPRM_ZERO:
+ db.d = res = trunc (da.d);
+ break;
+ case DPRM_PINF:
+ db.d = res = ceil (da.d);
+ break;
+ case DPRM_NINF:
+ db.d = res = floor (da.d);
+ break;
+ }
+
+
+ rv = rxdp_dtoi(db.ll,round_mode);
+
+ return rv;
+}
diff --git a/sim/rx/dpu.h b/sim/rx/dpu.h
new file mode 100644
index 000000000000..c460146bd8e4
--- /dev/null
+++ b/sim/rx/dpu.h
@@ -0,0 +1,38 @@
+/* dpu.h --- DPU emulator for stand-alone RX simulator.
+
+Copyright (C) 2018- Free Software Foundation, Inc.
+Contributed by CyberThor Studios Ltd.
+
+This file is part of the GNU simulators.
+
+This program is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 3 of the License, or
+(at your option) any later version.
+
+This program is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this program. If not, see . */
+
+typedef unsigned long long dp_t;
+typedef unsigned int fp_t;
+
+extern dp_t rxdp_add (dp_t fa, dp_t fb);
+extern dp_t rxdp_sub (dp_t fa, dp_t fb);
+extern unsigned int rxdp_cmp (dp_t fa, dp_t fb, unsigned int cond);
+extern dp_t rxdp_div (dp_t fa, dp_t fb);
+extern dp_t rxdp_mul (dp_t fa, dp_t fb);
+extern dp_t rxdp_abs (dp_t fa);
+extern dp_t rxdp_neg (dp_t fa);
+extern dp_t rxdp_dsqrt (dp_t fa);
+extern fp_t rxdp_dtof (dp_t fa, int round_mode);
+extern int rxdp_dtoi (dp_t fa, int round_mode);
+extern unsigned int rxdp_dtou (dp_t fa, int round_mode);
+extern dp_t rxdp_ftod (fp_t fa);
+extern dp_t rxdp_itod (int fa);
+extern dp_t rxdp_utod (unsigned int fa);
+extern dp_t rxdp_round (dp_t fa, int round_mode);
diff --git a/sim/rx/err.c b/sim/rx/err.c
index ceb17aaddbe5..d0f4b7084ea8 100644
--- a/sim/rx/err.c
+++ b/sim/rx/err.c
@@ -39,6 +39,8 @@ ee_overrides (void)
/* This breaks stack unwinding for exceptions because it leaves
MC_PUSHED_PC tags in the unwound stack frames. */
ee_actions[SIM_ERR_CORRUPT_STACK] = SIM_ERRACTION_IGNORE;
+ /* Address 0 does actually contain a valid word of RAM. */
+ ee_actions[SIM_ERR_NULL_POINTER_DEREFERENCE] = SIM_ERRACTION_IGNORE;
}
void
diff --git a/sim/rx/fpu.c b/sim/rx/fpu.c
index db7ee794942f..deda2bf3705e 100644
--- a/sim/rx/fpu.c
+++ b/sim/rx/fpu.c
@@ -37,7 +37,7 @@ along with this program. If not, see . */
X 00000000 00000000000000000000001 Denormals
X 00000000 11111111111111111111111
-
+
X 00000001 XXXXXXXXXXXXXXXXXXXXXXX Normals
X 11111110 XXXXXXXXXXXXXXXXXXXXXXX
@@ -358,7 +358,7 @@ static const char *ex_names[] = {
FALSE, the caller should do the "normal" operation. */
static int
check_exceptions (FP_Parts *a, FP_Parts *b, fp_t *c,
- FP_ExceptionCases ex_tab[5][5],
+ FP_ExceptionCases ex_tab[5][5],
FP_ExceptionCases *case_ret)
{
FP_ExceptionCases fpec;
@@ -723,7 +723,7 @@ rxfp_ftoi (fp_t fa, int round_mode)
}
rv = sign ? -whole_bits : whole_bits;
-
+
return rv;
}
@@ -792,3 +792,153 @@ rxfp_itof (long fa, int round_mode)
return rv;
}
+
+fp_t
+rxfp_utof (unsigned long fa, int round_mode)
+{
+ fp_t rv;
+ unsigned int frac_bits;
+ volatile unsigned int whole_bits;
+ FP_Parts a;
+
+ if (fa == 0)
+ return PLUS_ZERO;
+
+ a.sign = 1;
+
+ whole_bits = fa;
+ a.exp = 31;
+
+ while (! (whole_bits & 0x80000000UL))
+ {
+ a.exp --;
+ whole_bits <<= 1;
+ }
+ frac_bits = whole_bits & 0xff;
+ whole_bits = whole_bits >> 8;
+
+ if (frac_bits)
+ {
+ /* We must round */
+ switch (round_mode & 3)
+ {
+ case FPRM_NEAREST:
+ if (frac_bits & 0x80)
+ whole_bits ++;
+ break;
+ case FPRM_ZERO:
+ break;
+ case FPRM_PINF:
+ whole_bits ++;
+ break;
+ }
+ }
+
+ a.mant = whole_bits;
+ if (whole_bits & 0xff000000UL)
+ {
+ a.mant >>= 1;
+ a.exp ++;
+ }
+
+ rv = fp_implode (&a);
+ return rv;
+}
+
+unsigned long
+rxfp_ftou (fp_t fa)
+{
+ return (unsigned long)rxfp_ftoi(fa, FPRM_ZERO);
+}
+
+int
+check_sqrt_exceptions (FP_Parts *a, fp_t *c)
+{
+ /* handle exceptions which are the same for DN=1 and DN 0 */
+ switch(a->type)
+ {
+ case FP_NORMAL:
+ if(a->sign == -1)
+ {
+ /* invalid operation */
+ FP_RAISE(V);
+ return 1;
+ }
+ else
+ {
+ return 0;
+ }
+ case FP_PZERO:
+ *c = 0x00000000;
+ return 1;
+ case FP_NZERO:
+ *c = 0x80000000;
+ return 1;
+ case FP_PINFINITY:
+ *c = 0x7F800000;
+ return 1;
+ case FP_NINFINITY:
+ /* invalid operation */
+ FP_RAISE(V);
+ return 1;
+ case FP_QNAN:
+ *c = 0x7fffffff;
+ return 1;
+ case FP_SNAN:
+ /* invalid operation */
+ FP_RAISE(V);
+ return 1;
+ }
+
+
+ if(regs.r_fpsw & FPSWBITS_DN) /* DN = 1 */
+ {
+ if(a->type == FP_DENORMAL)
+ {
+ if(a->sign == 1)
+ {
+ *c = 0x00000000;
+ return 1;
+ }
+ else
+ {
+ *c = 0x80000000;
+ return 1;
+ }
+ }
+ }
+ else /* DN = 0 */
+ {
+ if(a->type == FP_DENORMAL)
+ {
+ /* Unimplemented */
+ FP_RAISE(V);
+ return 1;
+ }
+ }
+
+ return 0;
+}
+
+/* we don't include math because of FP_DENORMAL and others */
+double sqrt(double x);
+
+fp_t
+rxfp_fsqrt (fp_t fa)
+{
+ fp_t rv;
+ FP_Parts a, b;
+ double da;
+ fp_explode (fa, &a);
+ if(check_sqrt_exceptions(&a, &rv))
+ {
+ return rv;
+ }
+ da = fp_to_double (&a);
+ tprintf("sqrt(%g) = %g\n", da, sqrt(da));
+
+ double_to_fp(sqrt(da), &b);
+ rv = fp_implode (&b);
+
+ return rv;
+}
diff --git a/sim/rx/fpu.h b/sim/rx/fpu.h
index 65aaea8173eb..0690ca7b5ed0 100644
--- a/sim/rx/fpu.h
+++ b/sim/rx/fpu.h
@@ -27,3 +27,6 @@ extern fp_t rxfp_div (fp_t fa, fp_t fb);
extern void rxfp_cmp (fp_t fa, fp_t fb);
extern long rxfp_ftoi (fp_t fa, int round_mode);
extern fp_t rxfp_itof (long fa, int round_mode);
+extern fp_t rxfp_utof (unsigned long fa, int round_mode);
+extern unsigned long rxfp_ftou (fp_t fa);
+extern fp_t rxfp_fsqrt (fp_t fa);
diff --git a/sim/rx/gdb-if.c b/sim/rx/gdb-if.c
index 0fc626d9e9c3..1cb2fe6c1a04 100644
--- a/sim/rx/gdb-if.c
+++ b/sim/rx/gdb-if.c
@@ -36,6 +36,9 @@ along with this program. If not, see . */
#include "gdb/signals.h"
#include "sim/sim-rx.h"
+#include "bfd/elf-bfd.h"
+#include "elf/rx.h"
+
#include "cpu.h"
#include "mem.h"
#include "load.h"
@@ -59,12 +62,31 @@ static struct sim_state the_minisim = {
};
static int rx_sim_is_open;
+unsigned long rx_machine = bfd_mach_rx;
+int sim_rx_v2 = 0;
+int sim_rx_v3 = 0;
SIM_DESC
sim_open (SIM_OPEN_KIND kind,
struct host_callback_struct *callback,
struct bfd *abfd, char * const *argv)
{
+int index = 0;
+while(argv[index] != NULL)
+{
+ if(strcmp(argv[index], "-rx-force-isa=v2") == 0)
+ {
+ sim_rx_v2 = 1;
+ break;
+ }
+ if(strcmp(argv[index], "-rx-force-isa=v3") == 0)
+ {
+ sim_rx_v3 = 1;
+ break;
+ }
+ index++;
+}
+
if (rx_sim_is_open)
fprintf (stderr, "rx minisim: re-opened sim\n");
@@ -156,7 +178,7 @@ build_swap_list (struct bfd *abfd)
{
asection *s;
free_swap_list ();
-
+
/* Nothing to do when in little endian mode. */
if (!rx_big_endian)
return;
@@ -171,7 +193,7 @@ build_swap_list (struct bfd *abfd)
size = bfd_section_size (s);
if (size <= 0)
continue;
-
+
sl = malloc (sizeof (struct swap_list));
assert (sl != NULL);
sl->next = swap_list;
@@ -198,6 +220,8 @@ addr_in_swap_list (bfd_vma addr)
SIM_RC
sim_load (SIM_DESC sd, const char *prog, struct bfd *abfd, int from_tty)
{
+ int elf_flags;
+
check_desc (sd);
if (!abfd)
@@ -208,6 +232,44 @@ sim_load (SIM_DESC sd, const char *prog, struct bfd *abfd, int from_tty)
rx_load (abfd, get_callbacks ());
build_swap_list (abfd);
+ /* Extract the elf_flags if available. */
+ if ((abfd != NULL) && (bfd_get_flavour (abfd) == bfd_target_elf_flavour))
+ {
+ elf_flags = elf_elfheader (abfd)->e_flags;
+ }
+ else
+ {
+ elf_flags = 0;
+ }
+
+ if (((elf_flags & E_FLAG_RX_V_MASK) == E_FLAG_RX_V3)
+ && (elf_flags & E_FLAG_RX_V3_DFPU))
+ {
+ rx_machine = bfd_mach_rx_v3_dfpu;
+ }
+ else if ((elf_flags & E_FLAG_RX_V_MASK) == E_FLAG_RX_V3)
+ {
+ rx_machine = bfd_mach_rx_v3;
+ }
+ else if ((elf_flags & E_FLAG_RX_V_MASK) == E_FLAG_RX_V2)
+ {
+ rx_machine = bfd_mach_rx_v2;
+ }
+ else
+ {
+ rx_machine = bfd_mach_rx;
+ }
+
+ /* force rxv2 if necessary */
+ if(sim_rx_v2)
+ {
+ rx_machine = bfd_mach_rx_v2;
+ }
+ if(sim_rx_v3)
+ {
+ rx_machine = bfd_mach_rx_v3;
+ }
+
return SIM_RC_OK;
}
@@ -234,9 +296,6 @@ sim_read (SIM_DESC sd, uint64_t addr, void *buffer, uint64_t length)
check_desc (sd);
- if (addr == 0)
- return 0;
-
execution_error_clear_last_error ();
for (i = 0; i < length; i++)
@@ -245,6 +304,13 @@ sim_read (SIM_DESC sd, uint64_t addr, void *buffer, uint64_t length)
int do_swap = addr_in_swap_list (vma);
data[i] = mem_get_qi (vma ^ (do_swap ? 3 : 0));
+ /* If error, attempt to fetch the memory byte a second time. */
+ if (execution_error_get_last_error () != SIM_ERR_NONE)
+ {
+ execution_error_clear_last_error ();
+ data[i] = mem_get_qi (addr ^ (do_swap ? 3 : 0));
+ }
+
if (execution_error_get_last_error () != SIM_ERR_NONE)
return i;
}
@@ -385,6 +451,54 @@ reg_size (enum sim_rx_regnum regno)
case sim_rx_r15_regnum:
size = sizeof (regs.r[15]);
break;
+ case sim_rx_dr0_regnum:
+ size = sizeof (regs.dr[0]);
+ break;
+ case sim_rx_dr1_regnum:
+ size = sizeof (regs.dr[1]);
+ break;
+ case sim_rx_dr2_regnum:
+ size = sizeof (regs.dr[2]);
+ break;
+ case sim_rx_dr3_regnum:
+ size = sizeof (regs.dr[3]);
+ break;
+ case sim_rx_dr4_regnum:
+ size = sizeof (regs.dr[4]);
+ break;
+ case sim_rx_dr5_regnum:
+ size = sizeof (regs.dr[5]);
+ break;
+ case sim_rx_dr6_regnum:
+ size = sizeof (regs.dr[6]);
+ break;
+ case sim_rx_dr7_regnum:
+ size = sizeof (regs.dr[7]);
+ break;
+ case sim_rx_dr8_regnum:
+ size = sizeof (regs.dr[8]);
+ break;
+ case sim_rx_dr9_regnum:
+ size = sizeof (regs.dr[9]);
+ break;
+ case sim_rx_dr10_regnum:
+ size = sizeof (regs.dr[10]);
+ break;
+ case sim_rx_dr11_regnum:
+ size = sizeof (regs.dr[11]);
+ break;
+ case sim_rx_dr12_regnum:
+ size = sizeof (regs.dr[12]);
+ break;
+ case sim_rx_dr13_regnum:
+ size = sizeof (regs.dr[13]);
+ break;
+ case sim_rx_dr14_regnum:
+ size = sizeof (regs.dr[14]);
+ break;
+ case sim_rx_dr15_regnum:
+ size = sizeof (regs.dr[15]);
+ break;
case sim_rx_isp_regnum:
size = sizeof (regs.r_isp);
break;
@@ -412,9 +526,36 @@ reg_size (enum sim_rx_regnum regno)
case sim_rx_fpsw_regnum:
size = sizeof (regs.r_fpsw);
break;
- case sim_rx_acc_regnum:
- size = sizeof (regs.r_acc);
- break;
+ case sim_rx_dpsw_regnum:
+ size = sizeof (regs.r_dpsw);
+ break;
+ case sim_rx_dcmr_regnum:
+ size = sizeof (regs.r_dcmr);
+ break;
+ case sim_rx_decnt_regnum:
+ size = sizeof (regs.r_decnt);
+ break;
+ case sim_rx_depc_regnum:
+ size = sizeof (regs.r_depc);
+ break;
+ /* ACC0 from RXV2 will be ACC from RX */
+ case sim_rx_acc0_regnum:
+ if(rx_machine == bfd_mach_rx)
+ {
+ size = sizeof(unsigned long long);
+ }
+ else
+ {
+ size = 2 * sizeof(unsigned long long);
+ }
+ break;
+ case sim_rx_acc1_regnum:
+ size = 2 * sizeof(unsigned long long);
+ break;
+ case sim_rx_extb_regnum:
+ size = sizeof(regs.r_extb);
+ break;
+
default:
size = 0;
break;
@@ -426,7 +567,8 @@ int
sim_fetch_register (SIM_DESC sd, int regno, void *buf, int length)
{
size_t size;
- DI val;
+ DI val = 0;
+ unsigned long long *acc72val = NULL;
check_desc (sd);
@@ -488,6 +630,54 @@ sim_fetch_register (SIM_DESC sd, int regno, void *buf, int length)
case sim_rx_r15_regnum:
val = get_reg (15);
break;
+ case sim_rx_dr0_regnum:
+ val = get_reg_double (0);
+ break;
+ case sim_rx_dr1_regnum:
+ val = get_reg_double (1);
+ break;
+ case sim_rx_dr2_regnum:
+ val = get_reg_double (2);
+ break;
+ case sim_rx_dr3_regnum:
+ val = get_reg_double (3);
+ break;
+ case sim_rx_dr4_regnum:
+ val = get_reg_double (4);
+ break;
+ case sim_rx_dr5_regnum:
+ val = get_reg_double (5);
+ break;
+ case sim_rx_dr6_regnum:
+ val = get_reg_double (6);
+ break;
+ case sim_rx_dr7_regnum:
+ val = get_reg_double (7);
+ break;
+ case sim_rx_dr8_regnum:
+ val = get_reg_double (8);
+ break;
+ case sim_rx_dr9_regnum:
+ val = get_reg_double (9);
+ break;
+ case sim_rx_dr10_regnum:
+ val = get_reg_double (10);
+ break;
+ case sim_rx_dr11_regnum:
+ val = get_reg_double (11);
+ break;
+ case sim_rx_dr12_regnum:
+ val = get_reg_double (12);
+ break;
+ case sim_rx_dr13_regnum:
+ val = get_reg_double (13);
+ break;
+ case sim_rx_dr14_regnum:
+ val = get_reg_double (14);
+ break;
+ case sim_rx_dr15_regnum:
+ val = get_reg_double (15);
+ break;
case sim_rx_isp_regnum:
val = get_reg (isp);
break;
@@ -515,15 +705,60 @@ sim_fetch_register (SIM_DESC sd, int regno, void *buf, int length)
case sim_rx_fpsw_regnum:
val = get_reg (fpsw);
break;
- case sim_rx_acc_regnum:
- val = ((DI) get_reg (acchi) << 32) | get_reg (acclo);
- break;
+ case sim_rx_dpsw_regnum:
+ val = get_reg (dpsw);
+ break;
+ case sim_rx_dcmr_regnum:
+ val = get_reg (dcmr);
+ break;
+ case sim_rx_decnt_regnum:
+ val = get_reg (decnt);
+ break;
+ case sim_rx_depc_regnum:
+ val = get_reg (depc);
+ break;
+ /* ACC0 from RXV2 will be ACC from RX */
+ case sim_rx_acc0_regnum:
+ if(rx_machine == bfd_mach_rx)
+ {
+ acc72val = get_reg72(acc0);
+ val = acc72val[0];
+ }
+ else
+ {
+ acc72val = get_reg72(acc0);
+ }
+ break;
+ case sim_rx_acc1_regnum:
+ acc72val = get_reg72(acc1);
+ break;
+ case sim_rx_extb_regnum:
+ val = get_reg (extb);
+ break;
+
default:
fprintf (stderr, "rx minisim: unrecognized register number: %d\n",
regno);
return -1;
}
+ if(length > sizeof(DI))
+ {
+ if (rx_big_endian)
+ {
+ put_be (buf, length/2, acc72val[1]);
+ put_be (buf + sizeof(unsigned long long), length/2, acc72val[0]);
+ }
+ else
+ {
+ put_le (buf, length/2, acc72val[0]);
+ put_le (buf + sizeof(unsigned long long), length/2, acc72val[1]);
+ }
+
+ return 2 * sizeof(unsigned long long);
+ }
+ else
+ {
if (rx_big_endian)
put_be (buf, length, val);
else
@@ -531,13 +766,14 @@ sim_fetch_register (SIM_DESC sd, int regno, void *buf, int length)
return size;
}
+}
int
sim_store_register (SIM_DESC sd, int regno, const void *buf, int length)
{
size_t size;
- DI val;
-
+ DI val = 0;
+ unsigned long long acc72val[2];
check_desc (sd);
if (!check_regno (regno))
@@ -548,10 +784,26 @@ sim_store_register (SIM_DESC sd, int regno, const void *buf, int length)
if (length != size)
return -1;
+ if(size > sizeof(val))
+ {
+ if (rx_big_endian)
+ {
+ acc72val[0] = get_be (buf + sizeof(unsigned long long), length/2);
+ acc72val[1] = get_be (buf, length/2);
+ }
+ else
+ {
+ acc72val[0] = get_le (buf, length/2);
+ acc72val[1] = get_le (buf + sizeof(unsigned long long), length/2);
+ }
+ }
+ else
+ {
if (rx_big_endian)
val = get_be (buf, length);
else
val = get_le (buf, length);
+ }
switch (regno)
{
@@ -603,6 +855,54 @@ sim_store_register (SIM_DESC sd, int regno, const void *buf, int length)
case sim_rx_r15_regnum:
put_reg (15, val);
break;
+ case sim_rx_dr0_regnum:
+ put_reg_double (0, val);
+ break;
+ case sim_rx_dr1_regnum:
+ put_reg_double (1, val);
+ break;
+ case sim_rx_dr2_regnum:
+ put_reg_double (2, val);
+ break;
+ case sim_rx_dr3_regnum:
+ put_reg_double (3, val);
+ break;
+ case sim_rx_dr4_regnum:
+ put_reg_double (4, val);
+ break;
+ case sim_rx_dr5_regnum:
+ put_reg_double (5, val);
+ break;
+ case sim_rx_dr6_regnum:
+ put_reg_double (6, val);
+ break;
+ case sim_rx_dr7_regnum:
+ put_reg_double (7, val);
+ break;
+ case sim_rx_dr8_regnum:
+ put_reg_double (8, val);
+ break;
+ case sim_rx_dr9_regnum:
+ put_reg_double (9, val);
+ break;
+ case sim_rx_dr10_regnum:
+ put_reg_double (10, val);
+ break;
+ case sim_rx_dr11_regnum:
+ put_reg_double (11, val);
+ break;
+ case sim_rx_dr12_regnum:
+ put_reg_double (12, val);
+ break;
+ case sim_rx_dr13_regnum:
+ put_reg_double (13, val);
+ break;
+ case sim_rx_dr14_regnum:
+ put_reg_double (14, val);
+ break;
+ case sim_rx_dr15_regnum:
+ put_reg_double (15, val);
+ break;
case sim_rx_isp_regnum:
put_reg (isp, val);
break;
@@ -630,9 +930,36 @@ sim_store_register (SIM_DESC sd, int regno, const void *buf, int length)
case sim_rx_fpsw_regnum:
put_reg (fpsw, val);
break;
- case sim_rx_acc_regnum:
- put_reg (acclo, val & 0xffffffff);
- put_reg (acchi, (val >> 32) & 0xffffffff);
+ case sim_rx_dpsw_regnum:
+ put_reg (dpsw, val);
+ break;
+ case sim_rx_dcmr_regnum:
+ put_reg (dcmr, val);
+ break;
+ case sim_rx_decnt_regnum:
+ put_reg (decnt, val);
+ break;
+ case sim_rx_depc_regnum:
+ put_reg (depc, val);
+ break;
+ /* ACC0 from RXV2 will be ACC from RX */
+ case sim_rx_acc0_regnum:
+ if(rx_machine == bfd_mach_rx)
+ {
+ acc72val[0] = val;
+ acc72val[1] = 0;
+ put_reg72(acc0, acc72val);
+ }
+ else
+ {
+ put_reg72(acc0, acc72val);
+ }
+ break;
+ case sim_rx_acc1_regnum:
+ put_reg72(acc1, acc72val);
+ break;
+ case sim_rx_extb_regnum:
+ put_reg(extb, val);
break;
default:
fprintf (stderr, "rx minisim: unrecognized register number: %d\n",
@@ -805,13 +1132,35 @@ sim_do_command (SIM_DESC sd, const char *cmd)
check_desc (sd);
- cmd = arg = "";
- if (argv != NULL)
+ if (cmd == NULL)
{
- if (argv[0] != NULL)
- cmd = argv[0];
- if (argv[1] != NULL)
- arg = argv[1];
+ cmd = "";
+ arg = "";
+ }
+ else
+ {
+ char *p = cmd;
+
+ /* Skip leading whitespace. */
+ while (isspace (*p))
+ p++;
+
+ /* Find the extent of the command word. */
+ for (p = cmd; *p; p++)
+ if (isspace (*p))
+ break;
+
+ /* Null-terminate the command word, and record the start of any
+ further arguments. */
+ if (*p)
+ {
+ *p = '\0';
+ arg = p + 1;
+ while (isspace (*arg))
+ arg++;
+ }
+ else
+ arg = p;
}
if (strcmp (cmd, "trace") == 0)
diff --git a/sim/rx/load.c b/sim/rx/load.c
index 8b9cbb324859..7eba4d1f1590 100644
--- a/sim/rx/load.c
+++ b/sim/rx/load.c
@@ -114,7 +114,7 @@ rx_load (bfd *prog, host_callback *callback)
fprintf (stderr, "Failed to read program headers\n");
return;
}
-
+
for (i = 0; i < num_headers; i++)
{
Elf_Internal_Phdr * p = phdrs + i;
@@ -146,7 +146,7 @@ rx_load (bfd *prog, host_callback *callback)
fprintf (stderr, "Failed to allocate buffer to hold program segment\n");
continue;
}
-
+
offset = p->p_offset;
if (bfd_seek (prog, offset, SEEK_SET) != 0)
{
@@ -177,7 +177,7 @@ rx_load (bfd *prog, host_callback *callback)
heaptop = heapbottom = 0;
}
- reset_decoder ();
+ reset_decoder (regs.r_pc);
if (verbose > 1)
fprintf (stderr, "[start pc=%08x %s]\n",
diff --git a/sim/rx/local.mk b/sim/rx/local.mk
index 5c7d9cd1b25f..b433af3bffef 100644
--- a/sim/rx/local.mk
+++ b/sim/rx/local.mk
@@ -24,6 +24,7 @@ nodist_%C%_libsim_a_SOURCES = \
$(common_libcommon_a_SOURCES)
%C%_libsim_a_LIBADD = \
%D%/fpu.o \
+ %D%/dpu.o \
%D%/load.o \
%D%/mem.o \
%D%/misc.o \
diff --git a/sim/rx/main.c b/sim/rx/main.c
index d1015e6d1012..6b66e02aa558 100644
--- a/sim/rx/main.c
+++ b/sim/rx/main.c
@@ -46,6 +46,9 @@ static int disassemble = 0;
#define ACT(E,A) (OPT_ACT + SIM_ERR_##E * SIM_ERRACTION_NUM_ACTIONS + SIM_ERRACTION_##A)
+extern int tfu;
+extern unsigned ccrx_sys_flags;
+
static struct option sim_options[] =
{
{ "end-sim-args", 0, NULL, 'E' },
@@ -61,6 +64,8 @@ static struct option sim_options[] =
{ "exit-corrupt-stack", 0, NULL, ACT(CORRUPT_STACK,EXIT) },
{ "warn-corrupt-stack", 0, NULL, ACT(CORRUPT_STACK,WARN) },
{ "ignore-corrupt-stack", 0, NULL, ACT(CORRUPT_STACK,IGNORE) },
+ { "tfu", 0, NULL, 'T'},
+ { "ccrx-sys-flags", 0, NULL, 'C'},
{ 0, 0, 0, 0 }
};
@@ -102,6 +107,15 @@ main (int argc, char **argv)
on to the program being simulated. */
break;
+ if (o == 'T')
+ {
+ tfu = 1;
+ }
+ if (o == 'C')
+ {
+ ccrx_sys_flags = 1;
+ }
+
if (o >= OPT_ACT)
{
int e, a;
diff --git a/sim/rx/mem.c b/sim/rx/mem.c
index 75238ef806e1..01fdb5b59699 100644
--- a/sim/rx/mem.c
+++ b/sim/rx/mem.c
@@ -31,6 +31,7 @@ along with this program. If not, see . */
#include
#include
#include
+#include
#include "opcode/rx.h"
#include "mem.h"
@@ -47,12 +48,15 @@ along with this program. If not, see . */
#define L2_LEN (1 << L2_BITS)
#define OFF_LEN (1 << OFF_BITS)
+/* context memory: 256 locations containing: r1-r15, USP, FPSW, ACC0, ACC1 */
+static unsigned char context_memory[256][4*15+4+4+2*12];
+
static unsigned char **pt[L1_LEN];
static unsigned char **ptr[L1_LEN];
static RX_Opcode_Decoded ***ptdc[L1_LEN];
/* [ get=0/put=1 ][ byte size ] */
-static unsigned int mem_counters[2][5];
+static unsigned int mem_counters[2][13];
#define COUNT(isput,bytes) \
if (verbose && enable_counting) mem_counters[isput][bytes]++
@@ -75,6 +79,26 @@ init_mem (void)
memset (mem_counters, 0, sizeof (mem_counters));
}
+unsigned char
+rx_context_mem_read_byte (unsigned long location, unsigned long offset)
+{
+ if (trace)
+ {
+ printf (" context_memory(%d)[%d] => 0x%02X\n", location, offset, context_memory[location][offset]);
+ }
+ return context_memory[location][offset];
+}
+
+unsigned char
+rx_context_mem_write_byte (unsigned long location, unsigned long offset, unsigned char value)
+{
+ if (trace)
+ {
+ printf (" context_memory(%d)[%d] <= 0x%02X\n", location, offset, value);
+ }
+ context_memory[location][offset] = value;
+}
+
unsigned char *
rx_mem_ptr (unsigned long address, enum mem_ptr_action action)
{
@@ -414,9 +438,154 @@ mem_put_psi (int address, unsigned long value)
COUNT (1, 3);
}
+unsigned int converttoq131(float n) {
+ unsigned result = (n < 0)? (1 << 31) : 0;
+ float index = 1;
+ if (n < 0) n = -n;
+ for (int i = 1; i <= 31; ++i) {
+ index /= 2;
+ if (n >= index) {
+ result |= (1 << 31 - i);
+ n -= index;
+ }
+ }
+ return result;
+}
+
+float convertfromq131(unsigned int n) {
+ float result = 0;
+ float index = 1;
+ for (int i = 1; i <= 31; ++i) {
+ index /= 2;
+ result += ((n >> (31 - i)) & 1) * index;
+ }
+ result *= (n >> 31) ? -1 : 1;
+ return result;
+}
+
+typedef union {
+ unsigned long l;
+ float d;
+} U_d_ll;
+
+int tfu;
+
void
mem_put_si (int address, unsigned long value)
{
+ U_d_ll da, db;
+
+ if (tfu)
+ {
+ int newAddr;
+ unsigned long value2;
+ switch (address)
+ {
+ case 0x00081410:
+ break;
+ case 0x00081414:
+ da.l = value;
+ newAddr = 0x00081410;
+ da.d = cos (da.d);
+
+ if (rx_big_endian)
+ {
+ mem_put_byte (newAddr + 0, (da.l >> 24) & 0xff);
+ mem_put_byte (newAddr + 1, (da.l >> 16) & 0xff);
+ mem_put_byte (newAddr + 2, (da.l >> 8) & 0xff);
+ mem_put_byte (newAddr + 3, da.l & 0xff);
+ }
+ else
+ {
+ mem_put_byte (newAddr + 0, da.l & 0xff);
+ mem_put_byte (newAddr + 1, (da.l >> 8) & 0xff);
+ mem_put_byte (newAddr + 2, (da.l >> 16) & 0xff);
+ mem_put_byte (newAddr + 3, (da.l >> 24) & 0xff);
+ }
+ da.l = value;
+ da.d = sin (da.d);
+ value = da.l;
+ break;
+ case 0x00081424:
+ da.d = convertfromq131(value);
+ da.d = cos (da.d);
+ newAddr = 0x00081420;
+ da.l = converttoq131(da.d);
+ if (rx_big_endian)
+ {
+ mem_put_byte (newAddr + 0, (da.l >> 24) & 0xff);
+ mem_put_byte (newAddr + 1, (da.l >> 16) & 0xff);
+ mem_put_byte (newAddr + 2, (da.l >> 8) & 0xff);
+ mem_put_byte (newAddr + 3, da.l & 0xff);
+ }
+ else
+ {
+ mem_put_byte (newAddr + 0, da.l & 0xff);
+ mem_put_byte (newAddr + 1, (da.l >> 8) & 0xff);
+ mem_put_byte (newAddr + 2, (da.l >> 16) & 0xff);
+ mem_put_byte (newAddr + 3, (da.l >> 24) & 0xff);
+ }
+ da.d = convertfromq131(value);
+ da.d = sin (da.d);
+ value = converttoq131(da.d);
+ break;
+ case 0x00081420:
+ break;
+ case 0x00081418:
+ break;
+ case 0x0008141c:
+ da.l = value;
+ newAddr = 0x00081418;
+ value2 = db.l = mem_get_si (newAddr);
+ db.d = hypot (db.d, da.d) / 0.607253f;
+
+ if (rx_big_endian)
+ {
+ mem_put_byte (newAddr + 0, (db.l >> 24) & 0xff);
+ mem_put_byte (newAddr + 1, (db.l >> 16) & 0xff);
+ mem_put_byte (newAddr + 2, (db.l >> 8) & 0xff);
+ mem_put_byte (newAddr + 3, db.l & 0xff);
+ }
+ else
+ {
+ mem_put_byte (newAddr + 0, db.l & 0xff);
+ mem_put_byte (newAddr + 1, (db.l >> 8) & 0xff);
+ mem_put_byte (newAddr + 2, (db.l >> 16) & 0xff);
+ mem_put_byte (newAddr + 3, (db.l >> 24) & 0xff);
+ }
+ db.l = value2;
+ da.d = atan2 (da.d, db.d);
+ value = da.l;
+ break;
+ case 0x00081428:
+ break;
+ case 0x0008142c:
+ da.d = convertfromq131(value);
+ newAddr = 0x00081428;
+ value2 = mem_get_si (newAddr);
+ db.d = convertfromq131(value2);
+ db.d = hypot (db.d, da.d) / 0.607253f;
+ db.l = converttoq131(db.d);
+ if (rx_big_endian)
+ {
+ mem_put_byte (newAddr + 0, (db.l >> 24) & 0xff);
+ mem_put_byte (newAddr + 1, (db.l >> 16) & 0xff);
+ mem_put_byte (newAddr + 2, (db.l >> 8) & 0xff);
+ mem_put_byte (newAddr + 3, db.l & 0xff);
+ }
+ else
+ {
+ mem_put_byte (newAddr + 0, db.l & 0xff);
+ mem_put_byte (newAddr + 1, (db.l >> 8) & 0xff);
+ mem_put_byte (newAddr + 2, (db.l >> 16) & 0xff);
+ mem_put_byte (newAddr + 3, (db.l >> 24) & 0xff);
+ }
+ db.d = convertfromq131(value2);
+ da.d = atan2 (da.d, db.d);
+ value = converttoq131(da.d);
+ break;
+ }
+ }
S ("<=");
if (rx_big_endian)
{
@@ -436,6 +605,94 @@ mem_put_si (int address, unsigned long value)
COUNT (1, 4);
}
+void
+mem_put_di (int address, unsigned long long value)
+{
+ S ("<=");
+ if (rx_big_endian)
+ {
+ mem_put_byte (address + 0, (value >> 56) & 0xff);
+ mem_put_byte (address + 1, (value >> 48) & 0xff);
+ mem_put_byte (address + 2, (value >> 40) & 0xff);
+ mem_put_byte (address + 3, (value >> 32) & 0xff);
+ mem_put_byte (address + 4, (value >> 24) & 0xff);
+ mem_put_byte (address + 5, (value >> 16) & 0xff);
+ mem_put_byte (address + 6, (value >> 8) & 0xff);
+ mem_put_byte (address + 7, value & 0xff);
+ }
+ else
+ {
+ mem_put_byte (address + 0, value & 0xff);
+ mem_put_byte (address + 1, (value >> 8) & 0xff);
+ mem_put_byte (address + 2, (value >> 16) & 0xff);
+ mem_put_byte (address + 3, (value >> 24) & 0xff);
+ mem_put_byte (address + 4, (value >> 32) & 0xff);
+ mem_put_byte (address + 5, (value >> 40) & 0xff);
+ mem_put_byte (address + 6, (value >> 48) & 0xff);
+ mem_put_byte (address + 7, (value >> 56) & 0xff);
+ }
+ E ();
+ COUNT (1, 8);
+}
+
+void
+mem_put_context_si (unsigned long location, unsigned long offset, unsigned long value)
+{
+ if (rx_big_endian)
+ {
+ rx_context_mem_write_byte (location, offset, (value >> 24) & 0xff);
+ rx_context_mem_write_byte (location, offset + 1, (value >> 16) & 0xff);
+ rx_context_mem_write_byte (location, offset + 2, (value >> 8) & 0xff);
+ rx_context_mem_write_byte (location, offset + 3, value & 0xff);
+ }
+ else
+ {
+ rx_context_mem_write_byte (location, offset, value & 0xff);
+ rx_context_mem_write_byte (location, offset + 1, (value >> 8) & 0xff);
+ rx_context_mem_write_byte (location, offset + 2, (value >> 16) & 0xff);
+ rx_context_mem_write_byte (location, offset + 3, (value >> 24) & 0xff);
+ }
+ E ();
+ COUNT (1, 4);
+}
+
+void
+mem_put_context_acc (unsigned long location, unsigned long offset, unsigned long long *value)
+{
+ if (rx_big_endian)
+ {
+ rx_context_mem_write_byte (location, offset, (value[1] >> 24) & 0xff);
+ rx_context_mem_write_byte (location, offset + 1, (value[1] >> 16) & 0xff);
+ rx_context_mem_write_byte (location, offset + 2, (value[1] >> 8) & 0xff);
+ rx_context_mem_write_byte (location, offset + 3, value[1] & 0xff);
+ rx_context_mem_write_byte (location, offset + 4, (value[0] >> 56) & 0xff);
+ rx_context_mem_write_byte (location, offset + 5, (value[0] >> 48) & 0xff);
+ rx_context_mem_write_byte (location, offset + 6, (value[0] >> 40) & 0xff);
+ rx_context_mem_write_byte (location, offset + 7, (value[0] >> 32) & 0xff);
+ rx_context_mem_write_byte (location, offset + 8, (value[0] >> 24) & 0xff);
+ rx_context_mem_write_byte (location, offset + 9, (value[0] >> 16) & 0xff);
+ rx_context_mem_write_byte (location, offset + 10, (value[0] >> 8) & 0xff);
+ rx_context_mem_write_byte (location, offset + 11, value[0] & 0xff);
+ }
+ else
+ {
+ rx_context_mem_write_byte (location, offset, value[0] & 0xff);
+ rx_context_mem_write_byte (location, offset + 1, (value[0] >> 8) & 0xff);
+ rx_context_mem_write_byte (location, offset + 2, (value[0] >> 16) & 0xff);
+ rx_context_mem_write_byte (location, offset + 3, (value[0] >> 24) & 0xff);
+ rx_context_mem_write_byte (location, offset + 4, (value[0] >> 32) & 0xff);
+ rx_context_mem_write_byte (location, offset + 5, (value[0] >> 40) & 0xff);
+ rx_context_mem_write_byte (location, offset + 6, (value[0] >> 48) & 0xff);
+ rx_context_mem_write_byte (location, offset + 7, (value[0] >> 56) & 0xff);
+ rx_context_mem_write_byte (location, offset + 8, value[1] & 0xff);
+ rx_context_mem_write_byte (location, offset + 9, (value[1] >> 8) & 0xff);
+ rx_context_mem_write_byte (location, offset + 10, (value[1] >> 16) & 0xff);
+ rx_context_mem_write_byte (location, offset + 11, (value[1] >> 24) & 0xff);
+ }
+ E ();
+ COUNT (1, 12);
+}
+
void
mem_put_blk (int address, void *bufptr_void, int nbytes)
{
@@ -470,7 +727,7 @@ mem_get_byte (unsigned int address)
E();
return 0x04; /* transmitter empty */
break;
- default:
+ default:
if (trace)
printf (" %02x%c", *m, mtypec (address));
if (is_reserved_address (address))
@@ -571,6 +828,102 @@ mem_get_si (int address)
return rv;
}
+unsigned long long
+mem_get_di (int address)
+{
+ unsigned long long rv;
+ S ("=>");
+ if (rx_big_endian)
+ {
+ rv = (unsigned long long)mem_get_byte (address + 7);
+ rv |= (unsigned long long)mem_get_byte (address + 6) << 8;
+ rv |= (unsigned long long)mem_get_byte (address + 5) << 16;
+ rv |= (unsigned long long)mem_get_byte (address + 4) << 24;
+ rv |= (unsigned long long)mem_get_byte (address + 3) << 32;
+ rv |= (unsigned long long)mem_get_byte (address + 2) << 40;
+ rv |= (unsigned long long)mem_get_byte (address + 1) << 48;
+ rv |= (unsigned long long)mem_get_byte (address) << 56;
+ }
+ else
+ {
+ rv = (unsigned long long)mem_get_byte (address);
+ rv |= (unsigned long long)mem_get_byte (address + 1) << 8;
+ rv |= (unsigned long long)mem_get_byte (address + 2) << 16;
+ rv |= (unsigned long long)mem_get_byte (address + 3) << 24;
+ rv |= (unsigned long long)mem_get_byte (address + 4) << 32;
+ rv |= (unsigned long long)mem_get_byte (address + 5) << 40;
+ rv |= (unsigned long long)mem_get_byte (address + 6) << 48;
+ rv |= (unsigned long long)mem_get_byte (address + 7) << 56;
+ }
+ COUNT (0, 8);
+ E ();
+ return rv;
+}
+
+unsigned long
+mem_get_context_si (unsigned long location, unsigned long offset)
+{
+ unsigned long rv;
+
+ if (rx_big_endian)
+ {
+ rv = rx_context_mem_read_byte (location, offset + 3);
+ rv |= rx_context_mem_read_byte (location, offset + 2) << 8;
+ rv |= rx_context_mem_read_byte (location, offset + 1) << 16;
+ rv |= rx_context_mem_read_byte (location, offset) << 24;
+ }
+ else
+ {
+ rv = rx_context_mem_read_byte (location, offset);
+ rv |= rx_context_mem_read_byte (location, offset + 1) << 8;
+ rv |= rx_context_mem_read_byte (location, offset + 2) << 16;
+ rv |= rx_context_mem_read_byte (location, offset + 3) << 24;
+ }
+ COUNT (0, 4);
+ E ();
+ return rv;
+}
+
+unsigned long long *
+mem_get_context_acc (unsigned long location, unsigned long offset)
+{
+ unsigned long long *rv = malloc (sizeof(long long) * 2);
+
+ if (rx_big_endian)
+ {
+ rv[0] = (unsigned long long)rx_context_mem_read_byte (location, offset + 11);
+ rv[0] |= (unsigned long long)rx_context_mem_read_byte (location, offset + 10) << 8;
+ rv[0] |= (unsigned long long)rx_context_mem_read_byte (location, offset + 9) << 16;
+ rv[0] |= (unsigned long long)rx_context_mem_read_byte (location, offset + 8) << 24;
+ rv[0] |= (unsigned long long)rx_context_mem_read_byte (location, offset + 7) << 32;
+ rv[0] |= (unsigned long long)rx_context_mem_read_byte (location, offset + 6) << 40;
+ rv[0] |= (unsigned long long)rx_context_mem_read_byte (location, offset + 5) << 48;
+ rv[0] |= (unsigned long long)rx_context_mem_read_byte (location, offset + 4) << 56;
+ rv[1] |= (unsigned long long)rx_context_mem_read_byte (location, offset + 3);
+ rv[1] |= (unsigned long long)rx_context_mem_read_byte (location, offset + 2) << 8;
+ rv[1] |= (unsigned long long)rx_context_mem_read_byte (location, offset + 1) << 16;
+ rv[1] |= (unsigned long long)rx_context_mem_read_byte (location, offset) << 24;
+ }
+ else
+ {
+ rv[0] = (unsigned long long)rx_context_mem_read_byte (location, offset);
+ rv[0] |= (unsigned long long)rx_context_mem_read_byte (location, offset + 1) << 8;
+ rv[0] |= (unsigned long long)rx_context_mem_read_byte (location, offset + 2) << 16;
+ rv[0] |= (unsigned long long)rx_context_mem_read_byte (location, offset + 3) << 24;
+ rv[0] |= (unsigned long long)rx_context_mem_read_byte (location, offset + 4) << 32;
+ rv[0] |= (unsigned long long)rx_context_mem_read_byte (location, offset + 5) << 40;
+ rv[0] |= (unsigned long long)rx_context_mem_read_byte (location, offset + 6) << 48;
+ rv[0] |= (unsigned long long)rx_context_mem_read_byte (location, offset + 7) << 56;
+ rv[1] |= (unsigned long long)rx_context_mem_read_byte (location, offset + 8);
+ rv[1] |= (unsigned long long)rx_context_mem_read_byte (location, offset + 9) << 8;
+ rv[1] |= (unsigned long long)rx_context_mem_read_byte (location, offset + 10) << 16;
+ rv[1] |= (unsigned long long)rx_context_mem_read_byte (location, offset + 11) << 24;
+ }
+ COUNT (0, 12);
+ E ();
+ return rv;
+}
+
void
mem_get_blk (int address, void *bufptr_void, int nbytes)
{
diff --git a/sim/rx/mem.h b/sim/rx/mem.h
index 8dfcebea1be9..62852c6098d8 100644
--- a/sim/rx/mem.h
+++ b/sim/rx/mem.h
@@ -46,6 +46,7 @@ unsigned long mem_usage_cycles (void);
#define NONPAGE_MASK (~(PAGE_SIZE-1))
unsigned char *rx_mem_ptr (unsigned long address, enum mem_ptr_action action);
+unsigned char *rx_context_mem_ptr (unsigned long address, enum mem_ptr_action action);
#ifdef RXC_never
RX_Opcode_Decoded **rx_mem_decode_cache (unsigned long address);
#endif
@@ -54,6 +55,10 @@ void mem_put_qi (int address, unsigned char value);
void mem_put_hi (int address, unsigned short value);
void mem_put_psi (int address, unsigned long value);
void mem_put_si (int address, unsigned long value);
+void mem_put_di (int address, unsigned long long value);
+
+void mem_put_context_si (unsigned long location, unsigned long offset, unsigned long value);
+void mem_put_context_acc (unsigned long location, unsigned long offset, unsigned long long *value);
void mem_put_blk (int address, void *bufptr_void, int nbytes);
@@ -63,6 +68,10 @@ unsigned char mem_get_qi (int address);
unsigned short mem_get_hi (int address);
unsigned long mem_get_psi (int address);
unsigned long mem_get_si (int address);
+unsigned long long mem_get_di (int address);
+
+unsigned long mem_get_context_si (unsigned long location, unsigned long offset);
+unsigned long long * mem_get_context_acc (unsigned long location, unsigned long offset);
void mem_get_blk (int address, void *bufptr_void, int nbytes);
diff --git a/sim/rx/reg.c b/sim/rx/reg.c
index 1bc652d8ce3d..2bed982a3247 100644
--- a/sim/rx/reg.c
+++ b/sim/rx/reg.c
@@ -29,6 +29,8 @@
#include "bfd.h"
#include "trace.h"
+#define tprintf if (trace) printf
+
int verbose = 0;
int trace = 0;
int enable_counting = 0;
@@ -49,12 +51,19 @@ char *reg_names[] = {
/* general registers */
"r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
"r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
+ "RES", "RES", "RES", "RES", "RES", "RES", "RES", "RES",
+ "RES", "RES", "RES", "RES", "RES", "RES", "RES", "RES",
/* control register */
"psw", "pc", "usp", "fpsw", "RES", "RES", "RES", "RES",
- "bpsw", "bpc", "isp", "fintv", "intb", "RES", "RES", "RES",
+ "bpsw", "bpc", "isp", "fintv", "intb", "extb", "RES", "RES",
"RES", "RES", "RES", "RES", "RES", "RES", "RES", "RES",
"RES", "RES", "RES", "RES", "RES", "RES", "RES", "RES",
- "temp", "acc", "acchi", "accmi", "acclo"
+ "temp", "acc0", "acc1", "acc0hi", "acc0mi", "acc0lo",
+ "acc1hi", "acc1mi", "acc1lo",
+ /* double registers */
+ "dr0", "dr1", "dr2", "dr3", "dr4", "dr5", "dr6", "dr7",
+ "dr8", "dr9", "dr10", "dr11", "dr12", "dr13", "dr14", "dr15",
+ "dpsw", "dcmr", "decnt", "depc"
};
unsigned int b2mask[] = { 0, 0xff, 0xffff, 0xffffff, 0xffffffff };
@@ -70,6 +79,10 @@ init_regs (void)
memset (®s, 0, sizeof (regs));
memset (&oldregs, 0, sizeof (oldregs));
+ // DPSW init, all bits 0 except for DDN bit
+ tprintf("Initializing DPSW...\nSetting DDN bit to 1...\n");
+ regs.r_dpsw |= DPSWBITS_DDN;
+
#ifdef CYCLE_ACCURATE
regs.rt = -1;
oldregs.rt = -1;
@@ -107,12 +120,30 @@ get_reg_i (int id)
return regs.r_pc;
case r_temp_idx:
return regs.r_temp;
- case acchi:
- return (SI)(regs.r_acc >> 32);
- case accmi:
- return (SI)(regs.r_acc >> 16);
- case acclo:
- return (SI)regs.r_acc;
+ case acc0hi:
+ return (SI)(regs.r_acc0[0] >> 32);
+ case acc0mi:
+ return (SI)(regs.r_acc0[0] >> 16);
+ case acc0lo:
+ return (SI)regs.r_acc0[0];
+ case acc1hi:
+ return (SI)(regs.r_acc1[0] >> 32);
+ case acc1mi:
+ return (SI)(regs.r_acc1[0] >> 16);
+ case acc1lo:
+ return (SI)regs.r_acc1[0];
+ case extb:
+ return regs.r_extb;
+ case dpsw:
+ return regs.r_dpsw;
+ case dcmr:
+ return regs.r_dcmr;
+ case decnt:
+ return regs.r_decnt;
+ case depc:
+ return regs.r_depc;
+ case libit:
+ return regs.bit_li;
}
abort();
}
@@ -127,23 +158,42 @@ get_reg (int id)
}
static unsigned long long
-get_reg64_i (int id)
+get_reg_double_i (int id)
+{
+ if (id >= 0 && id < 16)
+ return regs.dr[id];
+ abort ();
+}
+
+unsigned long long
+get_reg_double (int id)
+{
+ unsigned long long rv = get_reg_double_i (id);
+ if (trace > ((id != pc) ? 0 : 1))
+ printf ("get_reg_double (%s) = %016llx\n", reg_names[id], rv);
+ return rv;
+}
+
+static unsigned long long *
+get_reg72_i (int id)
{
switch (id)
{
- case acc64:
- return regs.r_acc;
+ case acc0:
+ return regs.r_acc0;
+ case acc1:
+ return regs.r_acc1;
default:
abort ();
}
}
-unsigned long long
-get_reg64 (int id)
+unsigned long long *
+get_reg72 (int id)
{
- unsigned long long rv = get_reg64_i (id);
+ unsigned long long * rv = get_reg72_i (id);
if (trace > ((id != pc && id != sp) ? 0 : 1))
- printf ("get_reg (%s) = %016llx\n", reg_names[id], rv);
+ printf ("get_reg (%s) = %016llx%016llx\n", reg_names[id], *(rv + 1), *rv);
return rv;
}
@@ -208,14 +258,41 @@ put_reg (int id, unsigned int v)
regs.r_pc = v;
break;
- case acchi:
- regs.r_acc = (regs.r_acc & 0xffffffffULL) | ((DI)v << 32);
+ case acc0hi:
+ regs.r_acc0[0] = (regs.r_acc0[0] & 0xffffffffULL) | ((DI)v << 32);
+ break;
+ case acc0mi:
+ regs.r_acc0[0] = (regs.r_acc0[0] & ~0xffffffff0000ULL) | ((DI)v << 16);
+ break;
+ case acc0lo:
+ regs.r_acc0[0] = (regs.r_acc0[0] & ~0xffffffffULL) | ((DI)v);
+ break;
+ case acc1hi:
+ regs.r_acc1[0] = (regs.r_acc1[0] & 0xffffffffULL) | ((DI)v << 32);
+ break;
+ case acc1mi:
+ regs.r_acc1[0] = (regs.r_acc1[0] & ~0xffffffff0000ULL) | ((DI)v << 16);
+ break;
+ case acc1lo:
+ regs.r_acc1[0] = (regs.r_acc1[0] & ~0xffffffffULL) | ((DI)v);
+ break;
+ case extb:
+ regs.r_extb = v;
+ break;
+ case dpsw:
+ regs.r_dpsw = v;
break;
- case accmi:
- regs.r_acc = (regs.r_acc & ~0xffffffff0000ULL) | ((DI)v << 16);
+ case dcmr:
+ regs.r_dcmr = v;
break;
- case acclo:
- regs.r_acc = (regs.r_acc & ~0xffffffffULL) | ((DI)v);
+ case decnt:
+ regs.r_decnt = v;
+ break;
+ case depc:
+ regs.r_depc = v;
+ break;
+ case libit:
+ regs.bit_li = v & 1;
break;
case 0: /* Stack pointer is "in" R0. */
@@ -254,7 +331,7 @@ put_reg (int id, unsigned int v)
}
default:
- if (id >= 1 && id <= 15)
+ if (id >= 1 || id <= 15)
regs.r[id] = v;
else
abort ();
@@ -262,21 +339,53 @@ put_reg (int id, unsigned int v)
}
void
-put_reg64 (int id, unsigned long long v)
+put_reg72 (int id, unsigned long long* v)
{
- if (trace > ((id != pc) ? 0 : 1))
- printf ("put_reg (%s) = %016llx\n", reg_names[id], v);
switch (id)
{
- case acc64:
- regs.r_acc = v;
+ case acc0:
+ regs.r_acc0[0] = *v;
+ regs.r_acc0[1] = (*(v + 1)) & 0xFF;
+ /* sign extend the value if necessary */
+ if(regs.r_acc0[1] & 0x80)
+ {
+ regs.r_acc0[1] |= 0xFFFFFFFFFFFFFF00;
+ }
+ if (trace > ((id != pc) ? 0 : 1))
+ {
+ printf ("put_reg (%s) = %016llx%016llx\n", reg_names[id], regs.r_acc0[1], regs.r_acc0[0]);
+ }
+ break;
+ case acc1:
+ regs.r_acc1[0] = *v;
+ regs.r_acc1[1] = (*(v + 1)) & 0xFF;
+ /* sign extend the value if necessary */
+ if(regs.r_acc1[1] & 0x80)
+ {
+ regs.r_acc1[1] |= 0xFFFFFFFFFFFFFF00;
+ }
+ if (trace > ((id != pc) ? 0 : 1))
+ {
+ printf ("put_reg (%s) = %016llx%016llx\n", reg_names[id], regs.r_acc1[1], regs.r_acc1[0]);
+ }
break;
default:
abort ();
}
}
+void
+put_reg_double (int id, unsigned long long v)
+{
+ if (trace > ((id != pc) ? 0 : 1))
+ printf ("put_reg_double (%s) = %016llx\n", reg_names[id], v);
+ if (id >= 0 && id < 16)
+ regs.dr[id] = v;
+ else
+ abort ();
+}
+
int
condition_true (int cond_id)
{
@@ -546,13 +655,23 @@ trace_register_changes (void)
oldregs.r_fpsw = regs.r_fpsw;
}
- if (oldregs.r_acc != regs.r_acc)
+ for( i = 0; i < 1; i++)
+ {
+ if (oldregs.r_acc0[i] != regs.r_acc0[i])
{
- if (tag) { printf ("%s", tag); tag = 0; }
- printf(" acc %016" PRIx64 ":", oldregs.r_acc);
- printf("%016" PRIx64, regs.r_acc);
- oldregs.r_acc = regs.r_acc;
+ if (tag) { printf (tag); tag = 0; }
+ printf(" acc0 %016llx:", oldregs.r_acc0[i]);
+ printf("%016llx", regs.r_acc0[i]);
+ oldregs.r_acc0[i] = regs.r_acc0[i];
+ }
+ if (oldregs.r_acc1[i] != regs.r_acc1[i])
+ {
+ if (tag) { printf (tag); tag = 0; }
+ printf(" acc1 %016llx:", oldregs.r_acc1[i]);
+ printf("%016llx", regs.r_acc1[i]);
+ oldregs.r_acc1[i] = regs.r_acc1[i];
}
+ }
if (tag == 0)
printf ("\033[0m\n");
diff --git a/sim/rx/rx.c b/sim/rx/rx.c
index 57a7d5e74f84..2d4164b04f8b 100644
--- a/sim/rx/rx.c
+++ b/sim/rx/rx.c
@@ -34,11 +34,15 @@ along with this program. If not, see . */
#include "fpu.h"
#include "err.h"
#include "misc.h"
+#include "dpu.h"
+#include "bfd.h"
#ifdef WITH_PROFILE
static const char * const id_names[] = {
"RXO_unknown",
"RXO_mov", /* d = s (signed) */
+ "RXO_movli", /* d = s, LI = 1 */
+ "RXO_movco", /* if (LI == 1) {dest=src;src=0;} else { src=1; } LI = 0; */
"RXO_movbi", /* d = [s,s2] (signed) */
"RXO_movbir", /* [s,s2] = d (signed) */
"RXO_pushm", /* s..s2 */
@@ -97,16 +101,29 @@ static const char * const id_names[] = {
"RXO_sstr",
"RXO_rmpa",
+ "RXO_emula",
+ "RXO_emaca",
+ "RXO_emsba",
+ "RXO_mullh",
"RXO_mulhi",
"RXO_mullo",
+ "RXO_maclh",
"RXO_machi",
"RXO_maclo",
+ "RXO_msblh",
+ "RXO_msbhi",
+ "RXO_msblo",
"RXO_mvtachi",
"RXO_mvtaclo",
+ "RXO_mvtacgu",
"RXO_mvfachi",
"RXO_mvfacmi",
"RXO_mvfaclo",
+ "RXO_mvfacgu",
+ "RXO_rdacw",
+ "RXO_rdacl",
"RXO_racw",
+ "RXO_racl",
"RXO_sat", /* sat(d) */
"RXO_satr",
@@ -117,29 +134,59 @@ static const char * const id_names[] = {
"RXO_ftoi",
"RXO_fmul",
"RXO_fdiv",
+ "RXO_fsqrt",
"RXO_round",
"RXO_itof",
+ "RXO_utof",
+ "RXO_ftou",
"RXO_bset", /* d |= (1< = cond(s2) */
+ "RXO_bfmov",
+ "RXO_bfmovz",
"RXO_clrpsw", /* flag index in d */
"RXO_setpsw", /* flag index in d */
"RXO_mvtipl", /* new IPL in s */
"RXO_rtfi",
+ "RXO_rstr",
"RXO_rte",
"RXO_rtd", /* undocumented */
"RXO_brk",
"RXO_dbt", /* undocumented */
"RXO_int", /* vector id in s */
"RXO_stop",
+ "RXO_save",
"RXO_wait",
"RXO_sccnd", /* d = cond(s) ? 1 : 0 */
+
+ "RXO_dabs",
+ "RXO_dadd",
+ "RXO_dcmp",
+ "RXO_ddiv",
+ "RXO_dmovhi",
+ "RXO_dmov",
+ "RXO_dmul",
+ "RXO_dneg",
+ "RXO_dpopm",
+ "RXO_dpushm",
+ "RXO_dround",
+ "RXO_dsqrt",
+ "RXO_dsub",
+ "RXO_dtof",
+ "RXO_dtoi",
+ "RXO_dtou",
+ "RXO_ftod",
+ "RXO_itod",
+ "RXO_mvfdc",
+ "RXO_mvfdr",
+ "RXO_mvtdc",
+ "RXO_utod",
};
static const char * const optype_names[] = {
@@ -336,10 +383,6 @@ static const int size2bytes[] = {
4, 1, 1, 1, 2, 2, 2, 3, 4
};
-typedef struct {
- unsigned long dpc;
-} RX_Data;
-
#define rx_abort() _rx_abort(__FILE__, __LINE__)
static void ATTRIBUTE_NORETURN
_rx_abort (const char *file, int line)
@@ -355,11 +398,11 @@ static RX_Opcode_Decoded **decode_cache_base;
static SI get_byte_page;
void
-reset_decoder (void)
+reset_decoder (SI tpc)
{
get_byte_base = 0;
decode_cache_base = 0;
- get_byte_page = 0;
+ get_byte_page = (~tpc) & NONPAGE_MASK;
}
static inline void
@@ -375,10 +418,9 @@ maybe_get_mem_page (SI tpc)
/* This gets called a *lot* so optimize it. */
static int
-rx_get_byte (void *vdata)
+rx_get_byte (RX_Data *rx_data)
{
- RX_Data *rx_data = (RX_Data *)vdata;
- SI tpc = rx_data->dpc;
+ SI tpc = rx_data->addr;
/* See load.c for an explanation of this. */
if (rx_big_endian)
@@ -386,10 +428,65 @@ rx_get_byte (void *vdata)
maybe_get_mem_page (tpc);
- rx_data->dpc ++;
+ rx_data->addr ++;
return get_byte_base [tpc];
}
+static long long *
+get_op_72 (const RX_Opcode_Decoded *rd, int i)
+{
+ const RX_Opcode_Operand *o = rd->op + i;
+
+ switch (o->type)
+ {
+ case RX_Operand_Register: /* An */
+ return get_reg72 (o->reg);
+ default:
+ abort ();
+ }
+}
+
+static long long
+get_op_64 (const RX_Opcode_Decoded *rd, int i)
+{
+ const RX_Opcode_Operand *o = rd->op + i;
+ long long result;
+ int addr;
+
+ switch (o->type)
+ {
+ case RX_Operand_Register: /* An */
+ return get_reg72 (o->reg)[0];
+ case RX_Operand_Zero_Indirect:
+ case RX_Operand_Indirect:
+ addr = get_reg (o->reg) + o->addend;
+ result = mem_get_si (addr) & 0xFFFFFFFF;
+ result |= (long long)mem_get_si (addr + 4) << 32;
+ return result;
+ default:
+ abort ();
+ }
+}
+
+static long long
+get_op_double (const RX_Opcode_Decoded *rd, int i)
+{
+ const RX_Opcode_Operand *o = rd->op + i;
+
+ switch (o->type)
+ {
+ case RX_Operand_DR_Register: /* DRn */
+ case RX_Operand_DRH_Register:
+ case RX_Operand_DRL_Register:
+ return get_reg_double (o->reg);
+ //TODO: this should not be here
+ case RX_Operand_Immediate: /* #addend */
+ return o->addend;
+ default:
+ abort ();
+ }
+}
+
static int
get_op (const RX_Opcode_Decoded *rd, int i)
{
@@ -476,6 +573,9 @@ get_op (const RX_Opcode_Decoded *rd, int i)
case RX_Operand_Flag: /* [UIOSZC] */
return (regs.r_psw & (1 << o->reg)) ? 1 : 0;
+
+ case RX_Operand_DFPU_Condition:
+ return o->reg;
}
/* if we've gotten here, we need to clip/extend the value according
@@ -520,6 +620,61 @@ get_op (const RX_Opcode_Decoded *rd, int i)
return rv;
}
+static void
+put_op_72 (const RX_Opcode_Decoded *rd, int i, long long *v)
+{
+ const RX_Opcode_Operand *o = rd->op + i;
+
+ switch (o->type)
+ {
+ case RX_Operand_Register: /* An */
+ put_reg72 (o->reg, (unsigned long long *)v);
+ break;
+ default:
+ abort ();
+ }
+}
+
+static void
+put_op_64 (const RX_Opcode_Decoded *rd, int i, long long v)
+{
+ const RX_Opcode_Operand *o = rd->op + i;
+ DI v72[2] = {(unsigned long long)v, 0};
+ int addr;
+
+ switch (o->type)
+ {
+ case RX_Operand_Register: /* An */
+ put_reg72(o->reg, v72);
+ break;
+ case RX_Operand_Zero_Indirect:
+ case RX_Operand_Indirect:
+ addr = get_reg (o->reg) + o->addend;
+ mem_put_si (addr, v & 0xFFFFFFFF);
+ mem_put_si (addr + 4, (v >> 32) & 0xFFFFFFFF);
+ break;
+ default:
+ abort ();
+ }
+}
+
+static void
+put_op_double (const RX_Opcode_Decoded *rd, int i, long long v)
+{
+ const RX_Opcode_Operand *o = rd->op + i;
+
+ switch (o->type)
+ {
+ case RX_Operand_DR_Register: /* DRn */
+ case RX_Operand_DRH_Register:
+ case RX_Operand_DRL_Register:
+ put_reg_double (o->reg, (unsigned long long)v);
+ break;
+ default:
+ abort ();
+ }
+}
+
static void
put_op (const RX_Opcode_Decoded *rd, int i, int v)
{
@@ -654,14 +809,58 @@ put_op (const RX_Opcode_Decoded *rd, int i, int v)
#define GD() get_op (opcode, 0)
#define GS() get_op (opcode, 1)
#define GS2() get_op (opcode, 2)
+#define GS3() get_op (opcode, 3)
+#define GS4() get_op (opcode, 4)
#define DSZ() size2bytes[opcode->op[0].size]
#define SSZ() size2bytes[opcode->op[0].size]
#define S2SZ() size2bytes[opcode->op[0].size]
+#define GD_72() get_op_72 (opcode, 0)
+#define GD_DB() get_op_double (opcode, 0)
+#define GD_64() get_op_64 (opcode, 0)
+#define GS_72() get_op_72 (opcode, 1)
+#define GS_64() get_op_64 (opcode, 1)
+#define GS_DB() get_op_double (opcode, 1)
+#define GS2_DB() get_op_double (opcode, 2)
+#define PD_72(x) put_op_72 (opcode, 0, x)
+#define PD_64(x) put_op_64 (opcode, 0, x)
+#define PD_DB(x) put_op_double (opcode, 0, x)
+
/* "Universal" sources. */
#define US1() ((opcode->op[2].type == RX_Operand_None) ? GD() : GS())
#define US2() ((opcode->op[2].type == RX_Operand_None) ? GS() : GS2())
+#define CONTEXT 92
+
+static void
+push_context(int src)
+{
+ int v;
+ int offset = 0;
+ //TODO: change to error
+ src = (src >= 255)? 255 : src;
+
+ tprintf("Saving to context memory location: %d\n", src);
+ /* push regs from r1 to r15 to context memory */
+ for (v = 1; v <= 15; v++)
+ {
+ tprintf("save:%d %d\n", src, offset);
+ mem_put_context_si (src, offset, get_reg(v));
+ offset += 4;
+ }
+
+ /* push usp and fpsw to context memory */
+ mem_put_context_si (src, offset, get_reg(usp));
+ offset += 4;
+ mem_put_context_si (src, offset, get_reg(fpsw));
+ offset += 4;
+
+ /* push acc0 and acc1 to context memory */
+ mem_put_context_acc (src, offset, get_reg72(acc0));
+ offset += 12;
+ mem_put_context_acc (src, offset, get_reg72(acc1));
+}
+
static void
push(int val)
{
@@ -671,6 +870,13 @@ push(int val)
mem_put_si (rsp, val);
}
+static void
+push_double(unsigned long long val)
+{
+ push (val >> 32);
+ push (val & 0xFFFFFFFF);
+}
+
/* Just like the above, but tag the memory as "pushed pc" so if anyone
tries to write to it, it will cause an error. */
static void
@@ -683,6 +889,43 @@ pushpc(int val)
mem_set_content_range (rsp, rsp+3, MC_PUSHED_PC);
}
+static void
+pop_context(int src)
+{
+ int v;
+ int offset = 0;
+ int content;
+ long long * contentACC;
+ //TODO: change to error
+ src = (src > 255)? 255 : src;
+
+ tprintf("Restoring from context memory location: %d\n", src);
+ /* pop regs from r1 to r15 to context memory */
+ for (v = 1; v <= 15; v++)
+ {
+ content = mem_get_context_si (src, offset);
+ offset += 4;
+ put_reg (v, content);
+ }
+
+ /* pop usp and fpsw to context memory */
+ content = mem_get_context_si (src, offset);
+ offset += 4;
+ put_reg (usp, content);
+
+ content = mem_get_context_si (src, offset);
+ offset += 4;
+ put_reg (fpsw, content);
+
+ /* pop acc0 and acc1 to context memory */
+ contentACC = mem_get_context_acc (src, offset);
+ offset += 4;
+ put_reg72 (acc0, contentACC);
+
+ contentACC = mem_get_context_acc (src, offset);
+ put_reg72 (acc1, contentACC);
+}
+
static int
pop (void)
{
@@ -694,6 +937,12 @@ pop (void)
return rv;
}
+static unsigned long long
+pop_double()
+{
+ return (pop() & 0x00000000ffffffff) | ((unsigned long long)pop() << 32);
+}
+
static int
poppc (void)
{
@@ -737,7 +986,7 @@ poppc (void)
#define SHIFT_OP(val, type, count, OP, carry_mask) \
{ \
int i, c=0; \
- count = US2(); \
+ count = US2() & 31; \
val = (type)US1(); \
tprintf("%lld " #OP " %d\n", val, count); \
for (i = 0; i < count; i ++) \
@@ -799,6 +1048,105 @@ fop_fsub (fp_t s1, fp_t s2, fp_t *d)
return 1;
}
+static int
+dop_dmul (dp_t s1, dp_t s2, dp_t *d)
+{
+ // Must call the rxdp function first
+ // so flags have a chance to be raised
+ dp_t temp = rxdp_mul(s1, s2);
+
+ //If undeflow flag is raised, handle things accordingly
+ //Else do the regular thing
+ if(regs.r_dpsw & DPSWBITS_DFU) {
+ // If DDN is 1, return 0
+ // Else, don't change the dest value, and raise unimplm processing
+ if(regs.r_dpsw & DPSWBITS_DDN) {
+ *d = 0;
+ } else {
+ regs.r_dpsw |= DPSWBITS_DCE;
+ return 0;
+ }
+ } else {
+ *d = temp;
+ }
+
+ return 1;
+}
+
+static int
+dop_ddiv (dp_t s1, dp_t s2, dp_t *d)
+{
+ // Must call the rxdp function first
+ // so flags have a chance to be raised
+ dp_t temp = rxdp_div(s1, s2);
+
+ //If undeflow flag is raised, handle things accordingly
+ //Else do the regular thing
+ if(regs.r_dpsw & DPSWBITS_DFU) {
+ // If DDN is 1, return 0
+ // Else, don't change the dest value, and raise unimplm processing
+ if(regs.r_dpsw & DPSWBITS_DDN) {
+ *d = 0;
+ } else {
+ regs.r_dpsw |= DPSWBITS_DCE;
+ tprintf("[SIM] DDN no dest write\n", *d);
+ return 0;
+ }
+ } else {
+ *d = temp;
+ }
+
+ return 1;
+}
+
+static int
+dop_dsub (dp_t s1, dp_t s2, dp_t *d)
+{
+ // Must call the rxdp function first
+ // so flags have a chance to be raised
+ dp_t temp = rxdp_sub(s1, s2);
+
+ //If undeflow flag is raised, handle things accordingly
+ //Else do the regular thing
+ if(regs.r_dpsw & DPSWBITS_DFU) {
+ // If DDN is 1, return 0
+ // Else, don't change the dest value, and raise unimplm processing
+ if(regs.r_dpsw & DPSWBITS_DDN) {
+ *d = 0;
+ } else {
+ regs.r_dpsw |= DPSWBITS_DCE;
+ return 0;
+ }
+ } else {
+ *d = temp;
+ }
+
+ return 1;
+}
+
+static int
+dop_dadd (dp_t s1, dp_t s2, dp_t *d)
+{
+ // Must call the rxdp function first
+ // so flags have a chance to be raised
+ dp_t temp = rxdp_add(s1, s2);
+ //If undeflow flag is raised, handle things accordingly
+ //Else do the regular thing
+ if(regs.r_dpsw & DPSWBITS_DFU) {
+ // If DDN is 1, return 0
+ // Else, don't change the dest value, and raise unimplm processing
+ if(regs.r_dpsw & DPSWBITS_DDN) {
+ *d = 0;
+ } else {
+ regs.r_dpsw |= DPSWBITS_DCE;
+ return 0;
+ }
+ } else {
+ *d = temp;
+ }
+ return 1;
+}
+
#define FPPENDING() (regs.r_fpsw & (FPSWBITS_CE | (FPSWBITS_FMASK & (regs.r_fpsw << FPSW_EFSH))))
#define FPCLEAR() regs.r_fpsw &= FPSWBITS_CLEAR
#define FPCHECK() \
@@ -825,6 +1173,37 @@ fop_fsub (fp_t s1, fp_t s2, fp_t *d)
set_flags (FLAGBIT_S | FLAGBIT_Z, mb); \
}
+#define FLOAT_OP2(func) \
+{ \
+ int do_store; \
+ fp_t fa, fb, fc; \
+ FPCLEAR(); \
+ fb = GS (); \
+ fa = GS2 (); \
+ do_store = fop_##func (fa, fb, &fc); \
+ tprintf("%g " #func " %g = %g %08x\n", int2float(fa), int2float(fb), int2float(fc), fc); \
+ FPCHECK(); \
+ if (do_store) \
+ PD (fc); \
+ mb = 0; \
+ if ((fc & 0x80000000UL) != 0) \
+ mb |= FLAGBIT_S; \
+ if ((fc & 0x7fffffffUL) == 0) \
+ mb |= FLAGBIT_Z; \
+ set_flags (FLAGBIT_S | FLAGBIT_Z, mb); \
+}
+
+#define DOUBLE_OP2(func) \
+{ \
+ int do_store; \
+ dp_t da, db, dc; \
+ db = GS2_DB (); \
+ da = GS_DB (); \
+ do_store = dop_##func (da, db, &dc); \
+ if (do_store) \
+ PD_DB (dc); \
+}
+
#define carry (FLAG_C ? 1 : 0)
static struct {
@@ -939,8 +1318,11 @@ decode_opcode (void)
unsigned int uma=0, umb=0;
int ma=0, mb=0;
int opcode_size, v;
- unsigned long long ll;
+ unsigned long tmp1, tmp2;
+ signed long long ltmp1, ltmp2, ltmp3;
+ unsigned long long ll, dins, da, db;
long long sll;
+ long long *sll72;
unsigned long opcode_pc;
RX_Data rx_data;
const RX_Opcode_Decoded *opcode;
@@ -970,10 +1352,10 @@ decode_opcode (void)
if (decode_cache_base[opcode_pc] == NULL)
{
RX_Opcode_Decoded *opcode_w;
- rx_data.dpc = opcode_pc;
+ rx_data.addr = opcode_pc;
opcode_w = decode_cache_base[opcode_pc] = calloc (1, sizeof (RX_Opcode_Decoded));
opcode_size = rx_decode_opcode (opcode_pc, opcode_w,
- rx_get_byte, &rx_data);
+ rx_get_byte, &rx_data, bfd_mach_rx_v3_dfpu);
opcode = opcode_w;
}
else
@@ -1175,7 +1557,10 @@ decode_opcode (void)
if (FLAG_PM
&& (v == FLAGBIT_I
|| v == FLAGBIT_U))
- break;
+ {
+ cycles (1);
+ break;
+ }
regs.r_psw &= ~v;
cycles (1);
break;
@@ -1241,8 +1626,16 @@ decode_opcode (void)
break;
case RXO_fadd:
- FLOAT_OP (fadd);
- E (4);
+ if(opcode->op[2].type != RX_Operand_None)
+ {
+ FLOAT_OP2 (fadd);
+ E (2);
+ }
+ else
+ {
+ FLOAT_OP (fadd);
+ E (4);
+ }
break;
case RXO_fcmp:
@@ -1260,23 +1653,50 @@ decode_opcode (void)
break;
case RXO_fmul:
- FLOAT_OP (fmul);
- E (3);
+ if(opcode->op[2].type != RX_Operand_None)
+ {
+ FLOAT_OP2 (fmul);
+ E (2);
+ }
+ else
+ {
+ FLOAT_OP (fmul);
+ E (3);
+ }
break;
case RXO_rtfi:
PRIVILEDGED ();
regs.r_psw = regs.r_bpsw;
regs.r_pc = regs.r_bpc;
+ put_reg(libit, 0);
#ifdef CYCLE_ACCURATE
regs.fast_return = 0;
cycles(3);
#endif
break;
+ case RXO_rstr:
+ pop_context (GS());
+ cycles (1);//TODO: update
+ break;
+
+ case RXO_save:
+ push_context (GS());
+ cycles (1);//TODO: update
+ break;
+
case RXO_fsub:
- FLOAT_OP (fsub);
- E (4);
+ if(opcode->op[2].type != RX_Operand_None)
+ {
+ FLOAT_OP2 (fsub);
+ E (2);
+ }
+ else
+ {
+ FLOAT_OP (fsub);
+ E (4);
+ }
break;
case RXO_ftoi:
@@ -1320,6 +1740,59 @@ decode_opcode (void)
E (2);
break;
+ case RXO_utof:
+ uma = GS ();
+ FPCLEAR ();
+ umb = rxfp_utof (uma, regs.r_fpsw);
+ FPCHECK ();
+ tprintf("(float) %d = %x\n", uma, umb);
+ PD (umb);
+ set_sz (uma, 4);
+ if (opcode->op[1].type == RX_Operand_Register)
+ {
+ E (2);
+ }
+ else
+ {
+ E (2);
+ }
+ break;
+
+ case RXO_ftou:
+ uma = GS ();
+ FPCLEAR ();
+ umb = rxfp_ftou (uma);
+ FPCHECK ();
+ tprintf("(unsigned) %x = %d\n", uma, umb);
+ PD (umb);
+ set_sz (uma, 4);
+ if (opcode->op[1].type == RX_Operand_Register)
+ {
+ E (2);
+ }
+ else
+ {
+ E (2);
+ }
+ break;
+
+ case RXO_fsqrt:
+ uma = GS ();
+ FPCLEAR ();
+ umb = rxfp_fsqrt (uma);
+ FPCHECK ();
+ PD (umb);
+ set_sz (uma, 4);
+ if (opcode->op[1].type == RX_Operand_Register)
+ {
+ E (16);
+ }
+ else
+ {
+ E (18);
+ }
+ break;
+
case RXO_jsr:
case RXO_jsrrel:
{
@@ -1355,17 +1828,87 @@ decode_opcode (void)
}
break;
+ case RXO_maclh:
+ ma = (short) GS();
+ mb = (short) (GS2() >> 16);
+ sll72 = GD_72();
+ sll = sll72[0];
+ ltmp1 = (((long long) ma) * ((long long) mb)) << 16;
+ ltmp2 = (ltmp1 & 0x8000000000000000LL) ? 0xFFFFFFFFFFFFFFFFLL : 0x0LL;
+ sll72[0] += ltmp1;
+ ltmp3 = ((unsigned long long)sll72[0] < (unsigned long long)sll);
+ sll72[1] += ltmp2 + ltmp3;
+ PD_72(sll72);
+ E1;
+ break;
+
case RXO_machi:
- ll = (long long)(signed short)(GS() >> 16) * (long long)(signed short)(GS2 () >> 16);
- ll <<= 16;
- put_reg64 (acc64, ll + regs.r_acc);
+ ma = (short) (GS() >> 16);
+ mb = (short) (GS2() >> 16);
+ sll72 = GD_72();
+ sll = sll72[0];
+ ltmp1 = (((long long) ma) * ((long long) mb)) << 16;
+ ltmp2 = (ltmp1 & 0x8000000000000000LL) ? 0xFFFFFFFFFFFFFFFFLL : 0x0LL;
+ sll72[0] += ltmp1;
+ ltmp3 = ((unsigned long long)sll72[0] < (unsigned long long)sll);
+ sll72[1] += ltmp2 + ltmp3;
+ PD_72(sll72);
E1;
break;
case RXO_maclo:
- ll = (long long)(signed short)(GS()) * (long long)(signed short)(GS2 ());
- ll <<= 16;
- put_reg64 (acc64, ll + regs.r_acc);
+ ma = (short) GS();
+ mb = (short) GS2();
+ sll72 = GD_72();
+ sll = sll72[0];
+ ltmp1 = (long long) (ma * mb) << 16;
+ ltmp2 = (ltmp1 & 0x8000000000000000LL) ? 0xFFFFFFFFFFFFFFFFLL : 0x0LL;
+ sll72[0] += ltmp1;
+ ltmp3 = ((unsigned long long)sll72[0] < (unsigned long long)sll);
+ sll72[1] += ltmp2 + ltmp3;
+ PD_72(sll72);
+ E1;
+ break;
+
+ case RXO_msblh:
+ ma = (short) GS();
+ mb = (short) (GS2() >> 16);
+ sll72 = GD_72();
+ sll = sll72[0];
+ ltmp1 = (((long long) ma) * ((long long) mb)) << 16;
+ ltmp2 = (ltmp1 & 0x8000000000000000LL) ? 0xFFFFFFFFFFFFFFFFLL : 0x0LL;
+ sll72[0] -= ltmp1;
+ ltmp3 = ((unsigned long long)sll72[0] > (unsigned long long)sll);
+ sll72[1] -= ltmp2 + ltmp3;
+ PD_72(sll72);
+ E1;
+ break;
+
+ case RXO_msbhi:
+ ma = (short) (GS() >> 16);
+ mb = (short) (GS2() >> 16);
+ sll72 = GD_72();
+ sll = sll72[0];
+ ltmp1 = (((long long) ma) * ((long long) mb)) << 16;
+ ltmp2 = (ltmp1 & 0x8000000000000000LL) ? 0xFFFFFFFFFFFFFFFFLL : 0x0LL;
+ sll72[0] -= ltmp1;
+ ltmp3 = ((unsigned long long)sll72[0] > (unsigned long long)sll);
+ sll72[1] -= ltmp2 + ltmp3;
+ PD_72(sll72);
+ E1;
+ break;
+
+ case RXO_msblo:
+ ma = (short) GS();
+ mb = (short) GS2();
+ sll72 = GD_72();
+ sll = sll72[0];
+ ltmp1 = (((long long) ma) * ((long long) mb)) << 16;
+ ltmp2 = (ltmp1 & 0x8000000000000000LL) >> 63;
+ ltmp3 = ((unsigned long long)sll72[0] > (unsigned long long)sll);
+ sll72[0] -= ltmp1;
+ sll72[1] -= ltmp2 + ltmp3;
+ PD_72(sll72);
E1;
break;
@@ -1390,10 +1933,19 @@ decode_opcode (void)
break;
case RXO_mov:
- v = GS ();
+ /* TODO: we need to update this!!! */
+ if (opcode->op[1].type == RX_Operand_Register
+ && opcode->op[1].reg == fpsw /* FPSW */)
+ {
+ v = regs.r_fpsw;
+ }
+ else
+ {
+ v = GS ();
+ }
if (opcode->op[1].type == RX_Operand_Register
- && opcode->op[1].reg == 17 /* PC */)
+ && opcode->op[1].reg == pc /* PC */)
{
/* Special case. We want the address of the insn, not the
address of the next insn. */
@@ -1401,7 +1953,7 @@ decode_opcode (void)
}
if (opcode->op[0].type == RX_Operand_Register
- && opcode->op[0].reg == 16 /* PSW */)
+ && opcode->op[0].reg == psw /* PSW */)
{
/* Special case, LDC and POPC can't ever modify PM. */
int pm = regs.r_psw & FLAGBIT_PM;
@@ -1417,15 +1969,15 @@ decode_opcode (void)
{
/* various things can't be changed in user mode. */
if (opcode->op[0].type == RX_Operand_Register)
- if (opcode->op[0].reg == 32)
+ if (opcode->op[0].reg == psw)
{
v &= ~ (FLAGBIT_I | FLAGBIT_U | FLAGBITS_IPL);
v |= regs.r_psw & (FLAGBIT_I | FLAGBIT_U | FLAGBITS_IPL);
}
- if (opcode->op[0].reg == 34 /* ISP */
- || opcode->op[0].reg == 37 /* BPSW */
- || opcode->op[0].reg == 39 /* INTB */
- || opcode->op[0].reg == 38 /* VCT */)
+ if (opcode->op[0].reg == isp /* ISP */
+ || opcode->op[0].reg == bpsw /* BPSW */
+ || opcode->op[0].reg == intb /* INTB */
+ || opcode->op[0].reg == fintv /* VCT */)
/* These are ignored. */
break;
}
@@ -1451,6 +2003,28 @@ decode_opcode (void)
set_sz (v, DSZ());
break;
+ case RXO_movli:
+ v = GS();
+ PD(v);
+ put_reg(libit, 1);
+ cycles (1);
+ break;
+
+ case RXO_movco:
+ if(get_reg(libit) == 1)
+ {
+ v = GS();
+ PD(v);
+ PS(0);
+ }
+ else
+ {
+ PS(1);
+ }
+ put_reg(libit, 0);
+ cycles (1);
+ break;
+
case RXO_movbi:
PD (GS ());
cycles (1);
@@ -1461,6 +2035,34 @@ decode_opcode (void)
cycles (1);
break;
+ case RXO_bfmov:
+ // GS2 = slsb; GS3 = dlsb; GS4 = width; GS = src; GD = dest
+ tmp1 = (0xFFFFFFFF >> (32 - GS4())) << GS3();
+ tprintf("bfmov\n");
+ tprintf("slsb: %d\n", GS2());
+ tprintf("dlsb: %d\n", GS3());
+ tprintf("width: %d\n", GS4());
+ tprintf("tmp1: 0x%X\n", tmp1);
+ tmp2 = (GS() >> GS2()) << GS3();
+ tprintf("tmp2: 0x%X\n", tmp2);
+ PD((tmp2 & tmp1) | (GD() & (~tmp1)));
+ cycles (1);//TODO: update
+ break;
+
+ case RXO_bfmovz:
+ // GS2 = slsb; GS3 = dlsb; GS4 = width; GS = src; GD = dest
+ tmp1 = (0xFFFFFFFF >> (32 - GS4())) << GS3();
+ tprintf("bfmovz\n");
+ tprintf("slsb: %d\n", GS2());
+ tprintf("dlsb: %d\n", GS3());
+ tprintf("width: %d\n", GS4());
+ tprintf("src: %d\n", GS());
+ tprintf("dest: %d\n", GD());
+ tmp2 = (GS() >> GS2()) << GS3();
+ PD((tmp2 & tmp1));
+ cycles (1);//TODO: update
+ break;
+
case RXO_mul:
v = US2 ();
ll = (unsigned long long) US1() * (unsigned long long) v;
@@ -1468,44 +2070,131 @@ decode_opcode (void)
E (1);
break;
+ case RXO_emula:
+ ma = GS();
+ mb = GS2();
+ sll = (long long) ma * (long long) mb;
+ PD_64(sll);
+ E1;
+ break;
+
+ case RXO_emaca:
+ ma = GS();
+ mb = GS2();
+ sll72 = GD_72();
+ sll = sll72[0];
+ ltmp1 = (((long long) ma) * ((long long) mb));
+ ltmp2 = (ltmp1 & 0x8000000000000000LL) ? 0xFFFFFFFFFFFFFFFFLL : 0x0LL;
+ sll72[0] += ltmp1;
+ if((ltmp1) > 0)
+ {
+ ltmp3 = ((unsigned long long)sll72[0] < (unsigned long long)sll);
+ }
+ else
+ {
+ ltmp3 = ((unsigned long long)sll72[0] > (unsigned long long)sll);
+ }
+ sll72[1] += ltmp2 + ltmp3;
+ PD_72(sll72);
+ E1;
+ break;
+
+ case RXO_emsba:
+ ma = GS();
+ mb = GS2();
+ sll72 = GD_72();
+ sll = sll72[0];
+ ltmp1 = (((long long) ma) * ((long long) mb));
+ ltmp2 = (ltmp1 & 0x8000000000000000LL) ? 0xFFFFFFFFFFFFFFFFLL : 0x0LL;
+ sll72[0] -= ltmp1;
+ if((ltmp1) > 0)
+ {
+ ltmp3 = ((unsigned long long)sll72[0] < (unsigned long long)sll);
+ }
+ else
+ {
+ ltmp3 = ((unsigned long long)sll72[0] > (unsigned long long)sll);
+ }
+ sll72[1] += ltmp2 + ltmp3;
+ PD_72(sll72);
+ E1;
+ break;
+
+ case RXO_mullh:
+ ma = (short) GS();
+ mb = (short) (GS2() >> 16);
+ sll = ((long long)ma) * ((long long)mb);
+ sll <<= 16;
+ PD_64(sll);
+ E1;
+ break;
+
case RXO_mulhi:
- v = GS2 ();
- ll = (long long)(signed short)(GS() >> 16) * (long long)(signed short)(v >> 16);
- ll <<= 16;
- put_reg64 (acc64, ll);
+ ma = (short) (GS() >> 16);
+ mb = (short) (GS2() >> 16);
+ sll = ((long long)ma) * ((long long)mb);
+ sll <<= 16;
+ PD_64(sll);
E1;
break;
case RXO_mullo:
- v = GS2 ();
- ll = (long long)(signed short)(GS()) * (long long)(signed short)(v);
- ll <<= 16;
- put_reg64 (acc64, ll);
+ ma = (short) GS();
+ mb = (short) GS2();
+ sll = ((long long)ma) * ((long long)mb);
+ sll <<= 16;
+ PD_64(sll);
E1;
break;
case RXO_mvfachi:
- PD (get_reg (acchi));
+ v = GS2();
+ sll = GS_64();
+ v = (sll << v) >> 32;
+ PD (v);
E1;
break;
case RXO_mvfaclo:
- PD (get_reg (acclo));
+ v = GS2();
+ sll = GS_64();
+ v = sll << v;
+ PD (v);
E1;
break;
case RXO_mvfacmi:
- PD (get_reg (accmi));
+ v = GS2();
+ sll = GS_64();
+ v = (sll << v) >> 16;
+ PD (v);
+ E1;
+ break;
+
+ case RXO_mvfacgu:
+ v = GS2();
+ sll72 = GS_72();
+ v = sll72[1] << v;
+ PD (v);
E1;
break;
case RXO_mvtachi:
- put_reg (acchi, GS ());
+ sll = (GD_64() & 0xFFFFFFFF) | ((unsigned long long)GS() << 32);
+ PD_64(sll);
E1;
break;
case RXO_mvtaclo:
- put_reg (acclo, GS ());
+ sll = (GD_64() & 0xFFFFFFFF00000000) | GS();
+ PD_64(sll);
+ E1;
+ break;
+
+ case RXO_mvtacgu:
+ sll72 = GD_72();
+ sll72[1] = GS() & 0xFF;
+ PD_72(sll72);
E1;
break;
@@ -1563,16 +2252,149 @@ decode_opcode (void)
cycles (opcode->op[2].reg - opcode->op[1].reg + 1);
break;
+ case RXO_rdacw:
+ sll72 = GD_72();
+ v = GS();
+ /* tmp = (signed 72bit) Adest << src; */
+ sll72[0] <<= v;
+ sll72[1] <<= v;
+ /* if (tmp > (signed 72bit) 000_0000_7FFF_0000_0000h) */
+ if ((unsigned long long)sll72[0] > 0x7FFF00000000ULL)
+ {
+ /* Adest = 00_0000_7FFF_0000_0000h; */
+ sll72[0] = 0x7FFF00000000LL;
+ sll72[1] = 0x0;
+ }
+ /* else if (tmp72 < (signed 72bit) FF_FFFF_8000_0000_0000h) */
+ else if((sll72[1] & 0x80) &&
+ (((unsigned long long)sll72[1] < 0xFFFFFFFFFFFFFFFFULL) ||
+ (((unsigned long long)sll72[1] == 0xFFFFFFFFFFFFFFFFULL)
+ && ((unsigned long long)sll72[0] < 0xFFFF800000000000ULL))))
+ {
+ /* Adest = FF_FFFF_8000_0000_0000h;*/
+ sll72[0] = 0xFFFF800000000000LL;
+ sll72[1] = 0xFFLL;
+ }
+ else
+ {
+ /* Adest = tmp & FF_FFFF_FFFF_0000_0000h; */
+ sll72[0] &= 0xFFFFFFFF00000000LL;
+ sll72[1] &= 0xFFLL;
+ }
+ PD_72(sll72);
+ E1;
+ break;
+
+ case RXO_rdacl:
+ sll72 = GD_72();
+ v = GS();
+ /* tmp = (signed 72bit) Adest << src; */
+ sll72[0] <<= v;
+ sll72[1] <<= v;
+ /* if (tmp > (signed 72bit) 00_7FFF_FFFF_0000_0000h) */
+ if ((unsigned long long)sll72[0] > 0x7FFFFFFF00000000ULL)
+ {
+ /* Adest = 00_7FFF_FFFF_0000_0000h; */
+ sll72[0] = 0x7FFFFFFF00000000LL;
+ sll72[1] = 0x0;
+ }
+ /* else if (tmp < (signed 72bit) FF_8000_0000_0000_0000h) */
+ else if((sll72[1] & 0x80) &&
+ (((unsigned long long)sll72[1] < 0xFFFFFFFFFFFFFFFFULL) ||
+ (((unsigned long long)sll72[1] == 0xFFFFFFFFFFFFFFFFULL)
+ && ((unsigned long long)sll72[0] < 0x8000000000000000ULL))))
+ {
+ /* Adest = FF_8000_0000_0000_0000h; */
+ sll72[0] = 0x8000000000000000LL;
+ sll72[1] = 0xFFLL;
+ }
+ else
+ {
+ /* Adest = tmp & FF_FFFF_FFFF_0000_0000h; */
+ sll72[0] &= 0xFFFFFFFF00000000LL;
+ sll72[1] &= 0xFFLL;
+ }
+ PD_72(sll72);
+ E1;
+ break;
+
case RXO_racw:
- ll = get_reg64 (acc64) << GS ();
- ll += 0x80000000ULL;
- if ((signed long long)ll > (signed long long)0x00007fff00000000ULL)
- ll = 0x00007fff00000000ULL;
- else if ((signed long long)ll < (signed long long)0xffff800000000000ULL)
- ll = 0xffff800000000000ULL;
+ sll72 = GD_72();
+ v = GS();
+ /* tmp = (signed 72bit) Adest << src; */
+ sll72[0] <<= v;
+ sll72[1] <<= v;
+ /* tmp73 = (signed 73bit) tmp + 000_0000_0000_8000_0000h; */
+ sll72[0] += 0x80000000LL;
+ /*if overflow */
+ if((unsigned long long)sll72[0] < 0x80000000ULL)
+ {
+ sll72[1]++;
+ }
+ /* if (tmp > (signed 72bit) 000_0000_7FFF_0000_0000h) */
+ if ((unsigned long long)sll72[0] > 0x7FFF00000000ULL)
+ {
+ /* Adest = 00_0000_7FFF_0000_0000h; */
+ sll72[0] = 0x7FFF00000000LL;
+ sll72[1] = 0x0;
+ }
+ /* else if (tmp72 < (signed 72bit) FF_FFFF_8000_0000_0000h) */
+ else if((sll72[1] & 0x80) &&
+ (((unsigned long long)sll72[1] < 0xFFFFFFFFFFFFFFFFULL) ||
+ (((unsigned long long)sll72[1] == 0xFFFFFFFFFFFFFFFFULL)
+ && ((unsigned long long)sll72[0] < 0xFFFF800000000000ULL))))
+ {
+ /* Adest = FF_FFFF_8000_0000_0000h;*/
+ sll72[0] = 0xFFFF800000000000LL;
+ sll72[1] = 0xFFLL;
+ }
else
- ll &= 0xffffffff00000000ULL;
- put_reg64 (acc64, ll);
+ {
+ /* Adest = tmp & FF_FFFF_FFFF_0000_0000h; */
+ sll72[0] &= 0xFFFFFFFF00000000LL;
+ sll72[1] &= 0xFFLL;
+ }
+ PD_72(sll72);
+ E1;
+ break;
+
+ case RXO_racl:
+ sll72 = GD_72();
+ v = GS();
+ /* tmp = (signed 72bit) Adest << src; */
+ sll72[0] <<= v;
+ sll72[1] <<= v;
+ /* tmp73 = (signed 73bit) tmp + 000_0000_0000_8000_0000h; */
+ sll72[0] += 0x80000000LL;
+ /*if overflow */
+ if((unsigned long long)sll72[0] < 0x80000000ULL)
+ {
+ sll72[1]++;
+ }
+ /* if (tmp > (signed 72bit) 00_7FFF_FFFF_0000_0000h) */
+ if ((unsigned long long)sll72[0] > 0x7FFFFFFF00000000ULL)
+ {
+ /* Adest = 00_7FFF_FFFF_0000_0000h; */
+ sll72[0] = 0x7FFFFFFF00000000LL;
+ sll72[1] = 0x0;
+ }
+ /* else if (tmp < (signed 72bit) FF_8000_0000_0000_0000h) */
+ else if((sll72[1] & 0x80) &&
+ (((unsigned long long)sll72[1] < 0xFFFFFFFFFFFFFFFFULL) ||
+ (((unsigned long long)sll72[1] == 0xFFFFFFFFFFFFFFFFULL)
+ && ((unsigned long long)sll72[0] < 0x8000000000000000ULL))))
+ {
+ /* Adest = FF_FFFF_8000_0000_0000h;*/
+ sll72[0] = 0xFFFF800000000000LL;
+ sll72[1] = 0xFFLL;
+ }
+ else
+ {
+ /* Adest = tmp & FF_FFFF_FFFF_0000_0000h; */
+ sll72[0] &= 0xFFFFFFFF00000000LL;
+ sll72[1] &= 0xFFLL;
+ }
+ PD_72(sll72);
E1;
break;
@@ -1582,6 +2404,7 @@ decode_opcode (void)
regs.r_psw = poppc ();
if (FLAG_PM)
regs.r_psw |= FLAGBIT_U;
+ put_reg(libit, 0);
#ifdef CYCLE_ACCURATE
regs.fast_return = 0;
cycles (6);
@@ -1834,7 +2657,7 @@ decode_opcode (void)
}
E1;
break;
-
+
case RXO_sbb:
MATH_OP (-, ! carry);
break;
@@ -1871,7 +2694,10 @@ decode_opcode (void)
if (FLAG_PM
&& (v == FLAGBIT_I
|| v == FLAGBIT_U))
- break;
+ {
+ cycles(1);
+ break;
+ }
regs.r_psw |= v;
cycles (1);
break;
@@ -2155,9 +2981,237 @@ decode_opcode (void)
break;
case RXO_xor:
- LOGIC_OP (^);
- break;
-
+ if(opcode->op[2].type != RX_Operand_None)
+ {
+ //tprintf ("XOR\n");
+ mb = GS();
+ ma = GS2();
+ v = ma ^ mb;
+ set_sz (v, DSZ());
+ PD(v);
+ }
+ else
+ {
+ LOGIC_OP (^);
+ }
+ cycles (1);//TODO: update
+ break;
+
+ //TODO: ERIX
+ case RXO_dabs:
+ tprintf("DABS\n");
+ dins = GS_DB ();
+ PD_DB (rxdp_abs (dins));
+ //set_osz (dins, 4);
+ E (1);
+ break;
+ case RXO_dadd:
+ DOUBLE_OP2(dadd);
+ E (1);
+ break;
+ case RXO_dcmp:
+ da = GD_DB();
+ db = GS2_DB();
+ put_reg (dcmr, rxdp_cmp (da, db, GS()));
+ E (1);
+ break;
+ case RXO_ddiv:
+ DOUBLE_OP2(ddiv);
+ E (1);
+ break;
+ //TODO: improve this we can reduce the number of instructions
+ case RXO_dmov_1:
+ tprintf("DMOV.D\n");
+ dins = 0;
+ dins |= (long long)GS() << 32;
+ PD_DB(dins);
+ E (1);
+ break;
+ case RXO_dmov_2:
+ tprintf("DMOV.L\n");
+ dins = GD_DB() & 0x00000000ffffffff;
+ dins |= (long long)GS() << 32;
+ PD_DB(dins);
+ E (1);
+ break;
+ case RXO_dmov_3:
+ tprintf("DMOV.L\n");
+ dins = GD_DB() & 0xffffffff00000000;
+ dins |= (long long)GS() & 0x00000000ffffffff;
+ PD_DB(dins);
+ E (1);
+ break;
+ case RXO_dmov_4:
+ tprintf("DMOV.L\n");
+ dins = GS_DB() >> 32;
+ PD((long)dins);
+ E (1);
+ break;
+ case RXO_dmov_5:
+ tprintf("DMOV.L\n");
+ dins = GS_DB() & 0x00000000ffffffff;
+ PD((long)dins);
+ E (1);
+ break;
+ case RXO_dmov_6:
+ tprintf("DMOV.L\n");
+ dins = GS_DB();
+ PD_DB(dins);
+ E (1);
+ break;
+ case RXO_dmov_7:
+ case RXO_dmov_8:
+ case RXO_dmov_9:
+ tprintf("DMOV.D\n");
+ dins = GS_DB();
+ PD_64(dins);
+ E (1);
+ break;
+ case RXO_dmov_10:
+ case RXO_dmov_11:
+ case RXO_dmov_12:
+ tprintf("DMOV.D\n");
+ dins = GS_64();
+ PD_DB(dins);
+ E (1);
+ break;
+ case RXO_dmov_13:
+ tprintf("DMOV.D\n");
+ dins = 0;
+ dins |= (long long)GS_DB() << 32;
+ PD_DB(dins);
+ E (1);
+ break;
+ case RXO_dmov_14:
+ tprintf("DMOV.L\n");
+ dins = GD_DB() & 0x00000000ffffffff;
+ dins |= (long long)GS_DB() << 32;
+ PD_DB(dins);
+ E (1);
+ break;
+ case RXO_dmov_15:
+ tprintf("DMOV.L\n");
+ dins = GD_DB() & 0xffffffff00000000;
+ dins |= (long long)GS_DB() & 0x00000000ffffffff;
+ PD_DB(dins);
+ E (1);
+ break;
+ case RXO_dmul:
+ DOUBLE_OP2 (dmul);
+ E (1);
+ break;
+ case RXO_dneg:
+ tprintf("DNED\n");
+ dins = GS_DB ();
+ PD_DB (rxdp_neg (dins));
+ E (1);
+ break;
+ case RXO_dpopm:
+ if (opcode->op[1].reg > opcode->op[0].reg)
+ {
+ regs.r_pc = opcode_pc;
+ DO_RETURN (RX_MAKE_STOPPED (SIGILL));
+ }
+ for (v = opcode->op[1].reg; v <= opcode->op[0].reg; v++)
+ {
+ put_reg_double (v, pop_double ());
+ }
+ E (1);
+ break;
+ case RXO_dpopm_2:
+ if (opcode->op[1].reg > opcode->op[0].reg)
+ {
+ regs.r_pc = opcode_pc;
+ DO_RETURN (RX_MAKE_STOPPED (SIGILL));
+ }
+ for (v = opcode->op[1].reg; v <= opcode->op[0].reg; v++)
+ {
+ put_reg (v + dpsw, pop());
+ }
+ E (1);
+ break;
+ case RXO_dpushm:
+ if (opcode->op[1].reg > opcode->op[0].reg)
+ {
+ regs.r_pc = opcode_pc;
+ return RX_MAKE_STOPPED (SIGILL);
+ }
+ for (v = opcode->op[0].reg; v >= opcode->op[1].reg; v--)
+ {
+ push_double (get_reg_double (v));
+ }
+ E (1);
+ break;
+ case RXO_dpushm_2:
+ if (opcode->op[1].reg > opcode->op[0].reg)
+ {
+ regs.r_pc = opcode_pc;
+ return RX_MAKE_STOPPED (SIGILL);
+ }
+ for (v = opcode->op[0].reg; v >= opcode->op[1].reg; v--)
+ {
+ push (get_reg (v + dpsw));
+ }
+ E (1);
+ break;
+ case RXO_dround:
+ dins = GS_DB ();
+ PD_DB (rxdp_round (dins, regs.r_dpsw & DPSWBITS_DRM));
+ E (1);
+ break;
+ case RXO_dsqrt:
+ dins = GS_DB ();
+ PD_DB (rxdp_dsqrt (dins));
+ E (1);
+ break;
+ case RXO_dsub:
+ DOUBLE_OP2(dsub);
+ E (1);
+ break;
+ case RXO_dtof:
+ dins = GS_DB();
+ PD_DB (rxdp_dtof (dins, regs.r_dpsw & DPSWBITS_DRM));
+ E (1);
+ break;
+ case RXO_dtoi:
+ dins = GS_DB();
+ PD_DB (rxdp_dtoi (dins, regs.r_dpsw & DPSWBITS_DRM));
+ E (1);
+ break;
+ case RXO_dtou:
+ dins = GS_DB();
+ PD_DB (rxdp_dtou (dins, regs.r_dpsw & DPSWBITS_DRM));
+ E (1);
+ break;
+ case RXO_ftod:
+ uma = GS ();
+ PD_DB (rxdp_ftod (uma));
+ E (1);
+ break;
+ case RXO_itod:
+ uma = GS ();
+ PD_DB (rxdp_itod (uma));
+ E (1);
+ break;
+ case RXO_mvfdc:
+ PD(get_reg(opcode->op[1].reg + dpsw));
+ E (1);
+ break;
+ case RXO_mvfdr:
+ /* write Z flag */
+ regs.r_psw &= ~FLAGBIT_Z;
+ regs.r_psw |= (get_reg(dcmr) & 1) << 1;
+ E (1);
+ break;
+ case RXO_mvtdc:
+ put_reg(opcode->op[0].reg + dpsw, GS ());
+ E (1);
+ break;
+ case RXO_utod:
+ uma = GS ();
+ PD_DB (rxdp_utod (uma));
+ E (1);
+ break;
default:
EXCEPTION (EX_UNDEFINED);
}
diff --git a/sim/rx/syscalls.c b/sim/rx/syscalls.c
index f2ef91b3c149..c8179ad136b3 100644
--- a/sim/rx/syscalls.c
+++ b/sim/rx/syscalls.c
@@ -137,6 +137,8 @@ static char *callnames[] = {
"SYS_link"
};
+unsigned ccrx_sys_flags;
+
int
rx_syscall (int id)
{
@@ -181,7 +183,21 @@ rx_syscall (int id)
else
{
int h_oflags = 0;
-
+ if (ccrx_sys_flags)
+ {
+ if (oflags & 0x0001)
+ h_oflags |= O_RDONLY;
+ if (oflags & 0x0002)
+ h_oflags |= O_WRONLY;
+ if (oflags & 0x0010)
+ h_oflags |= O_CREAT;
+ if (oflags & 0x0004)
+ h_oflags |= O_APPEND;
+ if (oflags & 0x0008)
+ h_oflags |= O_TRUNC;
+ }
+ else
+ {
if (oflags & 0x0001)
h_oflags |= O_WRONLY;
if (oflags & 0x0002)
@@ -192,6 +208,7 @@ rx_syscall (int id)
h_oflags |= O_APPEND;
if (oflags & 0x0400)
h_oflags |= O_TRUNC;
+ }
rv = open (buf, h_oflags, cflags);
}
if (trace)
diff --git a/sim/rx/trace.c b/sim/rx/trace.c
index 443a990c669e..b5cad4ed89d9 100644
--- a/sim/rx/trace.c
+++ b/sim/rx/trace.c
@@ -345,7 +345,7 @@ sim_disasm_one (void)
#endif
- max = print_insn_rx (mypc, & info);
+ max = print_insn_rxv3_dfpu (mypc, & info);
for (i = 0; i < max; i++)
{