Skip to content

[WIP] Fix octal psram with flash 80M #505

New issue

Have a question about this project? Sign up for a free GitHub account to open an issue and contact its maintainers and the community.

Sign up for GitHub

By clicking “Sign up for GitHub”, you agree to our terms of service and privacy statement. We’ll occasionally send you account related emails.

Already on GitHub? Sign in to your account

Draft
wants to merge 2 commits into
base: main
Choose a base branch
from
Draft

[WIP] Fix octal psram with flash 80M #505

Show file tree
Hide file tree
Changes from all commits
Commits
Show all changes
2 commits
Select commit Hold shift + click to select a range
ab000a2
Temporary disable check to rule out flash size misconfiguration
marekmatej Nov 26, 2025
0293fb3
components: esp_hw_support: [WIP] Fix PSRAM/FLASH tuning
marekmatej Nov 26, 2025
File filter

Filter by extension

Filter by extension
Conversations
Failed to load comments.
Loading
Jump to
Jump to file
Failed to load files.
Loading
Diff view
Diff view
8 changes: 8 additions & 0 deletions components/esp_hw_support/mspi_timing_tuning.c
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -25,6 +25,10 @@
#include "esp32s3/rom/cache.h"
#endif

#if MSPI_TIMING_PSRAM_STR_MODE
#error
#endif

#if MSPI_TIMING_FLASH_NEEDS_TUNING || MSPI_TIMING_PSRAM_NEEDS_TUNING
const static char *TAG = "MSPI Timing";
static mspi_timing_tuning_param_t s_flash_best_timing_tuning_config;
Expand Down Expand Up @@ -421,12 +425,15 @@ void mspi_timing_flash_tuning(void)
mspi_timing_config_t timing_configs = {0};
get_flash_tuning_configs(&timing_configs);

ets_printf("::start:: %s\n", __func__);
do_tuning(reference_data, &timing_configs, true);
mspi_timing_enter_high_speed_mode(true);
ets_printf("::done:: %s\n", __func__);
}
#else
void mspi_timing_flash_tuning(void)
{
#error
//Empty function for compatibility, therefore upper layer won't need to know that FLASH in which operation mode and frequency config needs to be tuned
}
#endif //MSPI_TIMING_FLASH_NEEDS_TUNING
Expand Down Expand Up @@ -482,6 +489,7 @@ void mspi_timing_psram_tuning(void)
#else
void mspi_timing_psram_tuning(void)
{
#error
//Empty function for compatibility, therefore upper layer won't need to know that FLASH in which operation mode and frequency config needs to be tuned
}
#endif //MSPI_TIMING_PSRAM_NEEDS_TUNING
Expand Down
1 change: 1 addition & 0 deletions components/esp_hw_support/port/esp32s3/mspi_timing_config.c
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -191,6 +191,7 @@ void mspi_timing_config_psram_set_din_mode_num(uint8_t spi_num, uint8_t din_mode
void mspi_timing_config_psram_set_extra_dummy(uint8_t spi_num, uint8_t extra_dummy)
{
#if CONFIG_SPIRAM_MODE_OCT
ets_printf(":: %s(%d, %d)\n", __func__, spi_num, extra_dummy);
mspi_timing_ll_set_octal_psram_extra_dummy(spi_num, extra_dummy);
#elif CONFIG_SPIRAM_MODE_QUAD
//HW workaround: Use normal dummy register to set extra dummy, the calibration dedicated extra dummy register doesn't work for quad mode
Expand Down
8 changes: 5 additions & 3 deletions components/esp_hw_support/port/esp32s3/mspi_timing_tuning_configs.h
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -12,7 +12,7 @@
#define MSPI_TIMING_CONFIG_NUM_DEFAULT 20 //This should be larger than the max available timing config num
#define MSPI_TIMING_TEST_DATA_LEN 64
#define MSPI_TIMING_PSRAM_TEST_DATA_ADDR 0
#define MSPI_TIMING_FLASH_TEST_DATA_ADDR ESP_BOOTLOADER_OFFSET
#define MSPI_TIMING_FLASH_TEST_DATA_ADDR 0x3b0000 //ESP_BOOTLOADER_OFFSET
/**
* @note BACKGOURND:
*
Expand All @@ -37,13 +37,15 @@
* 2. DDR mode requires the core clock divider (core_clk / div = module_clk) to be power of 2.
*/
//--------------------------------------FLASH Sampling Mode --------------------------------------//
#define MSPI_TIMING_FLASH_DTR_MODE CONFIG_ESPTOOLPY_FLASH_SAMPLE_MODE_DTR
#define MSPI_TIMING_FLASH_STR_MODE CONFIG_ESPTOOLPY_FLASH_SAMPLE_MODE_STR
#define MSPI_TIMING_FLASH_DTR_MODE 1 //CONFIG_ESPTOOLPY_FLASH_SAMPLE_MODE_DTR
#define MSPI_TIMING_FLASH_STR_MODE 0 //CONFIG_ ESPTOOLPY_FLASH_SAMPLE_MODE_STR
//--------------------------------------FLASH Module Clock --------------------------------------//
#if CONFIG_ESPTOOLPY_FLASHFREQ_20M
#define MSPI_TIMING_FLASH_MODULE_CLOCK 20
#error
#elif CONFIG_ESPTOOLPY_FLASHFREQ_40M
#define MSPI_TIMING_FLASH_MODULE_CLOCK 40
#error
#elif CONFIG_ESPTOOLPY_FLASHFREQ_80M
#define MSPI_TIMING_FLASH_MODULE_CLOCK 80
#else //CONFIG_ESPTOOLPY_FLASHFREQ_120M
Expand Down
5 changes: 3 additions & 2 deletions components/spi_flash/esp_flash_api.c
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -852,7 +852,8 @@ esp_err_t IRAM_ATTR esp_flash_read(esp_flash_t *chip, void *buffer, uint32_t add
{
esp_err_t err = rom_spiflash_api_funcs->chip_check(&chip);
VERIFY_CHIP_OP(read);
if (buffer == NULL || address > chip->size || address+length > chip->size) {
if (buffer == NULL /* || address > chip->size || address+length > chip->size*/) {
ets_printf("chip.size=%x buffer=%x address=%x end=%x\n", chip->size, buffer, address, address+length);
return ESP_ERR_INVALID_ARG;
}
if (length == 0) {
Expand Down Expand Up @@ -1012,7 +1013,7 @@ esp_err_t IRAM_ATTR esp_flash_write(esp_flash_t *chip, const void *buffer, uint3
esp_err_t err = rom_spiflash_api_funcs->chip_check(&chip);
VERIFY_CHIP_OP(write);
CHECK_WRITE_ADDRESS(chip, address, length);
if (buffer == NULL || address > chip->size || address+length > chip->size) {
if (buffer == NULL /* || address > chip->size || address+length > chip->size*/) {
return ESP_ERR_INVALID_ARG;
}
if (length == 0) {
Expand Down