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stm32cube: stm32f2: excluded phy init and config
exclude phy init and config as that is already done in zephyr before and we don't want it to be overwritten Signed-off-by: Fin Maaß <[email protected]>
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-1
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stm32cube/stm32f2xx/README

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@@ -56,4 +56,11 @@ Patch List:
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Impacted files:
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drivers/include/Legacy/stm32_hal_legacy.h
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*stm32cube: stm32f2: excluded phy init and config
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exclude phy init and config as that is already
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done in zephyr before and we don't want it to
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be overwritten
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Impacted files:
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drivers/src/stm32f2xx_hal_eth.c
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See release_note.html from STM32Cube

stm32cube/stm32f2xx/drivers/src/stm32f2xx_hal_eth.c

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@@ -209,7 +209,10 @@ static void ETH_InitCallbacksToDefault(ETH_HandleTypeDef *heth);
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*/
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HAL_StatusTypeDef HAL_ETH_Init(ETH_HandleTypeDef *heth)
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{
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uint32_t tmpreg1 = 0U, phyreg = 0U;
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uint32_t tmpreg1 = 0U;
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#ifndef __ZEPHYR__
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uint32_t phyreg = 0U;
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#endif /* __ZEPHYR__ */
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uint32_t hclk = 60000000U;
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uint32_t tickstart = 0U;
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uint32_t err = ETH_SUCCESS;
@@ -312,6 +315,7 @@ HAL_StatusTypeDef HAL_ETH_Init(ETH_HandleTypeDef *heth)
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/* Write to ETHERNET MAC MIIAR: Configure the ETHERNET CSR Clock Range */
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(heth->Instance)->MACMIIAR = (uint32_t)tmpreg1;
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#ifndef __ZEPHYR__
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/*-------------------- PHY initialization and configuration ----------------*/
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/* Put the PHY in reset mode */
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if ((HAL_ETH_WritePHYRegister(heth, PHY_BCR, PHY_RESET)) != HAL_OK)
@@ -471,6 +475,7 @@ HAL_StatusTypeDef HAL_ETH_Init(ETH_HandleTypeDef *heth)
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/* Delay to assure PHY configuration */
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HAL_Delay(PHY_CONFIG_DELAY);
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}
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#endif /* __ZEPHYR__ */
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/* Config MAC and DMA */
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ETH_MACDMAConfig(heth, err);

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