From f2d8289551aa4e4932e51ec026f6dbb6ba68ad1e Mon Sep 17 00:00:00 2001 From: Mathieu Choplain Date: Mon, 27 Oct 2025 15:24:28 +0100 Subject: [PATCH 1/2] drivers: i2s: stm32: sai: don't use legacy "SAI_MASTERDIVIDER_DISABLED" This macro is now called "SAI_MASTERDIVIDER_DISABLE" (no 'D' at the end); stop using the old name which only worked thanks to the HAL Legacy definitions header. Signed-off-by: Mathieu Choplain --- drivers/i2s/i2s_stm32_sai.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/i2s/i2s_stm32_sai.c b/drivers/i2s/i2s_stm32_sai.c index a62b387e656f8..cb2d61901fc5f 100644 --- a/drivers/i2s/i2s_stm32_sai.c +++ b/drivers/i2s/i2s_stm32_sai.c @@ -594,7 +594,7 @@ static int i2s_stm32_sai_configure(const struct device *dev, enum i2s_dir dir, #endif if (cfg->mclk_div == (enum mclk_divider)MCLK_NO_DIV) { - hsai->Init.NoDivider = SAI_MASTERDIVIDER_DISABLED; + hsai->Init.NoDivider = SAI_MASTERDIVIDER_DISABLE; } else { hsai->Init.NoDivider = SAI_MASTERDIVIDER_ENABLE; From 624d7b9f695558c502c29c3d7bbb0e6c046d7b12 Mon Sep 17 00:00:00 2001 From: Mathieu Choplain Date: Mon, 27 Oct 2025 15:15:41 +0100 Subject: [PATCH 2/2] tests: drivers: clock_control: stm32h5: replace legacy macros usage Replace use of legacy STM32Cube HAL macros in the STM32H5-specific test "tests/drivers/clock_control/stm32_clock_configuration/stm32h5_core": __HAL_RCC_GET_PLL_OSCSOURCE() => __HAL_RCC_GET_PLL1_OSCSOURCE() RCC_PLLSOURCE_xxx => RCC_PLL1_SOURCE_xxx Signed-off-by: Mathieu Choplain --- .../stm32h5_core/src/test_stm32_clock_configuration.c | 10 +++++----- 1 file changed, 5 insertions(+), 5 deletions(-) diff --git a/tests/drivers/clock_control/stm32_clock_configuration/stm32h5_core/src/test_stm32_clock_configuration.c b/tests/drivers/clock_control/stm32_clock_configuration/stm32h5_core/src/test_stm32_clock_configuration.c index 25623e05f7f4e..75fb2096ae8aa 100644 --- a/tests/drivers/clock_control/stm32_clock_configuration/stm32h5_core/src/test_stm32_clock_configuration.c +++ b/tests/drivers/clock_control/stm32_clock_configuration/stm32h5_core/src/test_stm32_clock_configuration.c @@ -55,22 +55,22 @@ ZTEST(stm32_syclck_config, test_sysclk_src) ZTEST(stm32_syclck_config, test_pll_src) { - uint32_t pll_src = __HAL_RCC_GET_PLL_OSCSOURCE(); + uint32_t pll_src = __HAL_RCC_GET_PLL1_OSCSOURCE(); #if STM32_PLL_SRC_HSE - zassert_equal(RCC_PLLSOURCE_HSE, pll_src, + zassert_equal(RCC_PLL1_SOURCE_HSE, pll_src, "Expected PLL src: HSE. Actual PLL src: %d", pll_src); #elif STM32_PLL_SRC_HSI - zassert_equal(RCC_PLLSOURCE_HSI, pll_src, + zassert_equal(RCC_PLL1_SOURCE_HSI, pll_src, "Expected PLL src: HSI. Actual PLL src: %d", pll_src); #elif STM32_PLL_SRC_CSI - zassert_equal(RCC_PLLSOURCE_CSI, pll_src, + zassert_equal(RCC_PLL1_SOURCE_CSI, pll_src, "Expected PLL src: CSI. Actual PLL src: %d", pll_src); #else - zassert_equal(RCC_PLLSOURCE_NONE, pll_src, + zassert_equal(RCC_PLL1_SOURCE_NONE, pll_src, "Expected PLL src: None. Actual PLL src: %d", pll_src); #endif