drivers: mspi: ambiq: boards: samples: add Apollo3 Blue MSPI support#110514
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RichardSWheatley wants to merge 4 commits into
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drivers: mspi: ambiq: boards: samples: add Apollo3 Blue MSPI support#110514RichardSWheatley wants to merge 4 commits into
RichardSWheatley wants to merge 4 commits into
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Rename the mspi0 node from spi@40020000 to mspi@40020000 to match the actual bus type. Update the compatible string from ambiq,mspi to ambiq,mspi-controller to align with the binding name used by the driver. Add clock-frequency = <48000000> as the default operating frequency. Signed-off-by: Richard Wheatley <richard.wheatley@ambiq.com>
Guard Apollo3P Blue-only HAL fields (write latency, DMA boundary, timing control, instruction/address size runtime control) behind CONFIG_SOC_APOLLO3P_BLUE ifdefs so the driver also compiles and runs correctly on Apollo3 Blue. Add a dedicated MSPI_AMBIQ_BUFF_RAM_LOCATION default for Apollo3 Blue (0x40000) to account for its smaller SRAM layout. Gate the MSPI_TIMING imply on SOC_APOLLO3P_BLUE since the timing API is not available on Apollo3 Blue. mspi_ambiq_timing_config() returns -ENOTSUP on Apollo3 Blue. mem_boundary and time_to_break return -ENOTSUP if non-zero values are requested on that SoC. Signed-off-by: Richard Wheatley <richard.wheatley@ambiq.com>
Add mspi0_default group2 for the MSPI0_8 pin (P24) with iom-mspi and iom-num bindings, and update the NCE19 group3 with the missing ambiq,iom-mspi property. Add mspi0_sleep state covering all six MSPI0 pins (P22, P26, P4, P23, P24, P19) as GPIO so they are tristated when the bus is idle. Signed-off-by: Richard Wheatley <richard.wheatley@ambiq.com>
Add a new sample that exercises the MSPI TX path on the Apollo3 EVB and Apollo3 Plus EVB boards. The sample is intended to be used with a logic analyser or oscilloscope to verify MSPI signal integrity. Board-specific overlays configure the MSPI0 peripheral and pinctrl. The apollo3_evb.conf disables serial/console to fit within Apollo3 Blue's 320 KB SRAM budget. Signed-off-by: Richard Wheatley <richard.wheatley@ambiq.com>
zephyrbot
added
area: Boards/SoCs
area: MSPI
platform: Ambiq
zephyrbot
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AlessandroLuo,
JarmouniA,
aaronyegx,
kartben,
nashif,
nordicjm,
swift-tk and
sylvioalves
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JarmouniA
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Jun 3, 2026
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Why is the new sample board/soc specific!?
| ret = -EHOSTDOWN; | ||
| goto e_return; | ||
| } | ||
| #endif |
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Suggested change
| #endif | |
| #endif /* CONFIG_SOC_APOLLO3P_BLUE */ |
| ret = -EHOSTDOWN; | ||
| goto e_return; | ||
| } | ||
| #endif |
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Suggested change
| #endif | |
| #endif /* CONFIG_SOC_APOLLO3P_BLUE */ |
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The other boards/socs have an on-board MSPI or a shield. This one does not. |
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Extend the Ambiq MSPI AP3 driver to support Apollo3 Blue (in addition
to the existing Apollo3 Plus Blue support), add the necessary board
pinctrl configuration for the Apollo3 EVB, fix the MSPI0 DTS node on
the Apollo3 Blue SoC, and introduce a new sample to verify MSPI TX
signal integrity.
Changes:
dts/arm/ambiq/ambiq_apollo3_blue.dtsi:
drivers/mspi/Kconfig.ambiq:
drivers/mspi/mspi_ambiq_ap3.c:
instruction/address size runtime control) behind
CONFIG_SOC_APOLLO3P_BLUE
Apollo3 Blue
boards/ambiq/apollo3_evb/apollo3_evb-pinctrl.dtsi:
samples/boards/ambiq/apollo3_mspi_tx_scope:
Apollo3 Plus EVB, intended for use with a logic analyser or
oscilloscope to verify signal integrity
Apollo3 Blue's 320 KB SRAM budget
Tested by building for apollo3_evb/apollo3_blue and
apollo3p_evb/apollo3p_blue and running the TX scope sample on
hardware.
#105729