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Add Adafruit qtpy ch32v203 board (openwch#136)
* add adafruit qtpy ch32v203g6 board * use 224KB for qtpy v203, implement pre_iint() to enable enhanced read mode
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Diff for: ‎boards.txt

+16
Original file line numberDiff line numberDiff line change
@@ -524,6 +524,22 @@ CH32V20x_EVT.menu.pnum.CH32V203C6.build.math_lib_gcc=-lm
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CH32V20x_EVT.menu.pnum.CH32V203C6.build.IQ_math_RV32=
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CH32V20x_EVT.menu.pnum.CH32V203C6.build.ch_extra_lib=-lprintf
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#Adafruit QTPy CH32V203G6 Board
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CH32V20x_EVT.menu.pnum.CH32V203G6_ADAFRUIT_QTPY=Adafruit QTPy CH32V203G6
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CH32V20x_EVT.menu.pnum.CH32V203G6_ADAFRUIT_QTPY.node=NODE_V203G6_ADAFRUIT_QTPY
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CH32V20x_EVT.menu.pnum.CH32V203G6_ADAFRUIT_QTPY.upload.maximum_size=229376
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CH32V20x_EVT.menu.pnum.CH32V203G6_ADAFRUIT_QTPY.upload.maximum_data_size=10240
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CH32V20x_EVT.menu.pnum.CH32V203G6_ADAFRUIT_QTPY.build.mcu=QingKe-V4B
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CH32V20x_EVT.menu.pnum.CH32V203G6_ADAFRUIT_QTPY.build.board=CH32V203G6_ADAFRUIT_QTPY
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CH32V20x_EVT.menu.pnum.CH32V203G6_ADAFRUIT_QTPY.build.series=CH32V20x
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CH32V20x_EVT.menu.pnum.CH32V203G6_ADAFRUIT_QTPY.build.variant=CH32V20x/CH32V203G6_ADAFRUIT_QTPY
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CH32V20x_EVT.menu.pnum.CH32V203G6_ADAFRUIT_QTPY.build.chip=CH32V203
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CH32V20x_EVT.menu.pnum.CH32V203G6_ADAFRUIT_QTPY.build.march=rv32imacxw
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CH32V20x_EVT.menu.pnum.CH32V203G6_ADAFRUIT_QTPY.build.mabi=ilp32
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CH32V20x_EVT.menu.pnum.CH32V203G6_ADAFRUIT_QTPY.build.math_lib_gcc=-lm
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CH32V20x_EVT.menu.pnum.CH32V203G6_ADAFRUIT_QTPY.build.IQ_math_RV32=
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CH32V20x_EVT.menu.pnum.CH32V203G6_ADAFRUIT_QTPY.build.ch_extra_lib=-lprintf
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# USB support
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CH32V20x_EVT.menu.usb.none=None

Diff for: ‎tools/makeboards.py

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@@ -80,6 +80,7 @@
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'CH32V203G6': {'name': 'CH32V203G6 EVT', 'maximum_size': 32768, 'maximum_data_size': 10240, 'mcu': 'QingKe-V4B', 'chip': 'CH32V203'},
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'CH32V203C8': {'name': 'CH32V203C8', 'maximum_size': 65536, 'maximum_data_size': 20480, 'mcu': 'QingKe-V4B', 'chip': 'CH32V203'},
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'CH32V203C6': {'name': 'CH32V203C6', 'maximum_size': 32768, 'maximum_data_size': 10240, 'mcu': 'QingKe-V4B', 'chip': 'CH32V203'},
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'CH32V203G6_ADAFRUIT_QTPY': {'name': 'Adafruit QTPy CH32V203G6', 'maximum_size': 229376, 'maximum_data_size': 10240, 'mcu': 'QingKe-V4B', 'chip': 'CH32V203'},
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}
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},
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'CH32V30x': {

Diff for: ‎variants/CH32V20x/CH32V203G6_ADAFRUIT_QTPY/CMakeLists.txt

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# v3.21 implemented semantic changes regarding $<TARGET_OBJECTS:...>
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# See https://cmake.org/cmake/help/v3.21/command/target_link_libraries.html#linking-object-libraries-via-target-objects
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cmake_minimum_required(VERSION 3.21)
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add_library(variant INTERFACE)
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add_library(variant_usage INTERFACE)
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target_include_directories(variant_usage INTERFACE
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.
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)
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target_link_libraries(variant_usage INTERFACE
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base_config
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)
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target_link_libraries(variant INTERFACE variant_usage)
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add_library(variant_bin STATIC EXCLUDE_FROM_ALL
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PeripheralPins.c
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variant_CH32V203G6_ADAFRUIT_QTPY.cpp
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)
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target_link_libraries(variant_bin PUBLIC variant_usage)
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target_link_libraries(variant INTERFACE
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variant_bin
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)
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Diff for: ‎variants/CH32V20x/CH32V203G6_ADAFRUIT_QTPY/PeripheralPins.c

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/**
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*******************************************************************************
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* Copyright (c) 2021 Nanjing Qinheng Microelectronics Co., Ltd.
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* All rights reserved.
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*
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* This software component is licensed by WCH under BSD 3-Clause license,
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* the "License"; You may not use this file except in compliance with the
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* License. You may obtain a copy of the License at:
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* opensource.org/licenses/BSD-3-Clause
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*
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*******************************************************************************
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*/
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#include "Arduino.h"
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#include "PeripheralPins.h"
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/* =====
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* Notes:
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* - The pins mentioned Px_y_ALTz are alternative possibilities which use other
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* HW peripheral instances. You can use them the same way as any other "normal"
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* pin (i.e. analogWrite(PA7_ALT1, 128);).
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*
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* - Commented lines are alternative possibilities which are not used per default.
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* If you change them, you will have to know what you do
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* =====
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*/
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//*** ADC ***
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#ifdef ADC_MODULE_ENABLED
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WEAK const PinMap PinMap_ADC[] = {
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{PA_0, ADC1, CH_PIN_DATA_EXT(CH_MODE_INPUT, CH_CNF_INPUT_ANALOG, 0, AFIO_NONE, 0)}, // ADC1_IN0
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{PA_0_ALT1, ADC2, CH_PIN_DATA_EXT(CH_MODE_INPUT, CH_CNF_INPUT_ANALOG, 0, AFIO_NONE, 0)}, // ADC2_IN0
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{PA_1, ADC1, CH_PIN_DATA_EXT(CH_MODE_INPUT, CH_CNF_INPUT_ANALOG, 0, AFIO_NONE, 1)}, // ADC1_IN1
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{PA_1_ALT1, ADC2, CH_PIN_DATA_EXT(CH_MODE_INPUT, CH_CNF_INPUT_ANALOG, 0, AFIO_NONE, 1)}, // ADC2_IN1
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{PA_2, ADC1, CH_PIN_DATA_EXT(CH_MODE_INPUT, CH_CNF_INPUT_ANALOG, 0, AFIO_NONE, 2)}, // ADC1_IN2
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{PA_2_ALT1, ADC2, CH_PIN_DATA_EXT(CH_MODE_INPUT, CH_CNF_INPUT_ANALOG, 0, AFIO_NONE, 2)}, // ADC2_IN2
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{PA_3, ADC1, CH_PIN_DATA_EXT(CH_MODE_INPUT, CH_CNF_INPUT_ANALOG, 0, AFIO_NONE, 3)}, // ADC1_IN3
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{PA_3_ALT1, ADC2, CH_PIN_DATA_EXT(CH_MODE_INPUT, CH_CNF_INPUT_ANALOG, 0, AFIO_NONE, 3)}, // ADC2_IN3
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{PA_4, ADC1, CH_PIN_DATA_EXT(CH_MODE_INPUT, CH_CNF_INPUT_ANALOG, 0, AFIO_NONE, 4)}, // ADC1_IN4
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{PA_4_ALT1, ADC2, CH_PIN_DATA_EXT(CH_MODE_INPUT, CH_CNF_INPUT_ANALOG, 0, AFIO_NONE, 4)}, // ADC2_IN4
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{PA_5, ADC1, CH_PIN_DATA_EXT(CH_MODE_INPUT, CH_CNF_INPUT_ANALOG, 0, AFIO_NONE, 5)}, // ADC1_IN5
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{PA_5_ALT1, ADC2, CH_PIN_DATA_EXT(CH_MODE_INPUT, CH_CNF_INPUT_ANALOG, 0, AFIO_NONE, 5)}, // ADC2_IN5
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{PA_6, ADC1, CH_PIN_DATA_EXT(CH_MODE_INPUT, CH_CNF_INPUT_ANALOG, 0, AFIO_NONE, 6)}, // ADC1_IN6
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{PA_6_ALT1, ADC2, CH_PIN_DATA_EXT(CH_MODE_INPUT, CH_CNF_INPUT_ANALOG, 0, AFIO_NONE, 6)}, // ADC2_IN6
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{PA_7, ADC1, CH_PIN_DATA_EXT(CH_MODE_INPUT, CH_CNF_INPUT_ANALOG, 0, AFIO_NONE, 7)}, // ADC1_IN7
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{PA_7_ALT1, ADC2, CH_PIN_DATA_EXT(CH_MODE_INPUT, CH_CNF_INPUT_ANALOG, 0, AFIO_NONE, 7)}, // ADC2_IN7
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{PB_0, ADC1, CH_PIN_DATA_EXT(CH_MODE_INPUT, CH_CNF_INPUT_ANALOG, 0, AFIO_NONE, 8)}, // ADC1_IN8
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{PB_0_ALT1, ADC2, CH_PIN_DATA_EXT(CH_MODE_INPUT, CH_CNF_INPUT_ANALOG, 0, AFIO_NONE, 8)}, // ADC2_IN8
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{PB_1, ADC1, CH_PIN_DATA_EXT(CH_MODE_INPUT, CH_CNF_INPUT_ANALOG, 0, AFIO_NONE, 9)}, // ADC1_IN9
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{PB_1_ALT1, ADC2, CH_PIN_DATA_EXT(CH_MODE_INPUT, CH_CNF_INPUT_ANALOG, 0, AFIO_NONE, 9)}, // ADC2_IN9
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{NC, NP, 0}
52+
};
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#endif
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//*** No DAC ***
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//*** I2C ***
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#ifdef I2C_MODULE_ENABLED
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WEAK const PinMap PinMap_I2C_SDA[] = {
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{PB_7, I2C1, CH_PIN_DATA(CH_MODE_OUTPUT_50MHz, CH_CNF_OUTPUT_AFOD, NOPULL, AFIO_NONE)},
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{PB_9, I2C1, CH_PIN_DATA(CH_MODE_OUTPUT_50MHz, CH_CNF_OUTPUT_AFOD, NOPULL, AFIO_Remap_I2C1_ENABLE)},
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{NC, NP, 0}
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};
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#endif
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#ifdef I2C_MODULE_ENABLED
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WEAK const PinMap PinMap_I2C_SCL[] = {
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{PB_6, I2C1, CH_PIN_DATA(CH_MODE_OUTPUT_50MHz, CH_CNF_OUTPUT_AFOD, NOPULL, AFIO_NONE)},
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{PB_8, I2C1, CH_PIN_DATA(CH_MODE_OUTPUT_50MHz, CH_CNF_OUTPUT_AFOD, NOPULL, AFIO_Remap_I2C1_ENABLE)},
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{NC, NP, 0}
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};
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#endif
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//*** TIM ***
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#ifdef TIM_MODULE_ENABLED
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WEAK const PinMap PinMap_TIM[] = {
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{PA_0, TIM2, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, CH_CNF_OUTPUT_AFPP, NOPULL, AFIO_Remap_TIM2_DISABLE, 1)}, // TIM2_CH1
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{PA_1, TIM2, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, CH_CNF_OUTPUT_AFPP, NOPULL, AFIO_Remap_TIM2_DISABLE, 2)}, // TIM2_CH2
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{PA_2, TIM2, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, CH_CNF_OUTPUT_AFPP, NOPULL, AFIO_Remap_TIM2_DISABLE, 3)}, // TIM2_CH3
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{PA_3, TIM2, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, CH_CNF_OUTPUT_AFPP, NOPULL, AFIO_Remap_TIM2_DISABLE, 4)}, // TIM2_CH4
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{PA_6, TIM3, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, CH_CNF_OUTPUT_AFPP, NOPULL, AFIO_Remap_TIM3_DISABLE, 1)}, // TIM3_CH1
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{PA_7, TIM3, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, CH_CNF_OUTPUT_AFPP, NOPULL, AFIO_Remap_TIM3_DISABLE, 2)}, // TIM3_CH2
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{PB_0, TIM3, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, CH_CNF_OUTPUT_AFPP, NOPULL, AFIO_Remap_TIM3_DISABLE, 3)}, // TIM3_CH3
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{PB_1, TIM3, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, CH_CNF_OUTPUT_AFPP, NOPULL, AFIO_Remap_TIM3_DISABLE, 4)}, // TIM3_CH4
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{PB_6, TIM4, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, CH_CNF_OUTPUT_AFPP, NOPULL, AFIO_Remap_TIM4_DISABLE, 1)}, // TIM4_CH1
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{PB_7, TIM4, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, CH_CNF_OUTPUT_AFPP, NOPULL, AFIO_Remap_TIM4_DISABLE, 2)}, // TIM4_CH2
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{PB_8, TIM4, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, CH_CNF_OUTPUT_AFPP, NOPULL, AFIO_Remap_TIM4_DISABLE, 3)}, // TIM4_CH3
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{PB_9, TIM4, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, CH_CNF_OUTPUT_AFPP, NOPULL, AFIO_Remap_TIM4_DISABLE, 4)}, // TIM4_CH4
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{PA_8, TIM1, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, CH_CNF_OUTPUT_AFPP, NOPULL, AFIO_Remap_TIM1_DISABLE, 1)}, // TIM1_CH1
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{PA_9, TIM1, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, CH_CNF_OUTPUT_AFPP, NOPULL, AFIO_Remap_TIM1_DISABLE, 2)}, // TIM1_CH2
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{PA_10, TIM1, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, CH_CNF_OUTPUT_AFPP, NOPULL, AFIO_Remap_TIM1_DISABLE, 3)}, // TIM1_CH3
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{PA_11, TIM1, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, CH_CNF_OUTPUT_AFPP, NOPULL, AFIO_Remap_TIM1_DISABLE, 4)}, // TIM1_CH4
98+
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{PB_13, TIM1, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, CH_CNF_OUTPUT_AFPP, NOPULL, AFIO_Remap_TIM1_DISABLE, 1)}, // TIM1_CH1N
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{PB_14, TIM1, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, CH_CNF_OUTPUT_AFPP, NOPULL, AFIO_Remap_TIM1_DISABLE, 2)}, // TIM1_CH2N
101+
{PA_15, TIM1, CH_PIN_DATA_EXT(CH_MODE_OUTPUT_50MHz, CH_CNF_OUTPUT_AFPP, NOPULL, AFIO_Remap_TIM1_DISABLE, 3)}, // TIM1_CH3N
102+
{NC, NP, 0}
103+
};
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#endif
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//*** UART ***
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#ifdef UART_MODULE_ENABLED
108+
WEAK const PinMap PinMap_UART_TX[] = {
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{PA_9, USART1, CH_PIN_DATA(CH_MODE_OUTPUT_50MHz, CH_CNF_OUTPUT_AFPP, 0, AFIO_NONE)},
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{PB_6, USART1, CH_PIN_DATA(CH_MODE_OUTPUT_50MHz, CH_CNF_OUTPUT_AFPP, 0, AFIO_Remap_USART1_ENABLE)},
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{PA_2, USART2, CH_PIN_DATA(CH_MODE_OUTPUT_50MHz, CH_CNF_OUTPUT_AFPP, 0, AFIO_NONE)},
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{PB_10,USART3, CH_PIN_DATA(CH_MODE_OUTPUT_50MHz, CH_CNF_OUTPUT_AFPP, 0, AFIO_NONE)},
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{PC_10,USART3, CH_PIN_DATA(CH_MODE_OUTPUT_50MHz, CH_CNF_OUTPUT_AFPP, 0, AFIO_FullRemap_USART3_ENABLE)},
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{PB_0, UART4, CH_PIN_DATA(CH_MODE_OUTPUT_50MHz, CH_CNF_OUTPUT_AFPP, 0, AFIO_NONE)},
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{PA_5, UART4, CH_PIN_DATA(CH_MODE_OUTPUT_50MHz, CH_CNF_OUTPUT_AFPP, 0, AFIO_FullRemap_USART4_ENABLE)},
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{NC, NP, 0}
117+
};
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#endif
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#ifdef UART_MODULE_ENABLED
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WEAK const PinMap PinMap_UART_RX[] = {
122+
{PA_10, USART1, CH_PIN_DATA(CH_MODE_INPUT, CH_CNF_INPUT_PUPD, PULLUP, AFIO_NONE)},
123+
{PB_7, USART1, CH_PIN_DATA(CH_MODE_INPUT, CH_CNF_INPUT_PUPD, PULLUP, AFIO_Remap_USART1_ENABLE)},
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{PA_3, USART2, CH_PIN_DATA(CH_MODE_INPUT, CH_CNF_INPUT_PUPD, PULLUP, AFIO_NONE)},
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{PB_11, USART3, CH_PIN_DATA(CH_MODE_INPUT, CH_CNF_INPUT_PUPD, PULLUP, AFIO_NONE)},
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{PC_11, USART3, CH_PIN_DATA(CH_MODE_INPUT, CH_CNF_INPUT_PUPD, PULLUP, AFIO_FullRemap_USART3_ENABLE)},
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{PB_1, UART4, CH_PIN_DATA(CH_MODE_INPUT, CH_CNF_INPUT_PUPD, PULLUP, AFIO_NONE)},
128+
{PB_5, UART4, CH_PIN_DATA(CH_MODE_INPUT, CH_CNF_INPUT_PUPD, PULLUP, AFIO_FullRemap_USART4_ENABLE)},
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{NC, NP, 0}
130+
};
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#endif
132+
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#ifdef UART_MODULE_ENABLED
134+
WEAK const PinMap PinMap_UART_RTS[] = {
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{PA_12, USART1, CH_PIN_DATA(CH_MODE_OUTPUT_50MHz, CH_CNF_OUTPUT_AFPP, 0, AFIO_NONE)},
136+
{PA_1, USART2, CH_PIN_DATA(CH_MODE_OUTPUT_50MHz, CH_CNF_OUTPUT_AFPP, 0, AFIO_NONE)},
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{PB_14, USART3, CH_PIN_DATA(CH_MODE_OUTPUT_50MHz, CH_CNF_OUTPUT_AFPP, 0, AFIO_NONE)},
138+
{PB_4, UART4, CH_PIN_DATA(CH_MODE_OUTPUT_50MHz, CH_CNF_OUTPUT_AFPP, 0, AFIO_NONE)},
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{NC, NP, 0}
140+
};
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#endif
142+
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#ifdef UART_MODULE_ENABLED
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WEAK const PinMap PinMap_UART_CTS[] = {
145+
{PA_11, USART1, CH_PIN_DATA(CH_MODE_INPUT, CH_CNF_INPUT_PUPD, PULLUP, AFIO_NONE)},
146+
{PA_0, USART2, CH_PIN_DATA(CH_MODE_INPUT, CH_CNF_INPUT_PUPD, PULLUP, AFIO_NONE)},
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{PB_13, USART3, CH_PIN_DATA(CH_MODE_INPUT, CH_CNF_INPUT_PUPD, PULLUP, AFIO_NONE)},
148+
{PB_3, UART4, CH_PIN_DATA(CH_MODE_INPUT, CH_CNF_INPUT_PUPD, PULLUP, AFIO_NONE)},
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{NC, NP, 0}
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};
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#endif
152+
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//*** SPI ***
155+
#ifdef SPI_MODULE_ENABLED
156+
WEAK const PinMap PinMap_SPI_MOSI[] = {
157+
{PA_7, SPI1, CH_PIN_DATA(CH_MODE_OUTPUT_50MHz, CH_CNF_OUTPUT_AFPP, 0, AFIO_NONE)},
158+
{NC, NP, 0}
159+
};
160+
#endif
161+
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#ifdef SPI_MODULE_ENABLED
163+
WEAK const PinMap PinMap_SPI_MISO[] = {
164+
{PA_6, SPI1, CH_PIN_DATA(CH_MODE_INPUT, CH_CNF_INPUT_FLOAT, 0, AFIO_NONE)},
165+
{NC, NP, 0}
166+
};
167+
#endif
168+
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#ifdef SPI_MODULE_ENABLED
170+
WEAK const PinMap PinMap_SPI_SCLK[] = {
171+
{PA_5, SPI1, CH_PIN_DATA(CH_MODE_OUTPUT_50MHz, CH_CNF_OUTPUT_AFPP, 0, AFIO_NONE)},
172+
{NC, NP, 0}
173+
};
174+
#endif
175+
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#ifdef SPI_MODULE_ENABLED
177+
WEAK const PinMap PinMap_SPI_SSEL[] = {
178+
{PA_4, SPI1, CH_PIN_DATA(CH_MODE_OUTPUT_50MHz, CH_CNF_OUTPUT_AFPP, 0, AFIO_NONE)},
179+
{NC, NP, 0}
180+
};
181+
#endif
182+
183+
//*** CAN ***
184+
#ifdef CAN_MODULE_ENABLED
185+
WEAK const PinMap PinMap_CAN_RD[] = {
186+
{PA_11, CAN1, CH_PIN_DATA(CH_MODE_INPUT, GPIO_NOPULL, AFIO_NONE)},
187+
{PB_8, CAN1, CH_PIN_DATA(CH_MODE_INPUT, GPIO_NOPULL, AFIO_CAN1_2)},
188+
{NC, NP, 0}
189+
};
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#endif
191+
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#ifdef CAN_MODULE_ENABLED
193+
WEAK const PinMap PinMap_CAN_TD[] = {
194+
{PA_12, CAN1, CH_PIN_DATA(CH_MODE_AF_PP, GPIO_NOPULL, AFIO_NONE)},
195+
{PB_9, CAN1, CH_PIN_DATA(CH_MODE_AF_PP, GPIO_NOPULL, AFIO_CAN1_2)},
196+
{NC, NP, 0}
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};
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#endif
199+
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//*** No ETHERNET ***
201+
202+
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//*** USB ***
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#ifdef USB_MODULE_ENABLED
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WEAK const PinMap PinMap_USB[] = {
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{PA_11, USB, CH_PIN_DATA(CH_MODE_INPUT, GPIO_NOPULL, AFIO_NONE)}, // USB_DM
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{PA_12, USB, CH_PIN_DATA(CH_MODE_INPUT, GPIO_NOPULL, AFIO_NONE)}, // USB_DP
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{NC, NP, 0}
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};
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#endif
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//*** No SD ***
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Diff for: ‎variants/CH32V20x/CH32V203G6_ADAFRUIT_QTPY/PinNamesVar.h

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@@ -0,0 +1,53 @@
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/* Alternate pin name */
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PA_0_ALT1 = PA_0 | ALT1,
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PA_1_ALT1 = PA_1 | ALT1,
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PA_2_ALT1 = PA_2 | ALT1,
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PA_3_ALT1 = PA_3 | ALT1,
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PA_4_ALT1 = PA_4 | ALT1,
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PA_5_ALT1 = PA_5 | ALT1,
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PA_6_ALT1 = PA_6 | ALT1,
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PA_7_ALT1 = PA_7 | ALT1,
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PA_8_ALT1 = PA_8 | ALT1,
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PA_9_ALT1 = PA_9 | ALT1,
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PA_10_ALT1 = PA_10 | ALT1,
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PA_11_ALT1 = PA_11 | ALT1,
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PA_15_ALT1 = PA_15 | ALT1,
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PB_0_ALT1 = PB_0 | ALT1,
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PB_0_ALT2 = PB_0 | ALT2,
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PB_1_ALT1 = PB_1 | ALT1,
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PB_1_ALT2 = PB_1 | ALT2,
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PB_3_ALT1 = PB_3 | ALT1,
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PB_10_ALT1 = PB_10 | ALT1,
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PB_11_ALT1 = PB_11 | ALT1,
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/* SYS_WKUP */
24+
#ifdef PWR_WAKEUP_PIN1
25+
SYS_WKUP1 = PA_0,
26+
#endif
27+
#ifdef PWR_WAKEUP_PIN2
28+
SYS_WKUP2 = NC,
29+
#endif
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#ifdef PWR_WAKEUP_PIN3
31+
SYS_WKUP3 = NC,
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#endif
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#ifdef PWR_WAKEUP_PIN4
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SYS_WKUP4 = NC,
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#endif
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#ifdef PWR_WAKEUP_PIN5
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SYS_WKUP5 = NC,
38+
#endif
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#ifdef PWR_WAKEUP_PIN6
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SYS_WKUP6 = NC,
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#endif
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#ifdef PWR_WAKEUP_PIN7
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SYS_WKUP7 = NC,
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#endif
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#ifdef PWR_WAKEUP_PIN8
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SYS_WKUP8 = NC,
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#endif
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/* USB */
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#ifdef USBCON
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USB_DM = PA_11,
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USB_DP = PA_12,
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#endif

Diff for: ‎variants/CH32V20x/CH32V203G6_ADAFRUIT_QTPY/variant_CH32V203G6_ADAFRUIT_QTPY.cpp

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/**
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*******************************************************************************
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* Copyright (c) 2021 Nanjing Qinheng Microelectronics Co., Ltd.
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* All rights reserved.
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*
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* This software component is licensed by WCH under BSD 3-Clause license,
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* the "License"; You may not use this file except in compliance with the
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* License. You may obtain a copy of the License at:
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* opensource.org/licenses/BSD-3-Clause
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*
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*******************************************************************************
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*/
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#include "pins_arduino.h"
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#include "hw_config.h"
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// Digital PinName array
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const PinName digitalPin[] = {
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PB_1, // D0/A0
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PB_0, // D1/A1
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PA_1, // D2/A2
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PA_0, // D3/A3
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PA_2, // D4/TX
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PA_3, // D5/RX
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PA_4, // D6/Neopixel
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PA_5, // D7/SCK
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PA_6, // D8/MISO
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PA_7, // D9/MOSI
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PB_6, // D10/SCL
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PB_7, // D11/SDA
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PB_8, // D12/BOOT0 Button
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};
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// Analog (Ax) pin number array
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const uint32_t analogInputPin[] = {
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0, // A0, PB1
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1, // A1, PB0
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2, // A2, PA1
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3, // A3, PA0
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};
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extern "C" {
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void pre_init(void) {
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// Enable Flash enhance read mode for full 224KB
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FLASH->KEYR = 0x45670123; // FLASH_Unlock_Fast();
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FLASH->KEYR = 0xCDEF89AB;
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FLASH->CTLR |= (1 << 24); // Enhanced Read Mode
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FLASH->CTLR |= (1 << 15); // FLASH_Lock_Fast();
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hw_config_init();
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}
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}

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