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Merge pull request #15 from zeroasiccorp/nvdla
Adding nvdla
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.github/workflows/wheels.yml

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jobs:
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build_wheels:
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name: Wheels
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name: Wheels lambdalib
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runs-on: ubuntu-latest
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steps:
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- uses: actions/checkout@v5
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with:
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submodules: true
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- uses: hynek/build-and-inspect-python-package@v2
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publish:
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needs: [build_wheels]
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runs-on: ubuntu-latest
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permissions:
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id-token: write
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if: github.event_name == 'release' && github.event.action == 'published'
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steps:
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- uses: zeroasiccorp/za_logikbench/.github/actions/add@main
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- uses: actions/download-artifact@v5
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with:
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token: ${{ secrets.ZA_TOKEN }}
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package_name: logikbench
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name: Packages
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path: dist
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- name: Publish
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uses: pypa/gh-action-pypi-publish@v1.13.0
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save:
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needs: [build_wheels]
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needs: [publish]
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runs-on: ubuntu-latest
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if: github.event_name == 'release' && github.event.action == 'published'
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permissions:
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contents: write

logikbench/blocks/nvdla/README.md

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Nvidia Deep Learning Accelerator (NVDLA)
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============================================
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## Description
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The NVIDIA Deep Learning Accelerator (NVDLA) is a free and open architecture that promotes a standard way to design deep learning inference accelerators. With its modular architecture, NVDLA is scalable, highly configurable, and designed to simplify integration and portability. Learn more about NVDLA on the project web page.
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http://nvdla.org/
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## Parameters
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- TBD
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## RTL Sources
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- author: Nvidia
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- repo: https://github.com/nvdla/hw
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- commit: 8e06b1b9d85aab65b40d43d08eec5ea4681ff715
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## License
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- NVIDIA Open NVDLA License and Agreement v1.0
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## Modifications
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// ================================================================
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// NVDLA Open Source Project
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//
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// Copyright(c) 2016 - 2017 NVIDIA Corporation. Licensed under the
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// NVDLA Open Hardware License; Check "LICENSE" which comes with
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// this distribution for more information.
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// ================================================================
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// File Name: NV_HWACC_NVDLA_tick_defines.vh
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`include "NV_HWACC_common_tick_defines.vh"
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`ifndef NV_HWACC_NVDLA_tick_defines_vh
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`define NV_HWACC_NVDLA_tick_defines_vh
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//this section contains IP specific defines
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`ifdef NV_FPGA_SYSTEM
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`ifndef NV_HWACC_NVDLA_SFPGA_UFPGA_EMU
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`define NV_HWACC_NVDLA_SFPGA_UFPGA_EMU
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`endif
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`ifndef NV_HWACC_NVDLA_SFPGA_UFPGA
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`define NV_HWACC_NVDLA_SFPGA_UFPGA
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`endif
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`ifndef NV_HWACC_NVDLA_SFPGA_EMU
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`define NV_HWACC_NVDLA_SFPGA_EMU
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`endif
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`endif
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`ifdef NV_FPGA_UNIT
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`ifndef NV_HWACC_NVDLA_SFPGA_UFPGA_EMU
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`define NV_HWACC_NVDLA_SFPGA_UFPGA_EMU
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`endif
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`ifndef NV_HWACC_NVDLA_SFPGA_UFPGA
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`define NV_HWACC_NVDLA_SFPGA_UFPGA
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`endif
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`ifndef NV_HWACC_NVDLA_UFPGA_EMU
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`define NV_HWACC_NVDLA_UFPGA_EMU
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`endif
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`endif
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`ifdef NV_EMULATION
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`ifndef NV_HWACC_NVDLA_SFPGA_UFPGA_EMU
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`define NV_HWACC_NVDLA_SFPGA_UFPGA_EMU
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`endif
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`ifndef NV_HWACC_NVDLA_SFPGA_EMU
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`define NV_HWACC_NVDLA_SFPGA_EMU
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`endif
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`ifndef NV_HWACC_NVDLA_UFPGA_EMU
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`define NV_HWACC_NVDLA_UFPGA_EMU
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`endif
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`endif
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//DEFINES
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//defines shared between system fpga and unit fpga and emulation
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`ifdef NV_HWACC_NVDLA_SFPGA_UFPGA_EMU
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//add defines here
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`endif
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//defines shared between system fpga and unit fpga
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`ifdef NV_HWACC_NVDLA_SFPGA_UFPGA
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//add defines here
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`endif
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//defines shared between system fpga and emulation
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`ifdef NV_HWACC_NVDLA_SFPGA_EMU
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//add defines here
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`endif
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//defines shared between unit fpga and emulation
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`ifdef NV_HWACC_NVDLA_UFPGA_EMU
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//add defines here
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`endif
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//defines used only in system fpga
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`ifdef NV_FPGA_SYSTEM
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//add defines here
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`endif
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//defines used only in unit fpga
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`ifdef NV_FPGA_UNIT
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//add defines here
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`endif
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//defines used only in emulation
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`ifdef NV_EMULATION
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//add defines here
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`endif
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`endif //NV_HWACC_NVDLA_tick_defines_vh
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// ================================================================
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// NVDLA Open Source Project
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//
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// Copyright(c) 2016 - 2017 NVIDIA Corporation. Licensed under the
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// NVDLA Open Hardware License; Check "LICENSE" which comes with
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// this distribution for more information.
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// ================================================================
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// File Name: simulate_x_tick.vh
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`ifdef _SIMULATE_X_VH_
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`else
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`define _SIMULATE_X_VH_
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`ifndef SYNTHESIS
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`define SIMULATION_ONLY
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`endif
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// deprecated tick defines
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`ifdef SIMULATION_ONLY
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`define x_or_0 1'bx
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`define x_or_1 1'bx
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`else
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`define x_or_0 1'b0
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`define x_or_1 1'b1
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`endif
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// formerly recommended tick defines
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`ifdef SIMULATION_ONLY
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`define tick_x_or_0 1'bx
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`define tick_x_or_1 1'bx
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`else
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`define tick_x_or_0 1'b0
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`define tick_x_or_1 1'b1
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`endif
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// newly recommended tick defines
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// (-sv parsing is enabled everywhere now, and explicit widths are no longer needed)
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`ifdef SIMULATION_ONLY
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`define sv_x_or_0 'x
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`define sv_x_or_1 'x
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`else
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`define sv_x_or_0 '0
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`define sv_x_or_1 '1
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`endif
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`endif

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