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mappzormappzor
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Fixed mask handling for instructions without masks
1 parent 4a586d6 commit 9780bc3

13 files changed

Lines changed: 277 additions & 16 deletions

‎src/Decoder.c‎

Lines changed: 16 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -2809,7 +2809,7 @@ static void ZydisSetAVXInformation(ZydisDecoderContext* context,
28092809
}
28102810

28112811
// Mask
2812-
instruction->avx.mask.reg = ZYDIS_REGISTER_K0 + instruction->raw.evex.aaa;
2812+
instruction->avx.mask.reg = ZYDIS_REGISTER_K0 + context->vector_unified.mask;
28132813
switch (def->mask_override)
28142814
{
28152815
case ZYDIS_MASK_OVERRIDE_DEFAULT:
@@ -2824,7 +2824,7 @@ static void ZydisSetAVXInformation(ZydisDecoderContext* context,
28242824
default:
28252825
ZYAN_UNREACHABLE;
28262826
}
2827-
if (!instruction->raw.evex.aaa)
2827+
if (!context->vector_unified.mask)
28282828
{
28292829
instruction->avx.mask.mode = ZYDIS_MASK_MODE_DISABLED;
28302830
}
@@ -3129,8 +3129,17 @@ static void ZydisSetAVXInformation(ZydisDecoderContext* context,
31293129
}
31303130

31313131
// Mask
3132-
instruction->avx.mask.mode = ZYDIS_MASK_MODE_MERGING;
3133-
instruction->avx.mask.reg = ZYDIS_REGISTER_K0 + instruction->raw.mvex.kkk;
3132+
if (def->mask_policy == ZYDIS_MASK_POLICY_ALLOWED)
3133+
{
3134+
instruction->avx.mask.mode = ZYDIS_MASK_MODE_MERGING;
3135+
instruction->avx.mask.reg = ZYDIS_REGISTER_K0 + context->vector_unified.mask;
3136+
}
3137+
else
3138+
{
3139+
ZYAN_ASSERT(def->mask_policy == ZYDIS_MASK_POLICY_INVALID);
3140+
instruction->avx.mask.mode = ZYDIS_MASK_MODE_NONE;
3141+
instruction->avx.mask.reg = ZYDIS_REGISTER_K0;
3142+
}
31343143
#else
31353144
ZYAN_UNREACHABLE;
31363145
#endif
@@ -4379,6 +4388,8 @@ static ZyanStatus ZydisNodeHandlerEvexNF(ZydisDecoderContext* context,
43794388
return ZYDIS_STATUS_DECODING_ERROR;
43804389
}
43814390

4391+
context->vector_unified.mask = 0;
4392+
43824393
*index = instruction->raw.evex.NF;
43834394
return ZYAN_STATUS_SUCCESS;
43844395
}
@@ -4409,6 +4420,7 @@ static ZyanStatus ZydisNodeHandlerEvexSCC(ZydisDecoderContext* context,
44094420

44104421
context->vector_unified.vvvv = (~context->vector_unified.vvvv) & 0x0F;
44114422
context->vector_unified.V4 = 0;
4423+
context->vector_unified.mask = 0;
44124424

44134425
instruction->apx.scc = ZYDIS_SCC_O + instruction->raw.evex.SCC;
44144426

‎tests/cases/default_054.in‎

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1 @@
1+
-64 62ECFC1444CA

‎tests/cases/default_054.out‎

Lines changed: 53 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,53 @@
1+
== [ BASIC ] ============================================================================================
2+
MNEMONIC: ccmpz [ENC: EVEX, MAP: MAP4, OPC: 0x39]
3+
LENGTH: 6
4+
SSZ: 64
5+
EOSZ: 64
6+
EASZ: 64
7+
CATEGORY: APX
8+
ISA-SET: APX_F
9+
ISA-EXT: APXEVEX
10+
EXCEPTIONS: APX_EVEX_CCMP
11+
ATTRIBUTES: HAS_MODRM HAS_EVEX CPUFLAG_ACCESS HAS_EEVEX
12+
OPTIMIZED: 62 EC AC 04 39 C8
13+
14+
== [ OPERANDS ] ============================================================================================
15+
## TYPE VISIBILITY ACTION ENCODING SIZE NELEM ELEMSZ ELEMTYPE VALUE
16+
-- --------- ---------- ------ ------------ ---- ----- ------ -------- ---------------------------
17+
0 REGISTER EXPLICIT R MODRM_RM 64 1 64 INT r16
18+
1 REGISTER EXPLICIT R MODRM_REG 64 1 64 INT r17
19+
2 REGISTER HIDDEN W NONE 64 64 1 INT rflags
20+
-- --------- ---------- ------ ------------ ---- ----- ------ -------- ---------------------------
21+
22+
== [ FLAGS ] ============================================================================================
23+
ACTIONS: [CF : M ] [PF : M ] [AF : M ] [ZF : M ] [SF : M ] [OF : M ]
24+
READ: 0x00000000
25+
WRITTEN: 0x000008D5
26+
27+
== [ AVX ] ============================================================================================
28+
VECTORLEN: 128
29+
BROADCAST: NONE
30+
ROUNDING: NONE
31+
SAE: N
32+
MASK: k0 [DISABLED]
33+
34+
== [ APX ] ============================================================================================
35+
USES_EGPR: Y
36+
HAS_NF: N
37+
HAS_ZU: N
38+
SCC: Z
39+
DFV: CF SF
40+
41+
== [ ATT ] ============================================================================================
42+
ABSOLUTE: ccmpz $5, %r17, %r16
43+
RELATIVE: ccmpz $5, %r17, %r16
44+
45+
== [ INTEL ] ============================================================================================
46+
ABSOLUTE: ccmpz {dfv=cf, sf} r16, r17
47+
RELATIVE: ccmpz {dfv=cf, sf} r16, r17
48+
49+
== [ SEGMENTS ] ============================================================================================
50+
62 EC AC 04 39 C8
51+
: : :..MODRM
52+
: :..OPCODE
53+
:..EVEX

‎tests/cases/default_055.in‎

Lines changed: 1 addition & 0 deletions
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@@ -0,0 +1 @@
1+
-64 6274FC0C01D0

‎tests/cases/default_055.out‎

Lines changed: 53 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,53 @@
1+
== [ BASIC ] ============================================================================================
2+
MNEMONIC: cfcmovz [ENC: EVEX, MAP: MAP4, OPC: 0x44]
3+
LENGTH: 6
4+
SSZ: 64
5+
EOSZ: 64
6+
EASZ: 64
7+
CATEGORY: APX
8+
ISA-SET: APX_F
9+
ISA-EXT: APXEVEX
10+
EXCEPTIONS: APX_EVEX_CFCMOV
11+
ATTRIBUTES: HAS_MODRM HAS_EVEX CPUFLAG_ACCESS HAS_EEVEX
12+
OPTIMIZED: 62 EC FC 14 44 CA
13+
14+
== [ OPERANDS ] ============================================================================================
15+
## TYPE VISIBILITY ACTION ENCODING SIZE NELEM ELEMSZ ELEMTYPE VALUE
16+
-- --------- ---------- ------ ------------ ---- ----- ------ -------- ---------------------------
17+
0 REGISTER EXPLICIT W NDSNDD 64 1 64 INT r16
18+
1 REGISTER EXPLICIT R MODRM_REG 64 1 64 INT r17
19+
2 REGISTER EXPLICIT R MODRM_RM 64 1 64 INT r18
20+
3 REGISTER HIDDEN R NONE 64 64 1 INT rflags
21+
-- --------- ---------- ------ ------------ ---- ----- ------ -------- ---------------------------
22+
23+
== [ FLAGS ] ============================================================================================
24+
ACTIONS: [ZF : T ]
25+
READ: 0x00000040
26+
WRITTEN: 0x00000000
27+
28+
== [ AVX ] ============================================================================================
29+
VECTORLEN: 128
30+
BROADCAST: NONE
31+
ROUNDING: NONE
32+
SAE: N
33+
MASK: k0 [DISABLED]
34+
35+
== [ APX ] ============================================================================================
36+
USES_EGPR: Y
37+
HAS_NF: N
38+
HAS_ZU: N
39+
SCC: NONE
40+
41+
== [ ATT ] ============================================================================================
42+
ABSOLUTE: cfcmovz %r18, %r17, %r16
43+
RELATIVE: cfcmovz %r18, %r17, %r16
44+
45+
== [ INTEL ] ============================================================================================
46+
ABSOLUTE: cfcmovz r16, r17, r18
47+
RELATIVE: cfcmovz r16, r17, r18
48+
49+
== [ SEGMENTS ] ============================================================================================
50+
62 EC FC 14 44 CA
51+
: : :..MODRM
52+
: :..OPCODE
53+
:..EVEX

‎tests/cases/default_056.in‎

Lines changed: 1 addition & 0 deletions
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@@ -0,0 +1 @@
1+
-64 6272FC0CF2C3

‎tests/cases/default_056.out‎

Lines changed: 46 additions & 0 deletions
Original file line numberDiff line numberDiff line change
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1+
== [ BASIC ] ============================================================================================
2+
MNEMONIC: add [ENC: EVEX, MAP: MAP4, OPC: 0x01]
3+
LENGTH: 6
4+
SSZ: 64
5+
EOSZ: 64
6+
EASZ: 64
7+
CATEGORY: BINARY
8+
ISA-SET: APX_F
9+
ISA-EXT: APXEVEX
10+
EXCEPTIONS: APX_EVEX_INT
11+
ATTRIBUTES: HAS_MODRM HAS_EVEX HAS_EEVEX
12+
OPTIMIZED: 62 74 FC 0C 01 D0
13+
14+
== [ OPERANDS ] ============================================================================================
15+
## TYPE VISIBILITY ACTION ENCODING SIZE NELEM ELEMSZ ELEMTYPE VALUE
16+
-- --------- ---------- ------ ------------ ---- ----- ------ -------- ---------------------------
17+
0 REGISTER EXPLICIT RW MODRM_RM 64 1 64 INT rax
18+
1 REGISTER EXPLICIT R MODRM_REG 64 1 64 INT r10
19+
-- --------- ---------- ------ ------------ ---- ----- ------ -------- ---------------------------
20+
21+
== [ AVX ] ============================================================================================
22+
VECTORLEN: 128
23+
BROADCAST: NONE
24+
ROUNDING: NONE
25+
SAE: N
26+
MASK: k0 [DISABLED]
27+
28+
== [ APX ] ============================================================================================
29+
USES_EGPR: N
30+
HAS_NF: Y
31+
HAS_ZU: N
32+
SCC: NONE
33+
34+
== [ ATT ] ============================================================================================
35+
ABSOLUTE: addnf %r10, %rax
36+
RELATIVE: addnf %r10, %rax
37+
38+
== [ INTEL ] ============================================================================================
39+
ABSOLUTE: {nf} add rax, r10
40+
RELATIVE: {nf} add rax, r10
41+
42+
== [ SEGMENTS ] ============================================================================================
43+
62 74 FC 0C 01 D0
44+
: : :..MODRM
45+
: :..OPCODE
46+
:..EVEX

‎tests/cases/default_057.in‎

Lines changed: 1 addition & 0 deletions
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@@ -0,0 +1 @@
1+
-64 6272FC0CF2C3

‎tests/cases/default_057.out‎

Lines changed: 47 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,47 @@
1+
== [ BASIC ] ============================================================================================
2+
MNEMONIC: andn [ENC: EVEX, MAP: 0F38, OPC: 0xF2]
3+
LENGTH: 6
4+
SSZ: 64
5+
EOSZ: 64
6+
EASZ: 64
7+
CATEGORY: BMI1
8+
ISA-SET: APX_F_BMI1
9+
ISA-EXT: APXEVEX
10+
EXCEPTIONS: APX_EVEX_BMI
11+
ATTRIBUTES: HAS_MODRM HAS_EVEX HAS_EEVEX
12+
OPTIMIZED: 62 72 FC 0C F2 C3
13+
14+
== [ OPERANDS ] ============================================================================================
15+
## TYPE VISIBILITY ACTION ENCODING SIZE NELEM ELEMSZ ELEMTYPE VALUE
16+
-- --------- ---------- ------ ------------ ---- ----- ------ -------- ---------------------------
17+
0 REGISTER EXPLICIT W MODRM_REG 64 1 64 INT r8
18+
1 REGISTER EXPLICIT R NDSNDD 64 1 64 INT rax
19+
2 REGISTER EXPLICIT R MODRM_RM 64 1 64 INT rbx
20+
-- --------- ---------- ------ ------------ ---- ----- ------ -------- ---------------------------
21+
22+
== [ AVX ] ============================================================================================
23+
VECTORLEN: 128
24+
BROADCAST: NONE
25+
ROUNDING: NONE
26+
SAE: N
27+
MASK: k0 [DISABLED]
28+
29+
== [ APX ] ============================================================================================
30+
USES_EGPR: N
31+
HAS_NF: Y
32+
HAS_ZU: N
33+
SCC: NONE
34+
35+
== [ ATT ] ============================================================================================
36+
ABSOLUTE: andnnf %rbx, %rax, %r8
37+
RELATIVE: andnnf %rbx, %rax, %r8
38+
39+
== [ INTEL ] ============================================================================================
40+
ABSOLUTE: {nf} andn r8, rax, rbx
41+
RELATIVE: {nf} andn r8, rax, rbx
42+
43+
== [ SEGMENTS ] ============================================================================================
44+
62 72 FC 0C F2 C3
45+
: : :..MODRM
46+
: :..OPCODE
47+
:..EVEX

‎tests/cases/default_058.in‎

Lines changed: 1 addition & 0 deletions
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@@ -0,0 +1 @@
1+
-64 -64 -knc 6241780A1800

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